TWI843322B - Circuit system capable of digitally regulating the speed of a DC fan - Google Patents

Abstract

The invention is a circuit system capable of digitally regulating the speed of a DC fan. The circuit system at least comprises a parallel data generator circuit, a ladder resistor network circuit, a current amplifier circuit, a linear variable resistor circuit and a fan power converter circuit. The parallel data generator circuit receives control data and generates corresponding parallel data; the ladder resistor network circuit receives parallel data and converts it into corresponding The current amplifier circuit receives the current signal and converts it into a corresponding voltage signal; the linear variable resistor circuit receives the voltage signal to generate a corresponding resistance signal; the fan power converter circuit adjusts the output voltage according to the resistance signal to generate a corresponding driving voltage value, and transmits the driving voltage value to the motor of the DC fan, so that the motor of the DC fan operates according to the driving voltage value.

Description

Circuit system capable of digitally regulating the speed of a DC fan

The present invention relates to a circuit system, and more particularly to a circuit system that can be applied to a DC fan and digitally adjust the speed of the DC fan.

In electronic equipment, cooling fans are often required to force heat dissipation of electronic equipment or systems to prevent overheating and equipment damage. If the speed of the cooling fan of the system is not controlled, the cooling fan will emit an uncomfortable high-decibel noise when running at full speed, and it will also increase system power consumption and is not environmentally friendly.

Furthermore, the cooling fans in electronic equipment are generally divided into pulse width modulation (PWM) fans and DC fans. The aforementioned cooling fans correspond to two speed regulation circuit principles, namely PWM speed regulation and buck speed regulation. Among them, the PWM fan adjusts the speed according to the duty cycle (Duty) of the input PWM waveform. Its advantages lie in digital speed regulation and multiple adjustment levels, for example, 256 or more adjustment levels. However, the cost of PWM fans is higher than that of DC fans, and the speed control circuit of PWM fans is more complicated. It also needs to be matched with a dedicated speed control chip to realize the aforementioned advantages.

As mentioned above, DC fans adjust the fan speed linearly according to the input voltage. They are relatively cheap, widely used in the industry, and easy to obtain. Although the common linear step-down regulation circuit of DC fans is relatively simple, the circuit loss is large and it will increase the system heat. At the same time, the DC fan speed adjustment gear is relatively small, generally 2~3 gears of wind speed, which is not easy to meet the requirements of detailed speed and low noise. Therefore, how to effectively solve the above problems to combine the advantages of PWM fans and DC fans and avoid the disadvantages of both has become an important topic of the present invention.

In order to achieve the design requirements of a low-cost, multi-speed, low-noise heat dissipation system, and in view of the disadvantages of conventional PWM fans and DC fans, the inventors have repeatedly studied and tested and finally developed a circuit system of the present invention that can digitally adjust the speed of a DC fan. The circuit system combines the advantages of the PWM circuit that can finely adjust the speed speed and the low cost of the DC fan to take into account the cost and performance of the heat dissipation fan and meet the needs of the industry. It is hoped that the advent of the present invention can effectively solve the conventional problem.

The purpose of the present invention is to provide a circuit system capable of digitally regulating the speed of a DC fan, which is applied to a DC fan. The circuit system at least includes a parallel data generator circuit, a ladder resistor network circuit, a current amplifier circuit, a linear variable resistor circuit and a fan power converter circuit, wherein the parallel data generator circuit receives a control data output from a central processing unit and generates a corresponding digital parallel data according to the content of the control data; the ladder resistor network circuit is electrically connected to the parallel data generator circuit, and can receive the parallel data and convert it into a corresponding analog current signal. signal; the current amplifier circuit is electrically connected to the ladder resistor network circuit, and can receive the current signal and convert the current signal into a corresponding voltage signal; the linear variable resistor circuit is electrically connected to the current amplifier circuit, and can receive the voltage signal to generate a corresponding resistance signal according to the voltage signal; the fan power converter circuit is electrically connected to a motor of the DC fan, the fan power converter circuit receives the resistance signal to generate a driving voltage value corresponding to the resistance signal, and transmits the driving voltage value to the motor of the DC fan, so that the motor of the DC fan operates according to the driving voltage value.

Optionally, it also includes a parallel data driving circuit, wherein the central processing unit generates a corresponding serial data according to the content of the control data, the parallel data generator circuit receives the serial data output by the central processing unit, converts the serial data into the parallel data, and then transmits the parallel data to the parallel data driving circuit.

Optionally, when the circuit system switches from a power-off state to a power-on state by receiving power, it can generate the maximum driving voltage value through the parallel data driving circuit to make the DC fan run at the highest speed; the central processor can also control the circuit system to turn off the fan power converter circuit to stop the DC fan from running.

Optionally, the linear variable resistance circuit is based on the characteristics of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET) or Field-Effect Transistors (FET) to form the resistance signal that changes linearly and corresponds to the voltage signal.

Optionally, it also includes a fan speed detector, which is used to detect the current speed value of the fan and transmit it to the central processor. The central processor can collect the ambient temperature of the working environment of the DC fan to generate the corresponding control data and transmit it to the circuit system. Then, the DC fan adjusts the fan speed according to the driving voltage value generated by the circuit system.

Optionally, the ladder resistor network circuit includes a plurality of ladder resistor groups, each of which is an R-2R resistor network, and at least one ladder resistor group can be formed by three resistors with two different resistance values, which are a driving resistor, a jumper resistor and a voltage divider resistor, respectively. One end of the driving resistor, the jumper resistor and the voltage divider resistor can be connected to each other, and the other ends of the driving resistor, the jumper resistor and the voltage divider resistor are not connected to each other.

Optionally, the driving resistor is directly electrically connected to the parallel data driving circuit, and its resistance value is twice the resistance value of the jumper resistor. The jumper resistor can be bridged between the driving resistor and another driving resistor of another ladder resistor group, and the voltage divider resistor is connected in parallel with the lowest bit resistor of the parallel data driving circuit.

Optionally, the DC fan is a 5V to 12V DC fan.

Optionally, the fan power converter circuit can deliver a driving voltage value ranging from 4.0 to 15.0 volts to the motor of the DC fan.

Optionally, depending on the specifications of the DC fan, the driving voltage value transmitted by the fan power converter circuit to the motor of the DC fan can range from 10.8 to 13.2 volts.

In order to help you, the review committee, to have a deeper understanding of the purpose, technical features and effects of the present invention, the following embodiments are provided with accompanying drawings for detailed description:

In order to make the purpose, technical content and advantages of the present invention more clearly understood, the following is a further detailed description of the disclosed embodiments of the present invention in combination with specific embodiments and with reference to the attached drawings. The technical personnel in this field can understand the advantages and effects of the present invention from the contents disclosed in this specification, and the present invention can be implemented or applied through other different specific embodiments. The details in this specification can also be modified and changed in various ways based on different viewpoints and applications without deviating from the concept of the present invention. In addition, it is stated in advance that the attached drawings of the present invention are only for simple schematic description and are not drawn according to the actual size.

It should be understood that the embodiments used anywhere in the specification of the present invention, including the use of any terminology, are only illustrative and do not limit the scope and meaning of the present invention or any terminology. Similarly, the present invention is not limited to the various embodiments disclosed in the specification. Although the terms first, second, or third, etc. may be used herein to describe various components, each of the components should not be limited by the aforementioned terms. The aforementioned terms are mainly used to distinguish one component from another, and should not impose any substantial restrictions on any component, and should not limit the assembly or setting order of each component in actual application.

The present invention is a circuit system that can digitally adjust the speed of a DC fan. The circuit system 1 of the present invention is applied to a DC fan. To explain the circuit system 1 of the present invention in detail, the circuit architecture and electronic components of the circuit system 1 are described below through several embodiments. In a first embodiment of the present invention, the architecture of the circuit system 1 includes a parallel data generator circuit (parallel data generator The invention relates to a circuit 12, a ladder resistor network circuit 14, a current amplifier circuit 15, a linear variable resistor circuit 16 and a fan power converter circuit 17, wherein the parallel data generator circuit 12 receives a control data output from a central processing unit 11, and generates a corresponding digital parallel data according to the content of the control data; the ladder resistor network circuit 14 is electrically connected to the parallel data generator circuit 12, and can receive the parallel data and convert it into a corresponding analog current signal; the current amplifier circuit 15 is electrically connected to the ladder resistor network circuit 14. The circuit 14 can receive a current signal and convert the current signal into a corresponding voltage signal; the linear variable resistor circuit 16 is electrically connected to the current amplifier circuit 15 and can receive a voltage signal to generate a corresponding resistance signal according to the voltage signal; the fan power converter circuit 17 is electrically connected to a fan motor 22 of the DC fan, the fan power converter circuit 17 receives the resistance signal to generate a driving voltage value corresponding to the resistance signal, and transmits the driving voltage value to the fan motor 22 of the DC fan, so that the fan motor 22 of the DC fan operates according to the driving voltage value.

In addition to the circuit system 1 of the first embodiment, the present invention also includes other embodiments. Please refer to FIG. 1. In a second embodiment of the present invention, only the difference between the second embodiment and the first embodiment and other unmentioned parts are described in detail. The circuit system 1 includes a central processing unit 11, a parallel data generator circuit 12, a parallel data driving circuit (parallel data driving circuit The parallel data generator circuit 12 can be composed of a first electronic component U1 (e.g., 74LVC164), which receives the control data output from the central processing unit 11 and generates a corresponding parallel data according to the content of the control data; the parallel data driving circuit 13 (e.g., inverting buffer) The buffer) is electrically connected to the parallel data generator circuit 12, which receives parallel data and converts the parallel data into corresponding inverted parallel data. The parallel data driver circuit 13 can be composed of a second electronic component U2 (such as: 74HCS240), wherein the pin 2 (1A1 pin) of the second electronic component U2 is connected to the pin of the first electronic component U1. 13 (QH pin) of the second electronic component U2, pin 4 (1A2 pin) of the second electronic component U2 is connected to pin 12 (QG pin) of the first electronic component U1, pin 6 (1A3 pin) of the second electronic component U2 is connected to pin 11 (QF pin) of the first electronic component U1, and pin 8 (1A4 pin) of the second electronic component U2 is connected to pin 12 (QG pin) of the first electronic component U1. The pin 10 (QE pin) of the first electronic component U1 is connected, the pin 11 (2A1 pin) of the second electronic component U2 is connected to the pin 6 (QD pin) of the first electronic component U1, the pin 13 (2A2 pin) of the second electronic component U2 is connected to the pin 5 (QC pin) of the first electronic component U1, and the pin 15 (2A3 pin) of the second electronic component U2 is connected to the pin 6 (QD pin) of the first electronic component U1. It will be connected to pin 4 (QB pin) of the first electronic component U1, pin 17 (2A4 pin) of the second electronic component U2 will be connected to pin 3 (QA pin) of the first electronic component U1, and pin 1 (1G pin) of the second electronic component U2 will be connected back to pin 19 (2G pin) of the second electronic component U2 and connected to the system ground (GND) signal.

As mentioned above, the ladder resistor network circuit 14 includes a plurality of ladder resistor groups, each of which is an R-2R resistor network. In the embodiment, at least one ladder resistor group can be formed by three resistors with two different resistance values (such as R and 2R), which are a driving resistor, a jumper resistor and a voltage divider resistor. One end of the driving resistor, the jumper resistor and the voltage divider resistor can be connected to each other. The other ends of the connecting resistor and the voltage divider resistor are not connected to each other, wherein the driving resistor is directly electrically connected to the parallel data driving circuit 13, and its resistance value (i.e., 2R) is twice the resistance value (i.e., R) of the jumper resistor; the jumper resistor can be bridged between the driving resistor and another driving resistor of another ladder resistor group; the voltage divider resistor is connected in parallel with the lowest resistor of the parallel data driving circuit 13, and its resistance value is 2R. In the second embodiment, the driving resistors included in the ladder resistor network circuit 14 are the first resistor R1, the fourth resistor R4, the third resistor R3, the sixth resistor R6, the eighth resistor R8, the tenth resistor R10, the fourteenth resistor R14 and the thirteenth resistor R13; the crossover resistors included in the ladder resistor network circuit 14 are the second resistor R2, the fifth resistor R5, the seventh resistor R7, the ninth resistor R9, the eleventh resistor R11, the twelfth resistor R12 and the fifteenth resistor R15; the voltage divider resistor included in the ladder resistor network circuit 14 is the sixteenth resistor R16, and the pin 18 (1Y1 pin) of the second electronic component U2 is connected to the first end of the first resistor R1, and the pin 1 The pin 6 (1Y2 pin) of the second electronic component U2 is connected to the first end of the fourth resistor R4, the pin 14 (1Y3 pin) of the second electronic component U2 is connected to the first end of the third resistor R3, the pin 12 (1Y4 pin) of the second electronic component U2 is connected to the first end of the sixth resistor R6, the pin 9 (2Y1 pin) of the second electronic component U2 is connected to the first end of the eighth resistor R8, the pin 7 (2Y2 pin) of the second electronic component U2 is connected to the first end of the tenth resistor R10, the pin 5 (2Y3 pin) of the second electronic component U2 is connected to the first end of the fourteenth resistor R14, and the pin 3 (2Y4 pin) of the second electronic component U2 is connected to the first end of the thirteenth resistor R13.

Furthermore, the fourth resistor R4 is connected in parallel with the first resistor R1 and the second resistor R2, the third resistor R3 is connected in parallel with the fourth resistor R4 and the fifth resistor R5, the sixth resistor R6 is connected in parallel with the third resistor R3 and the seventh resistor R7, the eighth resistor R8 is connected in parallel with the sixth resistor R6 and the ninth resistor R9, the tenth resistor R10 is connected in parallel with the eighth resistor R8 and the eleventh resistor R11, the fourteenth resistor R14 is connected in parallel with the tenth resistor R10 and the twelfth resistor R12, the thirteenth resistor R13 is connected in parallel with the fourteenth resistor R14 and the fifteenth resistor R15, the second end of the first resistor R1 is connected to the first end of the second resistor R2 (that is, the first resistor R1 is connected in series with the second resistor R2), the second end of the fourth resistor R4 is connected to the first end of the fifth resistor R5 (that is, the fourth resistor R4 is connected to the fifth resistor R5 series), the second end of the third resistor R3 is connected to the first end of the seventh resistor R7 (i.e., the third resistor R3 is connected in series with the seventh resistor R7), the second end of the sixth resistor R6 is connected to the first end of the ninth resistor R9 (i.e., the sixth resistor R6 is connected in series with the ninth resistor R9), the second end of the eighth resistor R8 is connected to the first end of the eleventh resistor R11 (i.e., the eighth resistor R8 is connected in series with the eleventh resistor R11), the second end of the tenth resistor R10 is connected to the first end of the twelfth resistor R12 (i.e., the tenth resistor R10 is connected in series with the twelfth resistor R12), the second end of the fourteenth resistor R14 is connected to the first end of the fifteenth resistor R15 (i.e., the fourteenth resistor R14 is connected in series with the fifteenth resistor R15), and the second end of the fifteenth resistor R15 is connected back to the second end of the thirteenth resistor R13. The second end of the second resistor R2 is connected between the fourth resistor R4 and the fifth resistor R5, the second end of the fifth resistor R5 is connected between the third resistor R3 and the seventh resistor R7, the second end of the seventh resistor R7 is connected between the sixth resistor R6 and the ninth resistor R9, the second end of the ninth resistor R9 is connected between the eighth resistor R8 and the eleventh resistor R11, the second end of the eleventh resistor R11 is connected between the tenth resistor R10 and the twelfth resistor R12, the second end of the twelfth resistor R12 is connected between the fourteenth resistor R14 and the fifteenth resistor R15, and the first end of the sixteenth resistor R16 is connected between the second end of the fifteenth resistor R15 and the second end of the thirteenth resistor R13.

The current amplifier circuit 15 is electrically connected to the ladder resistor network circuit 14, and is composed of a third electronic component U3 (e.g., LM321), a capacitor, and a resistor; the linear variable resistor circuit 16 is electrically connected to the current amplifier circuit 15, and is composed of a fourth electronic component U4 (e.g., LM321), a fifth electronic component U5 (e.g., LM321), a seventh electronic component Q1, a capacitor, and a resistor, wherein the seventh electronic component Q1 is a field effect transistor (Field-Effect Transistors (FET) or Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET)), but is not limited thereto. In other embodiments of the present invention, the seventh electronic component Q1 can be other types of field effect transistors (Field-Effect Transistors (FET)).

Finally, the fan power converter circuit 17 is electrically connected to the linear variable resistor circuit 16, which is composed of a sixth electronic component U6 (such as TPS62147), an eighth electronic component L1, an up-side resistor Rup, an output impedance Rout (not shown) of the linear variable resistor circuit 16, and a capacitor. Among them, the overvoltage, overcurrent, short circuit, undervoltage and other protection functions embedded in the sixth electronic component U6 can form a protective effect on the DC fan and the circuit system 1, and the output impedance Rout can also be adjusted by the seventh electronic component Q1. Therefore, the up-side resistor Rup and the output impedance Rout can jointly affect the voltage gain to generate a corresponding driving voltage value.

The operation process of the circuit system 1 is shown in FIG. 2 and FIG. 3 , and includes the following steps:

Step (501): The CPU 11 outputs the first control data to the circuit system 1.

When an electronic device (such as a computer, a device, etc.) switches from a power-off state to a power-on state, the central processor 11 outputs the first control data, wherein the first control data is used to reset the first electronic element U1. The first electronic element U1 receives the first control data (i.e., reset message or reset message) output from the central processor 11, and outputs a corresponding feedback signal according to the first control data. The response data is ''00000000'', and the response data is transmitted to the second electronic component U2. After receiving the response data output from the first electronic component U1, the second electronic component U2 drives the response data in reverse to form the parallel data, and the parallel data is ''11111111'' to ensure that when the electronic device is powered on, the DC fan will run at the highest speed.

In the second embodiment, the encoding method of the first control data can include multiple data formats (such as ^I2C , SPI or custom format), and the first electronic component U1 can be a serial input/parallel output shift register (i.e., serial-in/parallel-out (SIPO) shift register). However, in other embodiments, the first electronic component U1 and the second electronic component U2 can both be components of the parallel data generator circuit 12.

Step (502): Determine whether to start or shut down the fan power converter circuit 17.

When the central processor 11 sets the fan power 21 to "0", the fan power converter circuit 17 can be turned off (i.e., step (503), turning off the fan power 21), so the DC fan stops running, and the circuit system 1 will not and cannot produce a speed regulation effect on the DC fan; when the central processor 11 sets the fan power 21 to "1", the fan power converter circuit 17 can be started (i.e., step (504), starting the fan power 21) to ensure that the circuit system 1 can produce a speed regulation effect on the DC fan.

Step (505): The ladder resistor network circuit 14 receives the parallel data and converts it into a corresponding analog current signal.

When the digital parallel data is "111111111", the ladder resistor network circuit 14 receives the parallel data and converts the parallel data into a corresponding analog current signal, that is, the converted current signal can carry the maximum current information.

Step (506): The current amplifier circuit 15 receives the current signal and converts it into a corresponding voltage signal.

When the ladder resistor network circuit 14 outputs a current signal including maximum current information, the current amplifier circuit 15 receives the current signal and converts the current signal into a corresponding voltage signal, that is, the converted voltage signal can carry information of the maximum control voltage (Vc).

Step (507): The linear variable resistance circuit 16 receives the voltage signal to generate a corresponding resistance signal according to the voltage signal.

When the current amplifier circuit 15 outputs a voltage signal including the maximum control voltage information, the linear variable resistance circuit 16 receives the voltage signal and generates a corresponding resistance signal according to the voltage signal. Since current = voltage/resistance, the maximum current value and the maximum voltage value correspond to the minimum resistance value. Therefore, the linear variable resistance circuit 16 generates a resistance signal including the minimum resistance information. This case forms a linearly changing resistance signal corresponding to a voltage signal based on the characteristics of MOSFET or FET, wherein the linear region of MOSFET or FET is relatively small. In order to expand its linear region, the voltage signal carries the information of the control voltage (Vc) and is applied to the gate (Gate) through the linear amplifier circuit of the fourth electronic component U4 and the fifth electronic component U5 to generate a variable resistance region with a large range of linear changes, so that the linear variable resistance circuit 16 will output the minimum output impedance Rout to increase the voltage gain, and when the same MOSFET or FET is used, its clamping voltage (also known as the cut-off voltage Vp) is a fixed value. Therefore, the circuit system 1 can adjust the output impedance Rout by adjusting the control voltage (Vc).

Step (508): The fan power converter circuit 17 receives the resistance signal and generates a driving voltage value corresponding to the resistance signal. The fan motor 22 of the DC fan operates according to the driving voltage value.

When the linear variable resistor circuit 16 outputs a resistance signal including minimum resistance information, since the minimum output impedance Rout can increase the voltage gain, and when the duty cycle (Duty) of the sixth electronic component U6 of the fan power converter circuit 17 is 100%, it can regulate the full range of changes in the fan drive voltage value. Therefore, after the fan power converter circuit 17 with a DC/DC conversion (DC/DC) specification receives the resistance signal, the fan power converter circuit 17 generates a maximum drive voltage value corresponding to the minimum output impedance Rout of the resistance signal, and transmits the drive voltage value to the fan motor 22 of the DC fan, so that the fan motor 22 of the DC fan operates according to the drive voltage value. After the fan motor 22 receives the maximum driving voltage value, the DC fan operates at full speed according to the maximum driving voltage value, thereby completing the initialization setting of the DC fan operation.

Step (509): The CPU 11 and the fan speed detector 18 collect and detect the fan working environment information to determine whether the ambient temperature is lower than the threshold value.

After completing the initialization setting of the DC fan operation, the central processor 11 receives the ambient temperature of the working environment of the DC fan (such as an electronic equipment system) collected by the sensor located on the outlet path of the DC fan or near the DC fan. The fan speed detector 18 detects the current fan speed of the DC fan. Then, the fan speed detector 18 transmits a detection message to the central processor 11. The central processor 11 integrates the ambient temperature and the detection information (such as the fan speed or other information) to determine whether the fan speed is too high, so that the corresponding ambient temperature is lower than the threshold value. When the ambient temperature is lower than the threshold value, the central processor 11 sets the fan power 21 to "0" to turn off the fan power converter circuit 17 (i.e., step (510), turning off the fan power 21). Therefore, the DC fan stops running, and the circuit system 1 will not and cannot produce a speed regulation effect on the DC fan. When the ambient temperature is higher than the threshold value, the central processor 11 transmits the second control data ( The second control data (e.g., speed control information) is transmitted to the parallel data generator circuit 12 and the parallel data driver circuit 13 of the circuit system 1 to be converted into corresponding parallel data (i.e., step (511)). If the second control data transmitted by the central processing unit 11 is serial data, it needs to be converted into parallel data by the parallel data generator circuit 12; if the second control data transmitted by the central processing unit 11 is parallel data, it can be directly transmitted to the parallel data driver circuit 13 for storage. Since currently parallel data will occupy more pin resources of the central processing unit 11, the current data form is still mainly serial data. However, both serial data and parallel data can be applied to the circuit system 1 of the present invention.

Subsequently, after the parallel data driving circuit 13 receives the parallel data, the circuit system 1 will adjust the current signal, the voltage signal, the resistance signal and the driving voltage value in sequence according to the information carried by the parallel data, so that the DC fan can operate according to the driving voltage value calculated by the circuit system 1. In this case, a DC fan with a rated voltage of 5 to 12 volts (V) can be used. The calculated driving voltage value does not exceed the working voltage value range of the DC fan. Therefore, the driving voltage value range of the motor of the DC fan transmitted by the fan power converter circuit 17 can be 4.0 to 15.0 volts (V); in addition, in this case, A preferred embodiment uses a DC fan with a rated voltage of 12 volts, and its operating voltage range is generally 10.8 to 13.2 volts (V). Therefore, the driving voltage value transmitted by the fan power converter circuit 17 to the fan motor 22 of the DC fan will be between 10.8 and 13.2 volts (V); in another embodiment, the present case uses a DC fan with a rated voltage of 5 volts, and its operating voltage range is generally 4.0 to 5.5 volts (V). Therefore, the driving voltage value transmitted by the fan power converter circuit 17 to the fan motor 22 of the DC fan will be between 4.0 and 5.5 volts (V).

In summary, the circuit system 1 of the present invention greatly improves the precision of the DC fan speed regulation circuit, while realizing low-cost design, and thus has good practical value, and combines the advantages of digital speed regulation and improves the shortcomings of the conventional step-down regulation circuit to meet the use needs of the industry. According to the above, it is only a preferred embodiment of the present invention, but the scope of rights claimed by the present invention is not limited thereto. According to the equivalent changes that can be easily thought of by those skilled in the art based on the technical content disclosed by the present invention, they should not deviate from the protection scope of the present invention.

[Knowledge] None [Invention] 1: Circuit system 11: Central processing unit 12: Parallel data generator circuit 13: Parallel data drive circuit 14: Ladder resistor network circuit 15: Current amplifier circuit 16: Linear variable resistor circuit 17: Fan power converter circuit 18: Fan speed detector 21: Fan power supply 22: Fan motor 501~511: Steps R1: First resistor R2: Second resistor R3: Third resistor R4: Fourth resistor R5: Fifth resistor R6: Sixth resistor R7: Seventh resistor R8: Eighth resistor R9: Ninth resistor R10: Tenth resistor R11: Eleventh resistor R12: Twelfth resistor R13: 13th resistor R14: 14th resistor R15: 15th resistor R16: 16th resistor Rup: upper resistor U1: first electronic component U2: second electronic component U3: third electronic component U4: fourth electronic component U5: fifth electronic component U6: sixth electronic component Q1: seventh electronic component L1: eighth electronic component

[Figure 1] is a hardware block diagram of the circuit system of the present invention; [Figure 2] is a circuit schematic diagram of the circuit system of the present invention; [Figure 3A] is an operation flow chart of the circuit system of the present invention; and [Figure 3B] is an operation flow chart of A-B of [Figure 3A] of the circuit system of the present invention.

1: Circuit system

11: Central Processing Unit

12: Parallel data generator circuit

13: Parallel data drive circuit

14: Ladder resistor network circuit

15: Current amplifier circuit

16: Linear variable resistance circuit

17: Fan power converter circuit

18: Fan speed detector

21: Fan power supply

22: Fan motor

Claims (10)

A circuit system capable of digitally regulating the speed of a DC fan is applied to a DC fan and comprises at least: a parallel data generator circuit, which receives a control data output from a central processing unit and generates a corresponding digital parallel data according to the content of the control data, wherein the parallel data generator circuit comprises a serial input/parallel output shift register; a ladder resistor network circuit, which is electrically connected to the parallel data generator circuit and can receive the parallel data and convert it into a corresponding analog current signal; a current amplifier circuit, which is electrically connected to the ladder resistor network circuit and can receive the parallel data and convert it into a corresponding analog current signal; The current signal is received and converted into a corresponding voltage signal, wherein the current amplifier circuit has only a single operational amplifier; a linear variable resistor circuit is electrically connected to the current amplifier circuit and can receive the voltage signal to generate a corresponding resistance signal according to the voltage signal; and a fan power converter circuit is electrically connected to a motor of the DC fan, the fan power converter circuit receives the resistance signal to generate a driving voltage value corresponding to the resistance signal, and transmits the driving voltage value to the motor of the DC fan, so that the motor of the DC fan operates according to the driving voltage value. The circuit system as described in claim 1 further includes a parallel data driving circuit, wherein the central processing unit generates a corresponding serial data according to the content of the control data, and the parallel data generator circuit receives the serial data output by the central processing unit, converts the serial data into the parallel data, and then transmits the parallel data to the parallel data driving circuit. As described in claim 2, the circuit system, when the circuit system switches from a power-off state to a power-on state by receiving power, can generate the maximum driving voltage value through the parallel data driving circuit to make the DC fan run at the highest speed; the central processing unit can also control the circuit system to turn off the fan power converter circuit to stop the DC fan from running. The circuit system as described in claim 1, wherein the linear variable resistance circuit is based on the characteristics of a metal oxide semiconductor field effect transistor or a field effect transistor to form a linearly changing resistance signal corresponding to the voltage signal. The circuit system as described in claim 1 further includes a fan speed detector, which is used to detect the current speed value of the fan and transmit it to the central processor. The central processor can collect the ambient temperature of the working environment of the DC fan to generate the corresponding control data and transmit it to the circuit system. Then, the DC fan adjusts the fan speed according to the driving voltage value generated by the circuit system. The circuit system as described in claim 2, wherein the ladder resistor network circuit includes a plurality of ladder resistor groups, each of which is an R-2R resistor network, and at least one ladder resistor group can be formed by three resistors with two different resistance values, which are a driving resistor, a jumper resistor and a voltage divider resistor, and one end of the driving resistor, the jumper resistor and the voltage divider resistor can be connected to each other, and the other ends of the driving resistor, the jumper resistor and the voltage divider resistor are not connected to each other. A circuit system as described in claim 6, wherein the driving resistor is directly electrically connected to the parallel data driving circuit, and its resistance value is twice the resistance value of the jumper resistor, the jumper resistor can be bridged between the driving resistor and another driving resistor of another ladder resistor group, and the voltage divider resistor is connected in parallel with the lowest bit resistor of the parallel data driving circuit. A circuit system as described in claim 1, wherein the specification of the DC fan is a 5V to 12V DC fan. A circuit system as described in claim 8, wherein the driving voltage value transmitted by the fan power converter circuit to the motor of the DC fan can range from 4.0 volts to 15.0 volts. A circuit system as described in claim 8, wherein the driving voltage value transmitted by the fan power converter circuit to the motor of the DC fan can range from 10.8 volts to 13.2 volts.

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