TWI842306B - Parallel connection carrier for semiconductor device - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 96
- 230000017525 heat dissipation Effects 0.000 abstract description 16
- 239000000969 carrier Substances 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Abstract
Description
本發明係有關一種半導體元件並接載體,係用於裝載複數個半導體元件,並使得該等半導體元件並接於一電路板。The present invention relates to a semiconductor element parallel connection carrier, which is used to load a plurality of semiconductor elements and enable the semiconductor elements to be parallel connected to a circuit board.
習用技術中,常使用的半導體元件MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor,簡稱MOS)於高頻高功率的使用狀態下,易有溫度過高而造成損毀的問題,因此所述半導體元件需帶有散熱結構,也常透過並接來達成必要的散熱需求。In common technology, the commonly used semiconductor element MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor, abbreviated as MOS) is prone to overheating and damage under high-frequency and high-power conditions. Therefore, the semiconductor element needs to have a heat dissipation structure and is often connected in parallel to achieve the necessary heat dissipation requirements.
請參閱第8圖,該半導體元件6並接係常採用平躺或併排的方式,這樣的並接方式也造成了下列之問題:
1、 複數個該半導體元件6一併平躺或併排時,占用了大量平面面積,因此整體所需空間較大。
2、 該等半導體元件6的布局(LAYOUT)走線長度不均,尤其在並聯時,甚至有交錯的狀況,而走線交錯時,便會產生訊號重疊、干擾。
3、 若需避免走線太長,便需將該等半導體元件6的引腳61靠近,但這樣的排列則會使得熱源過於集中,熱源分配不均勻便直接導致散熱不佳,尤其在該等半導體元件6使用的功率不同時,若散熱不佳便使得功率較高的該半導體元件6優先損壞,並在之後因為電路失衡,原本在損壞的該半導體元件6的電路轉移至其他該等半導體元件6,接續造成其他該等半導體元件6重載不堪負荷而逐一損壞。
Please refer to Figure 8. The
如此,習用的並接配置導致了配線、散熱不良的各種問題,使電器效果不佳。Thus, the commonly used parallel connection configuration leads to various problems such as poor wiring and heat dissipation, resulting in poor electrical performance.
因考量能達到最佳的電器效果,將欲並接的半導體元件透過一載體支撐,該載體可使得每個半導體元件採同向且放射狀排列,以騰出更多的空間散熱,進而改善散熱問題,也透過其排列方式使每個半導體元件的引腳朝同一位置集中,改善配線問題,如此手段為本發明半導體元件並接載體之解決方案。In order to achieve the best electrical effect, the semiconductor components to be connected in parallel are supported by a carrier. The carrier can arrange each semiconductor component in the same direction and radially to free up more space for heat dissipation, thereby improving the heat dissipation problem. The arrangement method also allows the pins of each semiconductor component to be concentrated at the same position, improving the wiring problem. This method is the solution to the semiconductor component connection carrier of the present invention.
本發明之半導體元件並接載體,包含一基座與至少一承載組件,該基座係具有一電路板組合部,該承載組件係立設於該基座的外側,該承載組件包含複數個承載塊,各該承載塊具有一基座固定面與一半導體元件固定面,該基座固定面與該半導體元件固定面相鄰,該基座固定面係用於固設於該基座,使該半導體元件固定面直立於該基座的外側,又該等承載塊係以一靠近該電路板組合部的端點為中心採放射狀排列,並且該等承載塊的該半導體元件固定面皆朝同一順時針或逆時針方向,使每相鄰的兩個該半導體元件固定面之間形成有一夾角。藉之,該等半導體元件固定面皆用於固設一半導體元件,由於該等半導體元件固定面皆直立且採放射狀排列於該基座的外側,以騰出立體空間可提供空氣流通,增加該等承載塊與空氣接觸的面積,以提供該等半導體元件良好的散熱環境;另外,該等承載塊的該半導體元件固定面皆朝同一順時針或逆時針方向,該等半導體元件的配線位置可一併朝向該端點集中,因此,該等半導體元件的該引腳的配線位置皆能夠以相同順序對應排列,當該等半導體元件進行並聯時,能縮減配線長度並避免配線交錯設置。The semiconductor component parallel carrier of the present invention comprises a base and at least one supporting assembly, wherein the base has a circuit board assembly portion, the supporting assembly is erected on the outer side of the base, and the supporting assembly comprises a plurality of supporting blocks, each of which has a base fixing surface and a semiconductor component fixing surface, the base fixing surface and the semiconductor component fixing surface are adjacent, the base fixing surface is used to be fixed to the base so that the semiconductor component fixing surface stands upright on the outer side of the base, and the supporting blocks are radially arranged with an end point close to the circuit board assembly portion as the center, and the semiconductor component fixing surfaces of the supporting blocks are all facing the same clockwise or counterclockwise direction, so that an angle is formed between each two adjacent semiconductor component fixing surfaces. The semiconductor component fixing surfaces are used to fix semiconductor components. Since the semiconductor component fixing surfaces are upright and radially arranged on the outer side of the base, three-dimensional space is freed up to provide air circulation, increasing the area of the support blocks in contact with the air, so as to provide a good heat dissipation environment for the semiconductor components. In addition, the semiconductor component fixing surfaces of the support blocks are all facing the same clockwise or counterclockwise direction, and the wiring positions of the semiconductor components can be concentrated toward the end point. Therefore, the wiring positions of the pins of the semiconductor components can be arranged in the same order. When the semiconductor components are connected in parallel, the wiring length can be shortened and the wiring can be avoided from being staggered.
於一較佳實施例中,該夾角係小於180°。In a preferred embodiment, the angle is less than 180°.
於一較佳實施例中,該基座在靠近該電路板組合部的一面具有一槽道。In a preferred embodiment, the base has a groove on a side close to the circuit board assembly portion.
於一較佳實施例中,該基座在遠離該電路板組合部的一面固設有一散熱元件。In a preferred embodiment, a heat sink is fixedly mounted on a side of the base away from the circuit board assembly.
於一較佳實施例中,該電路板組合部係凸出於該基座的表面,該電路板組合部具有一凹槽。In a preferred embodiment, the circuit board assembly portion protrudes from the surface of the base, and the circuit board assembly portion has a groove.
於一較佳實施例中,該基座與該承載組件係為一體成型。In a preferred embodiment, the base and the supporting assembly are integrally formed.
於一較佳實施例中,該基座具有一內本體與二外本體,該等外本體係分別位在該內本體兩個相對的外側,該承載組件係立設於各該外本體的外側。In a preferred embodiment, the base has an inner body and two outer bodies, the outer bodies are respectively located at two opposite outer sides of the inner body, and the supporting assembly is erected on the outer side of each of the outer bodies.
於一較佳實施例中,該基座具有一內本體與二外本體,該等外本體係分別位在該內本體兩個相對的外側,該內本體與該外本體係為一體成型,而該等承載塊皆為可拆式地鎖固在該外本體外側。In a preferred embodiment, the base has an inner body and two outer bodies, the outer bodies are respectively located on two opposite outer sides of the inner body, the inner body and the outer body are integrally formed, and the supporting blocks are detachably locked on the outer sides of the outer bodies.
於一較佳實施例中,該基座具有一內本體與二外本體,該等外本體係分別位在該內本體兩個相對的外側,各該外本體係切分成數等分,每一等分的該外本體係設有一組該承載組件,該等承載組件與對應的該外本體一體成型,而每一等分的該外本體係可拆式地鎖固在該內本體外側。In a preferred embodiment, the base has an inner body and two outer bodies, the outer bodies are respectively located on two opposite outer sides of the inner body, each of the outer bodies is cut into several equal parts, each of the outer bodies is provided with a set of supporting components, the supporting components are integrally formed with the corresponding outer bodies, and each of the outer bodies is detachably locked to the outer side of the inner body.
如本文所用,描述元件名稱的「頂」、「底」、「前」、「後」、「左」、「右」、「側」之用語,係協助對照各板狀結構之間的位置關係,實際產品結構的方向會隨著擺放角度或使用者所在位置的對應關係而改變,亦不能因此限定本文所均等涵蓋的範圍。As used herein, the terms "top", "bottom", "front", "back", "left", "right", and "side" used to describe component names are used to help compare the positional relationships between the various plate-like structures. The direction of the actual product structure will change with the placement angle or the corresponding relationship of the user's position, and the scope of equal coverage of this article cannot be limited thereby.
如本文所用,描述結構位置的「內側」之用語,係指靠近結構本體的中心位置,或使用上非外露的位置;「向內」之用語,係指朝向靠近結構本體的中心位置,或朝向使用上非外露的位置;「外側」之用語,係指遠離結構本體的中心位置,或使用上外露的位置。As used herein, the term "inside" describing a structural position refers to a position close to the center of the structural body, or a position that is not exposed during use; the term "inward" refers to a position close to the center of the structural body, or a position that is not exposed during use; and the term "outside" refers to a position away from the center of the structural body, or a position that is exposed during use.
如本文所用,描述結構位置的「遠離」之用語,係指兩個目標結構之間較遠距離的位置;「靠近」之用語,係指兩個目標結構之間較近距離的位置。As used herein, the term "distant" to describe the location of structures refers to a location that is farther away from the two target structures; the term "close" refers to a location that is closer to the two target structures.
本文所使用的「約」一詞實質上代表所述之數值或範圍位於20%以內,較佳為於10%以內,以及更佳者為於5%以內。於本文所提供之數字化的量為近似值,意旨若術語「約」沒有被使用時亦可被推得。The term "about" as used herein substantially represents that the numerical value or range described is within 20%, preferably within 10%, and more preferably within 5%. The numerical quantities provided herein are approximate values, which means that they can be inferred even if the term "about" is not used.
如本文所用,描述結構組合關係的「凹設」、「形成」或「一體成型」之用語,泛指其中一個結構或多個結構在製造時結合成同一個本體,或是同一個本體上由於不同位置、形狀與功能所產生的對應結構者。As used herein, the terms "recessed", "formed" or "integrally formed" to describe the structural combination relationship generally refer to one or more structures being combined into the same body during manufacturing, or corresponding structures generated on the same body due to different positions, shapes and functions.
如本文所用,描述結構組合關係的「固設」或「設置」之用語,泛指多個結構在組合後不會輕易的分離或掉落,可以是固定連接,也可以是可拆式地連接、一體成型地連接、機械連接、電連接,或是直接的物理相連,亦也可以通過中間媒介間接相連,例如:使用螺紋、卡榫、快拆件、扣具、釘子、黏著劑、電銲或高週波任一方式結合者。As used herein, the term "fixed" or "set" to describe the structural combination relationship generally refers to multiple structures that will not be easily separated or dropped after being assembled. It can be a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, or a direct physical connection. It can also be indirectly connected through an intermediate medium, for example: using any combination of threads, latches, quick release parts, fasteners, nails, adhesives, electric welding or high frequency.
有關於本發明其他技術內容、特點與功效,在以下配合參考圖式之較佳實施例的詳細說明中,將可清楚的呈現。Other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of the preferred embodiments with reference to the drawings.
請參閱第1圖,如圖中所示,其係為本發明所列第一實施例,本實施例至少包含一基座1、一組或一組以上的承載組件2、複數個固定於該承載組件2上並接的半導體元件3與一用於各該半導體元件3降溫用途的散熱元件4,該基座1用於組裝一電路板5,以供各該半導體元件3走線布局。Please refer to FIG. 1, as shown in the figure, it is the first embodiment of the present invention. This embodiment at least includes a
請參閱第1~3圖,於第一實施例中,該基座1具有一內本體11與分別位在該內本體11前後兩側的一外本體12,而各該外本體12的頂面凸出有一電路板組合部121,該電路板組合部121係鎖固該電路板5,該電路板組合部121具有一凹槽122,又前後兩側的該外本體12的外側皆具有兩組的該承載組件2,各該承載組件2包含兩個承載塊21,各該承載塊21具有一基座固定面211與一半導體元件固定面212,該基座固定面211與該半導體元件固定面212相鄰,該基座固定面211係固設於該外本體12的外側,使該半導體元件固定面212直立於該外本體12的外側,又兩個該承載塊21係以一靠近該電路板組合部121的端點P為中心平均地採放射狀排列,並且兩個該承載塊21的該半導體元件固定面212皆朝同一順時針或逆時針方向(如第2圖為逆時針方向),使相鄰的兩個該半導體元件固定面21之間的該夾角A1約為60°,兩個該承載塊21的該半導體元件固定面212又分別與該內本體11頂面之間的夾角A2約為60°,使得兩個該承載塊21分別傾斜的位於該外本體12的外側,這樣的角度配置可使得兩個該承載塊21之間的間距不會過於窄小,也可讓該承載組件2的最大寬度不會過寬,在該外本體12的同一外側具有兩組的該承載組件2時,其可縮減其間距,進一步減少該外本體12甚至是整體結構的體積。Please refer to Figures 1 to 3. In the first embodiment, the
請參閱第1~3圖,在第一實施例中,每一組該承載組件2包含兩個該承載塊21,而兩個該承載塊21的該半導體元件固定面212皆係用於鎖固一個該半導體元件3,以將同一組該承載組件2上所鎖固的該等半導體元件3並接,所述之半導體元件3係為MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor),其具有一發熱面31與一用於相接於該電路板5的引腳32,該發熱面31係與該半導體元件固定面212貼合,並使得該等半導體元件3的該引腳32可一併朝向該端點P集中,由於該等半導體元件固定面212皆朝同一方向,因此,該等半導體元件3的該引腳32的配線位置皆能夠以相同順序對應排列,當該等半導體元件3進行並聯時,能縮減配線長度並避免配線交錯設置。Referring to FIGS. 1 to 3 , in the first embodiment, each set of the
請參閱第4圖,該半導體元件3係透過鎖固(如螺絲)的方式組裝在各該承載塊21上,在使用手工具(如螺絲起子)鎖固時,手工具的最佳施力角度係與各該半導體元件固定面212垂直,而放射狀排列的各該承載塊21可使得各該半導體元件固定面212朝向不同的方向,因此可以避免手工具在施力時,不會被相鄰的任一個該承載塊21所完全阻擋,可以採利於施力的角度操作,而各該承載塊21在遠離各該半導體元件固定面212的一面上可形成有一缺口213,各該缺口213可供手工具操作時有更多的空間,能使操作更靈活,提高鎖固效率。Please refer to FIG. 4 . The
請參閱第2~3圖,該半導體元件3的該發熱面31係與該半導體元件固定面212貼合,以利於將該半導體元件3運作時產生的熱能依序通過該發熱面31、該半導體元件固定面212、該承載塊21傳導至該基座1再進行散熱,於第一實施例中,該內本體11的頂面與兩個該外本體12的內側面之間具有一槽道13,又該內本體11的底面鎖固有該散熱元件4,該槽道13連同該凹槽122係可提供空氣流通,且增加與空氣接觸的面積,因此該槽道13、該凹槽122與該散熱元件4分別於該內本體11的頂面與底面配置成良好的散熱環境;此外,該槽道13與該凹槽122亦可用於容置該電路板5上的其他電子元件或走線(圖未示)。Referring to FIGS. 2-3 , the
請參閱第1、3圖,所述之散熱元件4可以是散熱鰭片、均溫板、水冷裝置或其他熱交換裝置,其位於該內本體11的底面可快速地釋放該半導體元件3產生的熱能。Please refer to FIGS. 1 and 3 , the
請參閱第1圖,於第一實施例中,該內本體11、該外本體12與承載組件2係為一體成型,係採用利於導熱的材質(如金屬,鋁或銅…等),如此一來,因各部位結構沒有接縫,使整體導熱效果較佳。Please refer to FIG. 1 . In the first embodiment, the
為了因應各種可能的配置,以提供更多元的需求,本發明可以設計為不同的態樣,以下分別以更多個實施例列舉。In order to cope with various possible configurations and provide more diverse requirements, the present invention can be designed in different aspects, and more embodiments are listed below.
請參閱第5圖,係為第二實施例,在本實施例中,同一側的該外本體12外側具有兩組的該承載組件2,同一組的該承載組件2包含四個承載塊21,四個該承載塊21同樣係以靠近該電路板組合部121的端點P為中心採放射狀排列,並且四個該承載塊21的該半導體元件固定面212皆朝同一順時針或逆時針方向,使相鄰的該等半導體元件固定面21之間的夾角A3皆約為60°,其中,最靠近該電路板組合部121兩個該承載塊21的導體固定面21係為水平放置(相當於平行各該外本體12頂面),而位於中間的兩個該承載塊21的導體固定面21則分別傾斜設置。Please refer to FIG. 5, which is a second embodiment. In this embodiment, the outer side of the
請參閱第6圖,係為第三實施例,在本實施例中,該基座1的該內本體11與該外本體12係為一體成型,而該等承載塊21皆為可拆式地鎖固在該外本體12外側,且在該外本體12外側凹設有複數個導引槽123,該導引槽123係與該承載塊21所設的數量、角度以及位置相同,並且該等導引槽123皆具有一開口124,該等開口124皆位於該外本體12邊緣,使得該等承載塊21皆可依循該等導引槽123的該開口124嵌入至預定位置後再組裝,因此該導引槽123可限制該承載塊21維持在所設的角度,可便於組裝時定位,這樣一來,該等承載塊21係與該基座1分開製造,由於該等承載塊21的形狀、尺寸與結構皆相同,可方便批量製造後再逐一組裝於該基座1,可有效降低製造成本。Please refer to FIG. 6, which is a third embodiment. In this embodiment, the
請參閱第7圖,係為第四實施例,在本實施例中,該外本體12切分的份量係依照該等承載組件2的數量與位置而分配,即若同一側的該外本體12外側具有兩組的該承載組件2,則該外本體12係切分成兩等分,每一等分的該外本體12係設有一組該承載組件2,各該承載組件2與對應的該外本體12一體成型,而該等外本體12皆為可拆式地鎖固在該內本體11前後側,由於數等分的該外本體12係與該等承載組件2所配置的形狀、尺寸與結構相同或對稱,可方便批量製造後再逐一組裝於該內本體11,亦可有效降低製造成本。Please refer to Figure 7, which is the fourth embodiment. In this embodiment, the amount of the
在本發明所展示的各個實施例中,各個結構在需要組裝時,主要係使用螺紋鎖固的方式,而實際上,各個結構之間也可以是其他任何方式進行固設而結合。In each embodiment of the present invention, each structure is mainly assembled by thread locking. In fact, each structure can also be fixed and combined by any other method.
上述之實施例揭露,僅是本發明部分較佳的實施例選擇,然其並非用以限定本發明,任何熟悉此一技術領域具有通常知識者,在瞭解本發明前述的技術特徵及實施例,並在不脫離本發明之精神和範圍內所做的均等變化或潤飾,仍屬本發明涵蓋之範圍,而本發明之專利保護範圍須視本說明書所附之請求項所界定者為準。The above-mentioned embodiments are only some of the preferred embodiments of the present invention, but they are not used to limit the present invention. Any person familiar with this technical field with common knowledge, after understanding the above-mentioned technical features and embodiments of the present invention, and making equivalent changes or modifications without departing from the spirit and scope of the present invention, still falls within the scope of the present invention, and the scope of patent protection of the present invention shall be defined by the claim items attached to this specification.
1:基座 11:內本體 12:外本體 121:電路板固定面 122:凹槽 123:導引槽 124:開口 13:槽道 2:承載組件 21:承載塊 211:基座固定面 212:半導體元件固定面 213:缺口 3:半導體元件 31:發熱面 32:引腳 4:散熱元件 5:電路板 6:半導體元件 61:引腳 A1:夾角 A2:夾角 A3:夾角 P:端點 1: Base 11: Inner body 12: Outer body 121: Circuit board fixing surface 122: Groove 123: Guide groove 124: Opening 13: Channel 2: Carrying component 21: Carrying block 211: Base fixing surface 212: Semiconductor component fixing surface 213: Notch 3: Semiconductor component 31: Heat generating surface 32: Lead 4: Heat dissipation component 5: Circuit board 6: Semiconductor component 61: Lead A1: Angle A2: Angle A3: Angle P: End point
[第1圖]係本發明半導體元件並接載體及電路板之第一實施例結構立體分解示意圖。 [第2圖]係本發明半導體元件並接載體及電路板之第一實施例結構前視示意圖。 [第3圖]係本發明半導體元件並接載體及電路板之第一實施例結構右側局部示意圖。 [第4圖]係本發明承載組件與半導體元件之第一實施例結構前視局部示意圖。 [第5圖]係本發明半導體元件並接載體及電路板之第二實施例結構前視示意圖。 [第6圖]係本發明半導體元件並接載體之第三實施例結構立體分解示意圖。 [第7圖]係本發明半導體元件並接載體之第四實施例結構立體分解示意圖。 [第8圖]係習用半導體元件平躺或併排的方式並接示意圖。 [Figure 1] is a schematic diagram of a three-dimensional exploded structure of the first embodiment of the semiconductor element of the present invention, which is connected to the carrier and the circuit board. [Figure 2] is a schematic diagram of a front view of the first embodiment of the semiconductor element of the present invention, which is connected to the carrier and the circuit board. [Figure 3] is a partial schematic diagram of the right side of the first embodiment of the semiconductor element of the present invention, which is connected to the carrier and the circuit board. [Figure 4] is a partial schematic diagram of the front view of the first embodiment of the carrier assembly and the semiconductor element of the present invention. [Figure 5] is a schematic diagram of a front view of the second embodiment of the semiconductor element of the present invention, which is connected to the carrier and the circuit board. [Figure 6] is a schematic diagram of a three-dimensional exploded structure of the third embodiment of the semiconductor element of the present invention, which is connected to the carrier. [Figure 7] is a schematic diagram of a three-dimensional exploded structure of the fourth embodiment of the semiconductor element of the present invention, which is connected to the carrier. [Figure 8] is a schematic diagram of connecting semiconductor components in a flat or parallel manner.
1:基座 1: Base
11:內本體 11: Inner Being
12:外本體 12: External body
121:電路板固定面 121: Circuit board fixing surface
122:凹槽 122: Groove
13:槽道 13: Groove
2:承載組件 2: Carrying components
3:半導體元件 3: Semiconductor components
4:散熱元件 4: Heat dissipation element
5:電路板 5: Circuit board
Claims (10)
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TW111150557A TWI842306B (en) | 2022-12-29 | 2022-12-29 | Parallel connection carrier for semiconductor device |
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TW202427653A TW202427653A (en) | 2024-07-01 |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201208156A (en) * | 2010-05-20 | 2012-02-16 | Ind Tech Res Inst | Light emitting diode package, light emitting diode module, and light emitting diode lamp |
TW201411048A (en) * | 2012-09-04 | 2014-03-16 | Formosa Epitaxy Inc | Light emission device |
TWM498276U (en) * | 2013-10-22 | 2015-04-01 | Formosa Epitaxy Inc | Illuminating device |
TW201513805A (en) * | 2011-11-21 | 2015-04-16 | Chang Guang Technology Co Ltd | Integrated illumination part and lead frame thereof for umbrella |
TW201910781A (en) * | 2017-08-15 | 2019-03-16 | 旺矽科技股份有限公司 | Coaxial Probe Card Device |
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201208156A (en) * | 2010-05-20 | 2012-02-16 | Ind Tech Res Inst | Light emitting diode package, light emitting diode module, and light emitting diode lamp |
TW201513805A (en) * | 2011-11-21 | 2015-04-16 | Chang Guang Technology Co Ltd | Integrated illumination part and lead frame thereof for umbrella |
TW201411048A (en) * | 2012-09-04 | 2014-03-16 | Formosa Epitaxy Inc | Light emission device |
TWM498276U (en) * | 2013-10-22 | 2015-04-01 | Formosa Epitaxy Inc | Illuminating device |
TW201910781A (en) * | 2017-08-15 | 2019-03-16 | 旺矽科技股份有限公司 | Coaxial Probe Card Device |
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