TWI838381B - Substrate processing method and substrate processing device - Google Patents

Abstract

[Topic] When a COR process and a heat process are repeatedly performed on the same substrate in a substrate processing device, the repeated process can be performed efficiently. [Solution] A substrate processing method is a substrate processing method for processing a substrate using a substrate processing device, wherein the substrate processing device comprises: a COR module for performing a COR process on the substrate; a heating module for performing a heat process on the substrate; a cooling module for performing a cooling process on the substrate; the substrate processing method comprises: a COR process step for performing a COR process on the substrate in a reduced pressure atmosphere in the COR module; Thereafter, the substrate is transferred to the heating module, where the substrate is subjected to a heating treatment process in a reduced pressure atmosphere; and thereafter, the substrate is transferred to the cooling module, where the substrate is subjected to a cooling treatment process in an atmospheric atmosphere; and the treatment cycle including the COR treatment process, the heating treatment process and the cooling treatment process is repeated on the same substrate.

Description

Substrate processing method and substrate processing device

The present disclosure relates to a substrate processing method and a substrate processing apparatus.

The gas processing device disclosed in Patent Document 1 has two loading lock chambers adjacent to the loading and unloading section, a PHT processing device adjacent to each loading lock chamber, and a COR processing device adjacent to each PHT processing device. According to the gas processing device described in Patent Document 1, a plurality of wafers are continuously transported to each processing device and controlled by instructions from a process controller. [Prior Art Document] [Patent Document]

[Patent Document 1] Japanese Patent Application No. 2008-160000

[The problem that the invention wants to solve]

The technology disclosed herein is related to effectively performing repeated COR processing and heat processing on the same substrate in a substrate processing device. [Means for Solving the Problem]

One aspect of the present disclosure is a substrate processing method for processing a substrate using a substrate processing device, wherein the substrate processing device comprises: a COR module for performing COR processing on the substrate; a heating module for performing heating processing on the substrate; and a cooling module for performing cooling processing on the substrate; the substrate processing method comprises: a COR processing step for performing COR processing on the substrate in a reduced pressure atmosphere in the COR module; After that, the substrate is transferred to the heating module, and the substrate is heated in a reduced pressure atmosphere in the heating module; and then, the substrate is transferred to the cooling module, and the substrate is cooled in an atmospheric atmosphere in the cooling module; the same substrate is repeatedly subjected to a treatment cycle including the COR treatment process, the heating treatment process, and the cooling treatment process. [Effect of the invention]

According to the present disclosure, when a COR process and a heat treatment are repeatedly performed on the same substrate in a substrate processing apparatus, the repeated processes can be performed efficiently.

In the process of manufacturing semiconductor devices, a processing module containing semiconductor wafers (hereinafter referred to as "wafers") is placed in a depressurized state, and the wafers are subjected to various processing steps such as prescribed processing. These processing steps are performed, for example, using a substrate processing device in which a plurality of processing modules are arranged around a common transfer module.

The above-mentioned treatment performed by the substrate processing device is a method disclosed in Patent Document 1, for example, COR (Chemical Oxide Removal) treatment or PHT (Post Heat Treatment) treatment. COR treatment is a treatment in which an oxide film formed on a wafer reacts with a processing gas. PHT treatment is a heat treatment in which a product generated in the COR treatment is heated to vaporize. By continuously performing the COR treatment and the PHT treatment, the oxide film formed on the wafer is etched.

However, COR processing may be performed in a low temperature environment (e.g., about 20°C). When COR processing is performed in such a low temperature environment, the thickness that can be etched by one COR processing is limited. Therefore, in order to achieve the expected etching thickness, COR processing and PHT processing may be repeated multiple times on the same wafer.

Furthermore, when the treatment is repeated in this way, in order to perform COR treatment in a low temperature environment again on the wafer that has been heated in the PHT treatment, the heated wafer needs to be cooled and then transferred to the COR module for COR treatment. Hereinafter, the cooling treatment of the wafer is referred to as "CST (Cooling Storage) treatment". In this case, from the perspective of cooling efficiency, the CST module for cooling the wafer is configured under atmospheric pressure.

As described above, there is a case where a processing cycle consisting of a COR process, a PHT process, and a CST process is required to be repeated. However, conventional techniques do not consider how to perform this repeated cycle efficiently.

Here, the technology disclosed in the present invention is to effectively perform the repeated processing of COR processing, PHT processing, etc. in a substrate processing device. Specifically, the processing cycle to be implemented multiple times is performed in one substrate processing device without crossing multiple devices. In addition, in the substrate processing device, multiple wafer transfers are performed multiple times in multiple modules, so-called multiple round trip transfers, to achieve multiple processing cycles.

Hereinafter, the structure of the substrate processing apparatus of the present embodiment will be described with reference to the drawings. In addition, in this specification, the same symbols are attached to the elements having substantially the same functional structure, and repeated description is omitted.

<Substrate processing device> Figure 1 is a plan view showing a schematic structure of the substrate processing device of this embodiment. In this embodiment, the substrate processing device 1 has various processing modules for performing COR processing, PHT processing, and CST processing on a wafer W as a substrate. In addition, the module structure of the substrate processing device disclosed in the present invention is not limited to this and can be arbitrarily selected.

The substrate processing apparatus 1 shown in FIG1 has an atmosphere section 10 and a decompression section 11 connected to form an integrated structure via load lock modules 20a and 20b. The atmosphere section 10 has a plurality of atmosphere modules for performing predetermined processing on the wafer W in an atmospheric pressure atmosphere. The decompression section 11 has a plurality of decompression modules for performing predetermined processing on the wafer W in a decompression atmosphere.

The load lock module 20a is used to temporarily hold the wafer W transferred from the load module 30 described later in the atmosphere section 10 to the transfer module 40 described later in the depressurization section 11. The load lock module 20a has an upper stocker 21a and a lower stocker 21b for holding two wafers W in a stacked manner.

Furthermore, the loading lock module 20a is connected to the loading module 30 described later via a gate 22b provided with a gate valve 22a. The gate valve 22a is used to ensure the airtightness between the loading lock module 20a and the loading module 30 and to provide mutual communication. Furthermore, the loading lock module 20a is connected to the transmission module 40 described later via a gate 23b provided with a gate valve 23a. The gate valve 23a is used to ensure the airtightness between the loading lock module 20a and the transmission module 40 and to provide mutual communication.

Furthermore, the load lock module 20a is connected to an air supply unit (not shown) for supplying gas and an exhaust unit (not shown) for exhausting gas, so that the inside can be switched between atmospheric pressure atmosphere and reduced pressure atmosphere by the air supply unit and the exhaust unit. That is, the load lock module 20a is configured to properly transfer the wafer W between the atmospheric pressure atmosphere of the atmospheric unit 10 and the reduced pressure atmosphere of the reduced pressure unit 11.

The loading and locking module 20b has the same structure as the loading and locking module 20a, that is, the loading and locking module 20b has an upper storage device 24a and a lower storage device 24b, a gate 25a and a gate 25b on the loading module 30 side, and a gate 26a and a gate 26b on the conveying module 40 side.

The atmospheric section 10 has: a loading module 30 with a wafer transfer mechanism (not shown); a loading port 32 for loading a wafer transfer box (FOUP (Front Opening Unified Pod)) 31 that can store a plurality of wafers W; a CST module 33 for cooling the wafers W; and an orientation module 34 for adjusting the horizontal direction of the wafers W.

The loading module 30 is formed by a frame having a rectangular interior, and the interior of the frame is maintained in an atmospheric pressure atmosphere. A plurality of loading ports 32, for example, three loading ports, are provided on one side of the long side of the frame constituting the loading module 30. Loading locking modules 20a, 20b and a CST module 33 are provided on the other side of the long side of the frame constituting the loading module 30. An orientation module 34 is provided on one side of the short side of the frame constituting the loading module 30. In addition, the configuration or number of the CST module 33 and the orientation module 34 is not limited to this embodiment and can be arbitrarily designed. In addition, the loading module 30 has a wafer transfer mechanism (not shown) that can move in the long side direction inside the frame. The wafer transfer mechanism can transfer wafers W between the wafer cassette 31 placed on the loading port 32, the load lock modules 20a and 20b, the CST module 33, and the orientation module 34. The structure of the wafer transfer mechanism is the same as that of the wafer transfer mechanism 50 described later.

The wafer cassette 31 stores a plurality of wafers W, for example, 25 wafers in a batch, in a stacked manner at equal intervals. The interior of the wafer cassette 31 placed on the loading port 32 is filled with air or nitrogen gas, for example, and is sealed.

The CST module 33 is adjacent to the loading lock module 20b and is connected to the loading module 30. The CST module 33 can store a plurality of wafers W, for example, more than the number of wafers stored in the wafer transfer box 31, in a multi-stage stacking manner at equal intervals, and cool the plurality of wafers W. Specifically, the CST module 33 cools the wafers W that have been heated in the PHT module 42 described later.

The orientation module 34 rotates the wafer W to adjust the horizontal direction. Specifically, the orientation module 34 adjusts the horizontal direction to the same direction as the reference position (eg, the groove position) in each cycle of the process cycle when the process cycle described below is repeated.

The decompression unit 11 includes a conveying module 40 for simultaneously conveying two wafers W, a COR module 41 for performing a COR process on the wafers W conveyed from the conveying module 40, and a PHT module 42 for performing a PHT process. The conveying module 40, the COR module 41, and the PHT module 42 are each maintained in a decompression atmosphere.

In the depressurization section 11, a series of processes are sequentially performed on the wafer W, which are COR process and PHT process in this embodiment. A COR module 41 and a PHT module 42 performing the series of processes constitute a "depressurization module group", that is, a series of processes are performed by a depressurization module group in the depressurization section 11.

In the present embodiment, a plurality of the above-mentioned pressure reducing module groups, for example, three, are arranged in the transmission module 40 along the long side direction of the transmission module 40. In the following description, the three pressure reducing module groups are sequentially set as pressure reducing module groups A, B, and C from the side of the atmosphere portion 10. In addition, the COR modules and PHT modules constituting the pressure reducing module groups A, B, and C are respectively set as COR modules 41A, 41B, and 41C and PHT modules 42A, 42B, and 42C. In addition, the combination of the COR module 41 and the PHT module 42 constituting the pressure reducing module group can be set arbitrarily. For example, as in the second embodiment described later, the pressure reducing module group Ba can also be constituted by the COR module 41B and the PHT module 42A.

The transfer module 40 is formed of a rectangular frame, and transfers the wafer W that has been loaded into the loading and locking module 20a to a decompression module group to sequentially perform COR processing and PHT processing, and then is transferred out to the atmosphere section 10 through the loading and locking module 20b.

Two stations 43a and 43b are provided inside the COR module 41 for placing two wafers W in parallel in the horizontal direction. The COR module 41 performs COR processing on two wafers W simultaneously by placing the wafers W in parallel on the stations 43a and 43b. In addition, the COR module 41 is connected to a gas supply unit (not shown) for supplying processing gas or purification gas, etc. and an exhaust unit (not shown) for exhausting gas.

Two stations 44a and 44b are provided inside the PHT module 42 for placing two wafers W in parallel in a horizontal direction. The PHT module 42 performs PHT processing on two wafers W simultaneously by placing the wafers W in parallel on the stations 44a and 44b. In addition, the PHT module 42 is connected to a gas supply unit (not shown) for supplying gas and an exhaust unit (not shown) for exhausting gas.

A wafer transfer mechanism 50 for transferring wafers W is provided inside the transfer module 40. The wafer transfer mechanism 50 includes transfer arms 51a and 51b for holding and moving two wafers W in an overlapping manner, a rotating table 52 for rotatably supporting the transfer arms 51a and 51b, and a rotating mounting table 53 on which the rotating table 52 is mounted. Furthermore, a guide rail 54 extending in the long side direction of the transfer module 40 is provided inside the transfer module 40. The rotating mounting table 53 is provided on the guide rail 54, and is configured so that the wafer transfer mechanism 50 can move along the guide rail 54.

The transmission module 40 is connected to the loading lock modules 20a and 20b via the gate valves 23a and 26a as described above. In addition, the transmission module 40 is connected to the COR module 41 via the gate 55b provided with the gate valve 55a. The gate valve 55a is used to ensure the airtightness between the transmission module 40 and the COR module 41 and to connect them to each other. In addition, the transmission module 40 is connected to the PHT module 42 via the gate 56b provided with the gate valve 56a. The gate valve 56a is used to ensure the airtightness between the transmission module 40 and the PHT module 42 and to connect them to each other.

In the transfer module 40, the two wafers W held in an overlapping manner in the upper storage device 21a and the lower storage device 21b in the load lock module 20a are also received in an overlapping manner in the transfer arm 51a and transferred to the COR module 41. In addition, the two wafers W that have been subjected to the COR process are held in an overlapping manner by the transfer arm 51a and transferred to the PHT module 42. In addition, the two wafers W that have been subjected to the PHT process are held in an overlapping manner by the transfer arm 51b and are transferred to the load lock module 20b.

The above substrate processing device 1 is provided with a control unit 60. The control unit 60 is, for example, a computer, and has a program storage unit (not shown). The program storage unit stores a program for controlling the processing of the wafer W in the substrate processing device 1. In addition, the program storage unit stores a control program for controlling various processing by a processor, or a program for transporting the wafer W to each component of the substrate processing device 1 corresponding to the processing conditions, that is, a transport recipe. In addition, the above program can be recorded in a computer-readable storage medium, or installed in the control unit 60 from the storage medium.

<First embodiment> The substrate processing device 1 of this embodiment is constructed as described above. Next, the wafer processing of the substrate processing device 1 is described along the transfer recipe of the wafer W. FIG. 2 is an explanatory diagram showing a pattern of the transfer recipe of the wafer W of the first embodiment. Furthermore, in this embodiment, the wafer processing is to continuously process a batch (25 wafers) of wafers W stored in a wafer transfer box 31 in a two-wafer manner. Here, W1 to W25 in FIG. 2 are numbers 1 to 25 added to the wafers W of the batch (25 wafers) in the order of wafer processing. Furthermore, WD in FIG. 2 is a virtual wafer that is processed in pairs with wafer W25 in the two-wafer process. In addition, the thick frame in the figure encloses and represents the processing unit of the wafer processing performed continuously. In the following description, the processing unit of the wafer processing is called a processing group. In this embodiment, the wafers W1 to W25 and the virtual wafer WD constitute one processing group.

First, a wafer transfer box 31 containing 1 batch (25 wafers) of wafers W is placed on the loading port 32. Then, two wafers W1 and W2 are taken out from the wafer transfer box 31 by the loading module 30 and moved into the loading and locking module 20a. After the two wafers W are moved into the loading and locking module 20a, the gate 22a is closed, and the inside of the loading and locking module 20a is sealed and depressurized. After that, the gate 23a is opened, and the inside of the loading and locking module 20a is connected to the inside of the transfer module 40.

Next, after the load lock module 20a and the transfer module 40 are connected, the two wafers W1 and W2 are held in an overlapping manner by the transfer arm 51a of the wafer transfer mechanism 50 and are transferred from the load lock module 20a to the transfer module 40. Next, the wafer transfer mechanism 50 moves to the front of the COR module 41A.

Then, the gate 55a is opened, and the transfer arm 51a holding the two wafers W1 and W2 enters the COR module 41A. Then, the transfer arm 51a places the wafers W1 and W2 on the stages 43a and 43b, respectively. Then, the transfer arm 51a exits the COR module 41A.

Next, after the transfer arm 51a exits the COR module 41A, the gate 55a is closed, and the two wafers W1 and W2 are subjected to COR processing in the COR module 41A (step 1 in FIG. 2 ).

Then, after the COR processing in the COR module 41A is completed, the gate 55a is opened and the transfer arm 51a enters the COR module 41A. Then, the two wafers W1 and W2 are transferred from the platforms 43a and 43b to the transfer arm 51a, and the two wafers W1 and W2 are held in an overlapping manner by the transfer arm 51a. After that, the transfer arm 51a exits the COR module 41A and the gate 55a is closed.

Next, the wafer transfer mechanism 50 moves to the front of the PHT module 42A. Then, the gate 56a is opened, and the transfer arm 51a holding the two wafers W1 and W2 enters the PHT module 42A. One wafer W1 and one wafer W2 are transferred from the transfer arm 51a to the platforms 44a and 44b, respectively. After that, the transfer arm 51a exits the PHT module 42A. Then, the gate 56a is closed, and the two wafers W1 and W2 are subjected to PHT processing (step 2 of FIG. 2 ).

At this time, the next two wafers W3 and W4 are taken out from the wafer cassette 31, moved into the load lock module 20a, and transferred to the COR module 41A via the transfer module 40. Then, the two wafers W3 and W4 are subjected to COR processing (step 2 of FIG. 2).

Next, after the PHT processing of wafers W1 and W2 is completed, the gate 56a is opened and the transfer arm 51b enters the PHT module 42A. Then, the two wafers W1 and W2 are transferred from the platforms 44a and 44b to the transfer arm 51b, and the two wafers W1 and W2 are held by the transfer arm 51b. Afterwards, the transfer arm 51b exits the PHT module 42A and the gate 56a is closed.

Afterwards, the gate 26a is opened, and the two wafers W1 and W2 are moved into the loading and locking module 20b by the wafer transfer mechanism 50. After the wafers W1 and W2 are moved into the loading and locking module 20b, the gate 26a is closed, and the inside of the loading and locking module 20b is sealed and set to an atmosphere-open state. Afterwards, the two wafers W1 and W2 are stored in the CST module 33 by the loading module 30 and CST processing is performed. (Step 3 of Figure 2).

At this time, the two wafers W3 and W4 that have completed the COR process are transported to the PHT module 42A by the transport arm 51a. Then, the two wafers W3 and W4 are subjected to the PHT process (step 3 of FIG. 2). In addition, the next two wafers W5 and W6 are taken out from the wafer transport box 31, and are transported to the loading lock module 20a and transported to the COR module 41A via the transport module 40. Then, the two wafers W5 and W6 are subjected to the COR process (step 3 of FIG. 2).

After the two wafers W1 and W2 transferred to the CST module 33 have completed CST processing for a specified time (eg, 1 minute), they are stored in the wafer cassette 31 mounted on the loading port 32 by the loading module 30 and are put into a standby state until the processing of other wafers W3 to W25 is completed.

In this way, a "processing cycle" consisting of a series of COR processing, PHT processing, and CST processing is sequentially performed on all wafers W1-W25 and virtual wafer WD (steps 4-15 in FIG. 2).

The above is a series of processing cycles for the wafer W. However, as described above, the etching amount of the wafer W in one processing cycle is limited. Therefore, it is necessary to repeat the processing cycle for a wafer W to obtain the expected etching amount.

At this point, a series of processing cycles are completed, and the two wafers W1 and W2 stored in the wafer transfer box 31 are transferred to the COR module 41A again when the COR processing of the last two wafers W25 and WD is completed and they are transferred to the PHT module 42A. That is, when the COR processing of all wafers W in one batch constituting the processing group is completed and the COR module 41A can be used again, the wafers W1 and W2 are transferred to the COR module 41A again for COR processing (step 14 in FIG. 2).

In this way, when the COR processing of the last wafer W25 and the virtual wafer WD in one batch is completed and they are transported to the PHT module 42, a series of processing cycles are started again, thereby effectively repeating the processing cycle.

Furthermore, when there is another depressurization module group capable of executing the same processing cycle, the control may be performed in a manner of repeating the processing cycle using the other depressurization module group. That is, for example, as shown in step 27 of FIG. 2 , the next processing cycle to be repeated may be controlled to be executed in depressurization module group B instead of depressurization module group A. In this way, when the processing cycle is started again in the other depressurization module group, the next processing cycle can also be effectively started as described above.

The number of times of repeating the processing cycle can be arbitrary, and in this embodiment, for example, it is 6 times. When the processing cycle of the two wafers W1 and W2 for the specified number of times is completed (step 68 of FIG. 2 ), the two wafers W1 and W2 are stored in the wafer transfer box 31 in the loading module 30 and become a standby state. When the processing cycle of the specified number of times for all wafers W1 to W25 is completed (step 80 of FIG. 2 ), when the last wafer W25 is stored in the wafer transfer box 31, a series of wafer processing in the substrate processing device 1 is completed.

As described above, according to the present embodiment, while a series of processing cycles are repeated in the substrate processing apparatus 1, the wafer W whose temperature has been raised in the PHT process is once cooled and then carried into the COR module 41, so that the processing cycles can be effectively repeated.

Furthermore, according to the present embodiment, the wafer W that has been subjected to the CST process in the CST module 33 is then placed on standby in the wafer cassette 31. Therefore, even if the wafer W is not sufficiently cooled in the CST module 33, the wafer W is cooled in the atmosphere of the wafer cassette 31, which can reduce the impact on the subsequent COR process.

In addition, in this embodiment, the CST module 33 and the loading port 32 as a waiting place until the next processing cycle are set in the atmosphere section 10, that is, in the atmospheric pressure atmosphere, but the configuration of the CST module 33 and the waiting place is not limited to this. For example, the CST module 33 and the buffer space as a waiting place for the wafer W can be set in any place of the depressurization section 11. According to this, it is not necessary to go back and forth between the atmospheric pressure atmosphere and the depressurization atmosphere during a processing cycle, which can improve the transfer efficiency.

However, the cooling efficiency is higher when the inside of the CST module 33 is maintained in the atmospheric atmosphere than when it is maintained in the reduced pressure atmosphere. In addition, the time for the wafer W to be transported to the CST module 33 and the time spent on the CST process in the CST module 33 are shorter than the time spent on the COR process and the PHT process. In view of the above viewpoints, the CST module 33 is preferably installed in the atmospheric part 10, that is, preferably installed in the atmospheric pressure atmosphere.

Furthermore, in the present embodiment, the wafer W is processed in the same horizontal direction in all of the processing cycles of a specified number of times, that is, in the direction of the same angle relative to the reference position (e.g., the groove position). Here, for example, based on the characteristics of the COR module 33, there may be a deviation in the etching amount within the surface of the wafer W. In this case, when the wafer W is repeatedly processed in the same horizontal direction as described above, the etching finally performed on the wafer W may become uneven within the surface. Therefore, in the case of performing repeated processing cycles on the wafer W, in each cycle of the processing cycle, the orientation module 34 may be used to adjust the horizontal direction of the wafer W by a specified angle relative to the reference position.

Here, the predetermined angle is preferably set so that when the predetermined number of processing cycles are all completed, the wafer W performs a total of one rotation. For example, as shown in FIG. 2 , in this embodiment, a series of processing cycles are repeated a total of 6 times. In this case, it is preferred to rotate the wafer W 360 degrees/(prescribed number of times 6 times) = 60 degrees before each processing cycle is executed. Accordingly, the etching of the wafer W can be set to be uniform within the surface.

<Second embodiment> In the first embodiment, the control is performed so that when the COR process of the last wafer W in a batch is completed, the next process cycle of the first wafer W in a batch is started. On the other hand, when the substrate processing device 1 has a plurality of depressurization module groups that can perform the same wafer process as shown in FIG. 1, the control may be performed so that a depressurization module group that has already performed a process cycle can be operated in parallel with other depressurization module groups. For example, in the first embodiment shown in FIG. 2, the depressurization module group C is controlled to operate after the operation of the depressurization module group B is completed from step 53, but it can also be controlled to operate in parallel with the depressurization module group B before the step 53.

Fig. 3 is an explanatory diagram showing a pattern of a transfer recipe of the wafer W according to the second embodiment. In Fig. 3, the description of the same operations as those of the first embodiment (for example, steps up to step 42 in Fig. 3) is omitted.

In the second embodiment, instead of the pressure reducing module group B (COR module 41B and PHT module 42B) of the first embodiment, a pressure reducing module group Ba composed of COR module 41B and PHT module 42A is used. In this case, the pressure reducing module group A and the pressure reducing module group Ba share the PHT module 42A, and the pressure reducing module group A and the pressure reducing module group Ba cannot be operated in parallel.

On the other hand, as shown in step 43 of FIG. 3 , the substrate processing device 1 is provided with decompression module groups Ba and C, so that the decompression module group Ba and the decompression module group C can be operated in parallel. The step 43 is the timing when the first two wafers W1 and W2 in a batch are removed from the CST module 33 after the fourth processing cycle is completed. At this time, the decompression module group C that can execute the same processing cycle is in a non-operating state, so the decompression module group C is used to start the next processing cycle of the wafers W1 and W2. That is, the timing of starting the next processing cycle of the wafers W1 and W2 in the first embodiment that are in a waiting state (eg, step 43 to step 52 in FIG. 2 ) can be advanced.

Thus, according to the second embodiment, by operating the other decompression module groups in the idle state in parallel, the waiting state of the wafer W is shortened, thereby making it possible to process the wafer more efficiently. For example, according to FIG. 3 , by operating the decompression module group Ba and the decompression module group C in parallel, 10 steps can be shortened compared to the first embodiment.

Furthermore, according to the example of FIG. 3 , the decompression module groups Ba and C are operated in parallel, but when the decompression module group B is used instead of the decompression module group Ba, the decompression module group A and the decompression module group B may be operated in parallel. Furthermore, the decompression module groups A and B may be controlled to operate in parallel and the decompression module groups B and C may be controlled to operate in parallel at one time. Thus, the efficiency of wafer processing is further improved.

In addition, in the second embodiment, as the conveying path of the wafer W, the decompression module groups A, Ba, and C are respectively operated twice in succession, that is, the processing cycle is performed in the order of the decompression module groups A, A, Ba, Ba, C, and C. However, the conveying path of the wafer W is not limited to this, and for example, the processing cycle may be controlled to be performed in the order of the decompression module groups A, Ba, C, A, Ba, and C. By such control, the efficiency of the parallel operation of the above-mentioned decompression module groups can be further and better enjoyed.

<Third embodiment> According to the first and second embodiments, a wafer W that has completed a processing cycle is placed in a wafer transfer box 31 under an atmospheric pressure atmosphere and is in a standby state until the processing cycle of another wafer W is completed and the next processing cycle begins. In this regard, in order to suppress oxidation of the surface of the wafer W, it is better to shorten the time that the surface of the wafer W is exposed to the atmospheric pressure atmosphere as much as possible.

Here, in the first and second embodiments, wafer processing is performed in batches (25 wafers) as processing groups, but the batches may be further divided into processing groups of a predetermined number of wafers to perform wafer processing. FIG4 is an explanatory diagram showing a pattern of a transfer recipe of wafers W in the third embodiment.

As shown in FIG. 4 , a batch of 25 wafers W is further divided into a predetermined number of processing groups, each of which is 6 wafers in this embodiment, for wafer processing. In this way, by dividing the processing groups of wafers W into groups smaller than a batch (25 wafers), multiple processing cycles can be continuously performed on a wafer W, thereby shortening the exposure time of the wafer W to the atmospheric pressure atmosphere. For example, according to the example of FIG. 4 , after the CST processing of two wafers W1 and W2 in the CST module 33 is completed (step 3 of FIG. 4 ), they are immediately moved into the COR module 41 (step 4 of FIG. 4 ), thereby shortening the standby time.

In addition, the prescribed number of wafers in this embodiment, that is, the number of wafers W to be grouped, is determined as follows.

In order to optimize the waiting time in the wafer cassette 31 after the CST process in the CST module 33 is completed, it is preferable to control the wafer cassette 31 so as to be immediately moved into the COR module 41 after the CST process is completed.

The number of wafers in the processing group that are transferred from the CST processing process to the COR processing process in the next processing cycle without waiting for processing can be calculated based on the number of processes executed in one processing cycle and the number of wafers W that can be processed in one module. For example, according to this embodiment, the processing processes executed in one processing cycle are a total of three processing processes, namely, the COR processing process, the PHT processing process, and the CST processing process. In addition, the COR module 41 and the PHT module 42 perform wafer processing in a 2-wafer mode, respectively. Here, in this embodiment, if "the number of processing processes 3×2-wafer mode = 6 wafers" is set as the number of wafers constituting the processing group, then the CST processing process can be transferred to the COR processing process without waiting for processing. Thus, the surface oxidation of the wafer W during processing due to exposure to the atmospheric pressure atmosphere can be suppressed. In addition, the CST module 33 can accommodate more than 25 wafers W in one batch without affecting the waiting time of the wafers W.

Furthermore, by dividing the processing group into processing groups of a predetermined number of wafers W, when an abnormality occurs in one module during processing in the processing group, for example, the number of wafers W affected can be reduced.

In addition, in this embodiment, the division of one batch (25 pieces) of substrates into groups of a predetermined number of pieces can be performed simultaneously with the parallel operation of a plurality of decompression module groups in the second embodiment. For example, as shown in steps 13 to 19 of FIG. 4, it is also possible to control the decompression module groups A and C so that the substrates of one group are operated in parallel with the substrates of other groups. In this way, it is possible to shorten the steps by 14 compared with the first embodiment and further shorten the steps by 4 compared with the second embodiment.

Furthermore, according to the present disclosure, for example, when the number of processing groups is an odd number, by using a virtual wafer WD, there will be no deviation in wafer processing in each module.

The embodiments disclosed herein are all illustrative and not limiting. The embodiments described above may be omitted, replaced, or modified in various forms without departing from the scope of the patent application and its gist.

For example, the above-mentioned pressure reducing module groups A, B, and C are examples of being composed of COR modules and PHT modules, but they can be appropriately changed to any processing device. For example, in the pressure reducing module group, as a replacement for the COR module, there may be an RST module that uses remote plasma for etching. In this case, when using an RST module different from the COR module, processing can also be performed in a stable processing atmosphere in each module.

Furthermore, for example, in each of the above modules, the wafers W are processed in two pieces, but a processing configuration of one piece or three or more pieces may also be used.

In addition, the following structures also belong to the technical scope of the present disclosure. (1) A substrate processing method is a substrate processing method for processing a substrate using a substrate processing device, wherein the substrate processing device has: a COR module for performing COR processing on the substrate; a heating module for performing heating processing on the substrate; and a cooling module for performing cooling processing on the substrate; the substrate processing method has: a COR processing module for performing COR processing on the substrate in a reduced pressure atmosphere in the COR module; The substrate is then transferred to the heating module and subjected to a heating treatment process in which the substrate is heated in a reduced pressure atmosphere in the heating module; and the substrate is then transferred to the cooling module and subjected to a cooling treatment process in which the substrate is cooled in an atmospheric atmosphere in the cooling module; and a treatment cycle including the COR treatment process, the heating treatment process, and the cooling treatment process is repeated. In this way, by repeating a plurality of treatment cycles for a substrate, the necessary substrate processing performance can be appropriately and efficiently satisfied.

(2) In the substrate processing method described in (1), the substrate processing device includes a plurality of depressurization module groups including one COR module and one heating module, and processing in one depressurization module group and processing in other depressurization module groups are performed in parallel. In this way, by including a plurality of depressurization module groups and operating the depressurization module groups in parallel, substrate processing can be performed efficiently, thereby improving production capacity.

(3) In the substrate processing method described in (1) or (2), the above-mentioned processing cycle is performed for each group consisting of a predetermined number of substrates. In this way, by appropriately performing grouping, substrate processing can be performed efficiently.

(4) In the substrate processing method described in (3), the specified number of substrates in the group is determined by the number of processes in the processing cycle and the number of substrates processed in the COR module or the heating module. By performing the grouping, the generation of substrates waiting to be processed in the device can be suppressed, and the efficiency of substrate processing can be improved.

(5) In the substrate processing method described in (3), the specified number of substrates in the above group is the number of substrates included in one batch. By performing such grouping, cooling treatment during substrate processing can be appropriately performed, thereby improving the efficiency of substrate processing.

(6) In any one of the substrate processing methods described in (1) to (5), the processing cycle includes: a position adjustment process for rotating the substrate to adjust the horizontal direction before the COR processing process, and in each cycle of the processing cycle, the direction of the substrate is changed by a predetermined angle relative to the reference position in the position adjustment process, and the predetermined angle is determined by dividing 360 degrees by the number of repetitions of the processing cycle. Accordingly, the in-plane uniformity of the substrate processing can be improved.

(7) A substrate processing device is a substrate processing device for processing a substrate, comprising: a COR module for performing COR processing on the substrate in a reduced pressure atmosphere; a heating module for performing heat processing on the substrate in a reduced pressure atmosphere; a cooling module for performing cooling processing on the substrate in an atmospheric atmosphere; and a control unit for controlling the COR module, the heating module and the cooling module in a manner of repeatedly performing a processing cycle in the order of the COR processing, the heating processing and the cooling processing.

1: Substrate processing device 33: CST module (cooling module) 41: COR module 42: PHT module (heating module) W: Wafer

[FIG. 1] A plan view schematically showing the structure of the substrate processing apparatus of the present embodiment. [FIG. 2] An explanatory diagram showing a pattern of the wafer transfer recipe of the first embodiment. [FIG. 3] An explanatory diagram showing a pattern of the wafer transfer recipe of the second embodiment. [FIG. 4] An explanatory diagram showing a pattern of the wafer transfer recipe of the third embodiment.

Claims (6)

A substrate processing method is a substrate processing method for processing a substrate using a substrate processing device, wherein the substrate processing device has: a COR module for performing COR processing on the substrate; a heating module for performing heating processing on the substrate; and a cooling module for performing cooling processing on the substrate; the substrate processing method comprises: a COR processing process for performing COR processing on the substrate in a reduced pressure atmosphere in the COR module; then, transferring the substrate to the heating module, performing a heating processing process for performing heating processing on the substrate in a reduced pressure atmosphere in the heating module; and then, transferring the substrate to the cooling module. A cooling treatment process is performed in the cooling module to cool the substrate in an atmosphere; a treatment cycle including the COR treatment process, the heating treatment process and the cooling treatment process is repeatedly performed on the same substrate; the treatment cycle has: before the COR treatment process, a position adjustment process is performed to rotate the substrate to adjust the horizontal direction, and in each cycle of the treatment cycle, the direction of the substrate is changed by a specified angle relative to the reference position in the position adjustment process, and the specified angle is determined by dividing 360 degrees by the number of repetitions of the treatment cycle. For example, in the substrate processing method of item 1 of the patent application, the substrate processing device has a plurality of decompression module groups including one COR module and one heating module, and the processing in one decompression module group and the processing in other decompression module groups are performed in parallel. For example, a substrate processing method as claimed in item 1 or 2 of the patent application, wherein the above-mentioned processing cycle is performed for each group of groups consisting of a specified number of substrates. For example, in the substrate processing method of item 3 of the patent application, the specified number of substrates in the above group is determined by the number of processes in the above processing cycle, the number of substrates processed in the above COR module or the above heating module. For example, in the substrate processing method of item 3 of the patent application scope, the specified number of substrates in the above group is the number of substrates included in one batch. A substrate processing device is a substrate processing device for processing a substrate, comprising: a COR module for performing COR processing on the substrate in a decompressed atmosphere; a heating module for performing heating processing on the substrate in a decompressed atmosphere; a cooling module for performing cooling processing on the substrate in an atmospheric atmosphere; and a control unit for repeatedly performing a processing cycle in the order of the COR processing, the heating processing, and the cooling processing on the same substrate. The COR module, the heating module and the cooling module are controlled; the processing cycle has: before the COR processing process, a position adjustment process is performed to rotate the substrate to adjust the horizontal direction; the control unit, in each cycle of the processing cycle, changes the direction of the substrate by a specified angle relative to a reference position in the position adjustment process; the specified angle is determined by dividing 360 degrees by the number of repetitions of the processing cycle.

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