TWI830683B - A film structure for electric field guided photoresist patterning process - Google Patents
A film structure for electric field guided photoresist patterning process Download PDFInfo
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- TWI830683B TWI830683B TW112131095A TW112131095A TWI830683B TW I830683 B TWI830683 B TW I830683B TW 112131095 A TW112131095 A TW 112131095A TW 112131095 A TW112131095 A TW 112131095A TW I830683 B TWI830683 B TW I830683B
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- Prior art keywords
- layer
- substrate
- photoresist layer
- device structure
- underlying layer
- Prior art date
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- G03F7/40—Treatment after imagewise removal, e.g. baking
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Abstract
Description
本揭示內容大致與用於處理基板的方法及裝置相關,且更具體而言是與用於增強光阻劑輪廓控制的方法及裝置相關。The present disclosure relates generally to methods and apparatus for processing substrates, and more particularly to methods and apparatus for enhanced photoresist profile control.
積體電路已經發展成為複雜的設備,其可以在單個晶片上包括數百萬個元件(例如電晶體、電容器、及電阻器)。可以使用光微影蝕刻法來在晶片上形成元件。一般而言,光微影蝕刻製程涉及幾個基本階段。起初,將光阻層形成於基板上。可以藉由例如旋轉塗覆來形成光阻層。光阻層可以包括抗蝕樹脂及光酸產生劑。在後續的暴露階段中暴露於電磁輻射之後,光酸產生劑在顯影製程中變更光阻劑的溶解性。電磁輻射可以具有任何合適的波長,例如極紫外線區域中的波長。電磁輻射可以來自任何合適的來源,例如193 nm ArF雷射、電子束、離子束、或其他來源。可以接著在預暴露烘烤製程中移除過量的溶劑。Integrated circuits have evolved into complex devices that can include millions of components (such as transistors, capacitors, and resistors) on a single chip. Photolithography can be used to form components on the wafer. Generally speaking, the photolithography process involves several basic stages. Initially, a photoresist layer is formed on the substrate. The photoresist layer can be formed by, for example, spin coating. The photoresist layer may include a resist resin and a photoacid generator. After exposure to electromagnetic radiation in subsequent exposure stages, the photoacid generator changes the solubility of the photoresist during the development process. The electromagnetic radiation may be of any suitable wavelength, such as wavelengths in the extreme ultraviolet region. The electromagnetic radiation can come from any suitable source, such as a 193 nm ArF laser, electron beam, ion beam, or other sources. Excess solvent can then be removed in a pre-exposure bake process.
在暴露階段中,可以使用光掩模或主光罩來選擇性地將設置在基板上的光阻層的某些區域暴露於電磁輻射。其他的暴露方法可以是無掩模的暴露方法。暴露於光可以使光酸產生劑分解,這產生酸並且在抗蝕樹脂中造成潛伏的酸影像。在暴露之後,可以在後暴露烘烤製程中加熱基板。在後暴露烘烤製程期間,由光酸產生劑所產生的酸與光阻層中的抗蝕樹脂起反應,從而在後續的顯影製程期間改變光阻層的抗蝕劑的溶解性。During the exposure stage, a photomask or master mask may be used to selectively expose certain areas of the photoresist layer disposed on the substrate to electromagnetic radiation. Other exposure methods may be maskless exposure methods. Exposure to light can decompose the photoacid generator, which generates acid and creates latent acid images in the resist resin. After exposure, the substrate can be heated in a post-exposure bake process. During the post-exposure bake process, the acid generated by the photoacid generator reacts with the resist resin in the photoresist layer, thereby changing the resist solubility of the photoresist layer during the subsequent development process.
在後暴露烘烤之後,可以將基板(特別是光阻層)顯影及沖洗。在顯影及沖洗之後,接著將圖案化的光阻層形成於基板上,如圖1中所示。圖1描繪基板100的示例性俯視截面圖,該基板具有設置在待蝕刻的目標材料102上的圖案化的光阻層104。在顯影及沖洗製程之後,開口106被界定在圖案化的光阻層104之間,從而暴露下伏的目標材料102以供蝕刻以將特徵轉移到目標材料102上。然而,微影蝕刻暴露製程的不準確控制或低解析度可能造成光阻層104不良的臨界尺度,從而造成不可接受的線寬粗糙度(LWR)108。並且,在暴露製程期間,由光酸產生劑所產生的酸(如圖1中所示)可能隨機地擴散到任何區域(包括掩模下方所保護的不想要被擴散的區域),因此在圖案化的光阻層104的與開口106交界的邊緣或介面處產生不希望得到的毛刺或粗糙輪廓150。光阻層104的大的線寬粗糙度(LWR)108及不希望得到的毛刺輪廓150可能造成對目標材料102不準確的特徵轉移,因此最終導致元件故障或產量損失。After the post-exposure bake, the substrate (especially the photoresist layer) can be developed and rinsed. After development and rinsing, a patterned photoresist layer is then formed on the substrate, as shown in FIG. 1 . FIG. 1 depicts an exemplary top cross-sectional view of a
因此,需要方法及裝置來控制線寬粗糙度(LWR)及增強解析度以及劑量靈敏度,以便獲得具有所需臨界尺度的圖案化的光阻層。Therefore, methods and apparatus are needed to control line width roughness (LWR) and enhance resolution and dose sensitivity in order to obtain patterned photoresist layers with required critical dimensions.
本揭示內容的實施例包括一種方法,該方法用於形成膜結構以在暴露製程或預暴露烘烤製程或後暴露烘烤製程期間高效地控制來自光阻層中的光酸產生劑的酸的分佈及擴散。在一個實例中,一種元件結構包括:膜結構,設置在基板上;及複數個開口,形成於該膜結構中,其中跨該基板形成的該等開口具有約1 nm與2 nm之間的臨界尺度均勻性。Embodiments of the present disclosure include a method for forming a film structure to efficiently control acid from a photoacid generator in a photoresist layer during an exposure process or a pre-exposure bake process or a post-exposure bake process. Distribution and diffusion. In one example, a device structure includes: a film structure disposed on a substrate; and a plurality of openings formed in the film structure, wherein the openings formed across the substrate have a critical threshold between about 1 nm and 2 nm. Scale uniformity.
在另一個實施例中,一種處理基板的方法包括以下步驟:將包括光酸產生劑的光阻層塗敷到設置在基板上的多層上,其中該多層包括由有機材料、無機材料、或有機材料與無機材料的混合物所形成的下伏層;在微影蝕刻暴露製程中將該光阻層的未被光掩模保護的第一部分暴露於輻射光;及施加電場或磁場以實質上在垂直方向上變更該光酸產生劑所產生的光酸的移動。In another embodiment, a method of treating a substrate includes applying a photoresist layer including a photoacid generator onto a plurality of layers disposed on the substrate, wherein the plurality of layers includes an organic material, an inorganic material, or an organic material. an underlying layer formed from a mixture of materials and inorganic materials; exposing a first portion of the photoresist layer not protected by a photomask to radiant light during a lithography exposure process; and applying an electric or magnetic field to substantially vertical The movement of the photoacid generated by the photoacid generator is changed in the direction.
在又一個實施例中,一種處理基板的方法包括以下步驟:在設置在基板上的下伏層上塗敷光阻層;在微影蝕刻暴露製程中將該光阻層的未被光掩模保護的第一部分暴露於輻射光;在該光阻層及該下伏層上執行烘烤製程;及在執行該烘烤製程的同時施加電場或磁場。In yet another embodiment, a method of processing a substrate includes the following steps: coating a photoresist layer on an underlying layer disposed on the substrate; and removing portions of the photoresist layer that are not protected by a photomask during a photolithographic etching exposure process. exposing a first portion to radiant light; performing a baking process on the photoresist layer and the underlying layer; and applying an electric or magnetic field while performing the baking process.
本案提供了用於增強由光微影蝕刻法所形成的光阻層的輪廓控制的方法。可以藉由如本文中所揭露地利用設置在光阻層下方的膜結構,減輕在後暴露烘烤程序期間由光酸產生劑所產生的酸的擴散,此擴散造成線緣/線寬粗糙。電場施加控制了光酸產生劑所產生的酸在光阻層以及設置在光阻層下方的膜結構中的下伏層中的擴散及分佈,因此防止由隨機擴散造成的線緣/線寬粗糙。本文中揭露了用於形成設置在用來控制上述酸分佈及擴散的光阻層下方的膜結構的方法This application provides a method for enhancing profile control of a photoresist layer formed by photolithographic etching. The diffusion of acid generated by the photoacid generator during the post-exposure bake process, which causes line edge/line width roughness, can be mitigated by utilizing a film structure disposed beneath the photoresist layer as disclosed herein. The application of an electric field controls the diffusion and distribution of the acid generated by the photoacid generator in the photoresist layer and the underlying layer in the film structure disposed below the photoresist layer, thereby preventing line edge/line width roughness caused by random diffusion. . Disclosed herein are methods for forming film structures disposed beneath photoresist layers used to control acid distribution and diffusion as described above.
圖2是依據一個實施例的用於處理基板的裝置的示意橫截面圖。如圖2的實施例中所示,裝置可以呈真空處理腔室200的形式。在其他的實施例中,處理腔室200可以不耦接到真空源。Figure 2 is a schematic cross-sectional view of an apparatus for processing a substrate, according to one embodiment. As shown in the embodiment of Figure 2, the apparatus may be in the form of a
處理腔室200可以是獨立的處理腔室。或者,處理腔室200可以是處理系統的一部分(依需要例如是內聯處理系統、群集處理系統、或軌路處理系統)。處理腔室200詳細描述於下,並且可以用於預暴露烘烤、後暴露烘烤、及/或其他的處理步驟。
處理腔室200包括腔室壁202、電極組件216、及基板支撐組件238。腔室壁202包括側壁206、蓋組件210、及底部208。腔室壁202部分包封處理容積212。通過基板傳輸端口(未示出)進出處理容積212,該基板傳輸端口被配置為促進將基板240移進及移出處理腔室200。在處理腔室200是處理系統的一部分的實施例中,基板傳輸端口可以允許將基板240傳輸進出鄰接的傳輸腔室。
可以可選地將泵送端口214設置穿過處理腔室200的蓋組件210、側壁206、或底部208中的一者,以將處理容積212耦接到排氣端口。排氣端口將泵送端口214耦接到各種真空泵送元件,例如真空泵。泵送元件可以減少處理容積212的壓力,並且將任何氣體及/或製程副產品排出處理腔室200。可以將處理腔室200耦接到一或更多個供應源204以供將一或更多種源化合物遞送到處理容積212中。
基板支撐組件238居中設置在處理腔室200內。基板支撐組件238在處理期間支撐基板240。基板支撐組件238可以包括主體224,該主體包覆至少一個嵌入的加熱器232。在一些實施例中,基板支撐組件238可以是靜電吸盤。加熱器232(例如電阻構件)被設置在基板支撐組件238中。加熱器232可控制地將基板支撐組件238及定位在該基板支撐組件上的基板240加熱到預定溫度。加熱器232被配置為快速升高基板240的溫度,並且準確地控制基板240的溫度。在一些實施例中,加熱器232連接到電源274且由該電源所控制。電源274可以替代性或附加性地向基板支撐組件238施加電力。可以與電源270類似地配置電源274,下文論述。並且,注意,可以依需要從處理腔室200的其他位置(例如從腔室壁、腔室襯墊、圍束基板的邊緣環、腔室頂壁等等)設置加熱器232,以向設置在基板支撐組件238上的基板240提供熱能。A
在一些實施例中,可以將基板支撐組件238配置為旋轉。在一些實施例中,基板支撐組件238被配置為圍繞z軸旋轉。可以將基板支撐組件238配置為連續地或恆常地旋轉,或可以將基板支撐組件238配置為用步進或分度的方式旋轉。例如,基板支撐組件238可以旋轉預定的量,例如90°、180°、或270°,隨後可以停止旋轉達預定的時間量。In some embodiments,
一般而言,基板支撐組件238具有第一表面234及第二表面226。第一表面234與第二表面226相對。第一表面234被配置為支撐基板240。第二表面226具有耦接到該第二表面的桿242。基板240可以是任何類型的基板,例如介電基板、玻璃基板、半導體基板、或導電基板。基板240可以具有設置在其上的材料層245。材料層245可以是任何所需的層。在其他的實施例中,基板240可以具有多於一個的材料層245。基板240也具有設置在材料層245上方的光阻層250。先前已經在光微影蝕刻製程的暴露階段將基板240暴露於電磁輻射。光阻層250具有由暴露階段形成在其中的潛像線255。潛像線255可以是實質平行的。在其他的實施例中,潛像線255可以不是實質平行的。又,如所示,基板支撐組件238的第一表面234在z方向上與電極組件216分離達距離d。桿242耦接到升降系統(未示出)以供在升高的處理位置(如所示)與降低的基板傳輸位置之間移動基板支撐組件238。升降系統可以準確地及精確地控制基板240在z方向上的位置。在一些實施例中,也可以將升降系統配置為在x方向、y方向、或x方向及y方向上移動基板240。桿242額外提供了用於基板支撐組件238與處理腔室200的其他元件之間的電引線及熱電耦引線的導管。波紋管246耦接到基板支撐組件238以在處理容積212與處理腔室200外部的大氣之間提供真空密封,並且促進基板支撐組件238在z方向上的移動。Generally speaking, the
蓋組件210可以可選地包括入口280,穿過該入口,由供應源204所提供的氣體可以進入處理腔室200。供應源204可以可選地可控制地用氣體(例如氮氣、氬氣、氦氣、其他氣體、或上述項目的組合)加壓處理容積212。來自供應源204的氣體可以在處理腔室200內產生受控的環境。致動器290可以可選地耦接在蓋組件210與電極組件216之間。致動器290被配置為在x、y、及z方向中的一或更多者上移動電極組件216。x及y方向在本文中稱為側向方向或尺度。致動器290允許電極組件216掃描基板240的表面。致動器290也允許調整距離d。在一些實施例中,電極組件216藉由固定的桿(未示出)耦接到蓋組件210。在其他的實施例中,電極組件216可以耦接到處理腔室200的底部208的內部、耦接到基板支撐組件238的第二表面226、或耦接到桿242。在又其他的實施例中,電極組件216可以嵌入在基板支撐組件238的第一表面234與第二表面226之間。
電極組件216包括至少第一電極258及第二電極260。如所示,第一電極258耦接到電源270,並且第二電極260耦接到可選的電源275。在其他的實施例中,第一電極258及第二電極260中的一者可以耦接到電源,並且其他的電極可以耦接到接地。在一些實施例中,第一電極258及第二電極260耦接到接地,並且向基板支撐件遞送電力的電源274是雙極電源,雙極電源在正偏壓與負偏壓之間切換。在一些實施例中,電源270或電源275可以耦接到第一電極258及第二電極260兩者。在其他的實施例中,電源270或電源275可以耦接到第一電極258、第二電極260、及基板支撐組件238。在此類實施例中,第一電極258、第二電極260、及基板支撐組件238中的每一者的脈波延遲可能不同。可以將電極組件216配置為產生與由基板支撐組件238的第一表面所界定的x-y平面平行的電場。例如,可以將電極組件216配置為在y方向、x方向、或x-y平面上的其他方向中的一者上產生電場。The
電源270及電源275被配置為向電極組件216供應例如約500 V與約100 kV之間,以產生具有約0.1 Mv/m與約100 MV/m之間的強度的電場。在一些實施例中,也可以將電源274配置為向電極組件216提供電力。在一些實施例中,電源270、電源274、或電源275中的任一者或全部是脈衝式直流(DC)電源。脈衝式DC波可以來自半波整流器或全波整流器。DC電力可以具有約10 Hz與1 MHz之間的頻率。脈衝式DC電源的佔空比可以是在約5%與約95%之間,例如在約20%與約60%之間。在一些實施例中,脈衝式DC電源的佔空比可以是在約20%與約40%之間。在其他的實施例中,脈衝式DC電源的佔空比可以為約60%。脈衝式DC電源的上升及下降時間可以是在約1 ns與約1000 ns之間,例如是在約10 ns與約500 ns之間。在其他的實施例中,脈衝式DC電源的上升及下降時間可以是在約10 ns與約100 ns之間。在一些實施例中,脈衝式DC電源的上升及下降時間可以為約500 ns。在一些實施例中,電源270、電源274、及電源275中的任一者或全部是交流電源。在其他的實施例中,電源270、電源274、及電源275中的任一者或全部是直流電源。
在一些實施例中,電源270、電源274、及電源275中的任一者或全部可以使用DC偏移。DC偏移可以例如是在所施加的電壓的約0%與約75%之間,例如是在所施加的電壓的約5%與約60%之間。在一些實施例中,第一電極258及第二電極260被負脈衝化,而基板支撐組件238也被負脈衝化。在這些實施例中,第一電極258及第二電極260及基板支撐組件238是同步的,但在時間上是偏移的。例如,第一電極258可以處於「一」狀態而基板支撐組件238處於「零」狀態,接著基板支撐組件238處於一狀態而第一電極258處於零狀態。In some embodiments, any or all of
電極組件216大約跨越基板支撐組件238的寬度。在其他的實施例中,電極組件216的寬度可以小於基板支撐組件238的寬度。例如,電極組件216可以跨越在基板支撐組件238的寬度的約10%與約80%(例如約20%與約40%)之間。在電極組件216比基板支撐組件238不寬的實施例中,致動器290可以跨定位在基板支撐組件238的第一表面234上的基板240的表面掃描電極組件216。例如,致動器290可以掃描,使得電極組件216掃描基板240的整個表面。在其他的實施例中,致動器290可以僅掃描基板240的某些部分。或者,基板支撐組件238可以掃描電極組件216的下方。
在一些實施例中,可以將一或更多個磁鐵296定位在處理腔室200中。在圖1中所示的實施例中,磁鐵296耦接到側壁206的內表面。在其他的實施例中,可以將磁鐵296定位在處理腔室200內或處理腔室200外部的其他位置中。磁鐵296可以是例如永久磁鐵或電磁鐵。代表性的永久磁鐵包括陶瓷磁鐵及稀土磁鐵。在磁鐵296包括電磁鐵的實施例中,磁鐵296可以耦接到電源(未示出)。磁鐵296被配置為在與由電極組件216在基板支撐組件238的第一表面234處所產生的電場線的方向垂直或平行的方向上產生磁場。例如,可以在由電極組件216所產生的電場是在y方向上時將磁鐵296配置為在x方向上產生磁場。磁場在與磁場垂直的方向(例如與潛像線255平行的方向)上驅動由光阻層250中的光酸產生劑所產生的帶電物質355(示於圖3中)及極化物質(未示出)。藉由在與潛像線255平行的方向上驅動帶電物質355及極化物質,可以減少線粗糙度。帶電物質355及極化物質均勻的指向性移動由圖3中的雙向箭頭370所示。相比之下,在不施加磁場時,帶電物質355及極化物質可以隨機移動,如由箭頭370'所示。In some embodiments, one or
繼續參照圖3,電極組件216包括至少第一電極258及第二電極260。第一電極258包括第一終端310、第一支撐結構330、及一或更多個天線320。第二電極260包括第二終端311、第二支撐結構331、及一或更多個天線321。第一電極258的第一終端310、第一支撐結構330、及一或更多個天線320可以形成單體主體。或者,第一電極258可以包括可以耦接在一起的單獨部分。例如,一或更多個天線320可以可從第一支撐結構330拆卸。第二電極260可以類似地是單體主體或包括單獨的可拆卸元件。第一電極258及第二電極260可以由任何合適的技術製造。例如,第一電極258及第二電極260可以藉由機械加工、鑄造、或添加式製造來製造。Continuing to refer to FIG. 3 , the
第一支撐結構330可以由導電材料(例如金屬)製作。例如,第一支撐結構330可以由矽、多晶矽、碳化矽、鉬、鋁、銅、石墨、銀、鉑、金、鈀、鋅、其他材料、或上述項目的混合物製作。第一支撐結構330可以具有任何所需的尺度。例如,第一支撐結構330的長度L可以是在約25 mm與約450 mm之間,例如是在約100 mm與約300 mm之間。在一些實施例中,第一支撐結構330具有大約等於標準半導體基板的直徑的長度L。在其他的實施例中,第一支撐結構330具有大於或小於標準半導體基板的直徑的長度L。例如,在不同的代表性實施例中,第一支撐結構330的長度L可以為約25 mm、約51 mm、約76 mm、約100 mm、約150 mm、約200 mm、約300 mm、或約450 mm。第一支撐結構330的寬度W可以是在約2 mm與約25 mm之間。在其他的實施例中,第一支撐結構330的寬度W小於約2 mm。在其他的實施例中,第一支撐結構330的寬度W大於約25 mm。第一支撐結構330的厚度可以是在約1 mm與約10 mm之間,例如是在約2 mm與約8 mm之間,例如約5 mm。在一些實施例中,第一支撐結構330可以是方形、圓柱形、矩形、卵形、桿形、或其他形狀。具有彎曲外表面的實施例可以避免發弧。The
支撐結構330可以由與第二支撐結構331相同的材料製作。適於第一支撐結構330的尺度範圍也適於第二支撐結構331。在一些實施例中,第一支撐結構330及第二支撐結構331由相同的材料製作。在其他的實施例中,第一支撐結構330及第二支撐結構331由不同的材料製作。第一支撐結構330及第二支撐結構331的長度L、寬度W、及厚度可以相同或不同。The
第一電極258的一或更多個天線320也可以由導電材料製作。一或更多個天線320可以由與第一支撐結構330相同的材料製作。第一電極258的一或更多個天線320可以具有任何所需的尺度。例如,一或更多個天線320的長度L1可以是在約25 mm與約450 mm之間,例如是在約100 mm與約300 mm之間。在一些實施例中,一或更多個天線320具有大約等於標準基板的直徑的長度L1。在其他的實施例中,一或更多個天線320的長度L1可以是在標準基板的直徑的約75%與90%之間。一或更多個天線320的寬度W1可以是在約2 mm與約25 mm之間。在其他的實施例中,一或更多個天線320的寬度W1小於約2 mm。在其他的實施例中,一或更多個天線320的寬度W1大於約25 mm。一或更多個天線320的厚度可以是在約1 mm與約10 mm之間,例如是在約2 mm與約8 mm之間。一或更多個天線320可以具有方形、矩形、卵形、圓形、圓柱形、或另一種形狀的橫截面。具有圓形外表面的實施例可以避免發弧。One or
天線320中的每一者均可以具有相同的尺度。或者,一或更多個天線320中的一些可以具有與其他天線320中的一或更多者不同的尺度。例如,一或更多個天線320中的一些可以具有與其他天線320中的一或更多者不同的長度L1。一或更多個天線320中的每一者可以由相同的材料製作。在其他的實施例中,天線320中的一些可以由與其他天線320不同的材料製作。Each of the
天線320可以由與天線320相同範圍的材料製作。適於天線320的尺度範圍也適於天線321。在一些實施例中,天線320及天線321由相同的材料製作。在其他的實施例中,天線320及天線321由不同的材料製作。天線320及天線321的長度L1、寬度W1、及厚度可以相同或不同。
天線320可以包括1個與約40個之間的天線320。例如,天線320可以包括約4個與約40個之間的天線320,例如約10個與約20個之間的天線320。在其他的實施例中,天線320可以包括多於40個的天線320。在一些實施例中,天線320中的每一者均可以與第一支撐結構330實質垂直。例如,在第一支撐結構330筆直的實施例中,每個天線320均可以與第一支撐結構330實質平行。天線320中的每一者均可以與其他天線320中的每一者實質平行。天線321中的每一者均可以類似地相對於支撐結構331及每個其他的天線321定位。
天線320中的每一者均具有終端323。天線321中的每一者均具有終端325。距離C被界定在第一支撐結構330與終端325之間。距離C'被界定在第二支撐結構331與終端323之間。距離C及C'中的每一者可以是在約1 mm與約10 mm之間。在其他的實施例中,距離C及C'可以小於約1 mm或大於約10 mm。在一些實施例中,距離C及距離C'相等。在其他的實施例中,距離C及距離C'不同。Each of the
距離A被界定在天線321中的一者及天線321中的相鄰天線的面對表面之間。距離A'被界定在一個天線320及天線320中的相鄰天線的面對表面之間。距離A及A'可以大於約6 mm。例如,距離A及A'可以是在約6 mm與約20 mm之間,例如是在約10 mm與約15 mm之間。每個相鄰的天線321、320之間的距離A及A'可以相同或不同。例如,一或更多個天線320中的第一天線與第二天線、第二天線與第三天線、及第三天線與第四天線之間的距離A'可以不同。在其他的實施例中,距離A'可以相同。A distance A is defined between one of the
距離B被界定在天線320中的一者及天線321中的相鄰天線的面對表面之間。距離B可以例如大於約1 mm。例如,距離B可以是在約2 mm與約10 mm之間,例如是在約4 mm與約6 mm之間。每個距離B可以相同,每個距離B可以不同,或一些距離B可以相同並且一些距離B可以不同。調整距離B允許容易控制電場強度。A distance B is defined between the facing surfaces of one of the
天線320、321可以在光阻層250上方用交錯的佈置定向。例如,可以將第一電極258的天線320及第二電極260的天線321定位為使得天線320中的至少一者定位在天線321中的兩者之間。此外,可以將至少一個天線321定位在天線320中的兩者之間。在一些實施例中,除了天線320中的一者之外的所有天線都定位在天線321中的兩者之間。在彼等實施例中,除了天線321中的一者之外的所有天線都可以定位在天線320中的兩者之間。在一些實施例中,天線320及天線321可以各自僅具有一個天線。The
在一些實施例中,第一電極258具有第一終端310,並且第二電極260具有第二終端311。第一終端310可以是第一電極258與電源270、電源275、或接地之間的接點。第二終端311可以是第二電極260與電源270、電源275、或接地之間的接點。第一終端310及第二終端311被示為分別位在第一電極258及第二電極260的一端處。在其他的實施例中,第一終端310及第二終端311可以分別定位在第一電極258及第二電極上的其他位置處。第一終端310及第二終端311分別具有與第一支撐結構330及支撐結構331不同的形狀及尺寸。在其他的實施例中,第一終端310及第二終端311可以分別具有與第一支撐結構330及支撐結構331大致相同的形狀及尺寸。In some embodiments,
操作時,可以從電源(例如電源270、電源274、或電源275)向第一終端310、第二終端311、及/或基板支撐組件238供應電壓。供應的電壓在一或更多個天線320中的每個天線與一或更多個天線321中的每個天線之間產生電場。電場在一或更多個天線320中的一個天線與一或更多個天線321中的一個相鄰天線之間將最強。天線320、321的交錯及對準的空間關係在與由基板支撐組件238的第一表面234所界定的平面平行的方向上產生電場。基板240定位在第一表面234上,使得潛像線255與由電極組件216所產生的電場線平行。因為帶電物質355帶電,所以帶電物質355受到電場的影響。電場在電場的方向上驅動由光阻層250中的光酸產生劑所產生的帶電物質355。藉由在與潛像線255平行的方向上驅動帶電物質355,可以減少線緣粗糙度。均勻的指向性移動由雙向箭頭370所示。相比之下,在不向第一終端310或第二終端311施加電壓時,不在任何特定方向上產生電場來驅動帶電物質355。其結果是,帶電物質355可以隨機移動(如由箭頭370'所示),這可能造成注意或線粗糙。In operation, voltage may be supplied to
圖4描繪在微影蝕刻暴露製程期間的設置在基板400上的膜結構404。光阻層407被設置在膜結構404上。膜結構404包括設置在硬質掩模層403上且更遠地設置在目標層402上的下伏層405。目標層402之後被圖案化以供在目標層402中形成所需的元件特徵。在一個實例中,下伏層405可以是有機材料、無機材料、或有機或無機材料的混合物。在下伏層405是有機材料的實施例中,有機材料可以是可交聯的聚合材料,可以經由旋轉塗佈製程將該可交聯的聚合材料塗覆到基板400上,接著熱固化,使得之後可以將光阻層407塗敷在其上。在下伏層405是無機材料的實施例中,無機材料可以是藉由任何合適的沉積技術(例如CVD、ALD、PVD、旋轉塗佈塗覆、噴塗塗覆等等)所形成的介電材料。Figure 4 depicts a
下伏層405用作平坦化層、防反射塗層、及/或光酸方向控制體,其可以在將圖案轉移到下伏的硬質掩模層403及目標層402中時提供蝕刻抗性及線緣粗糙度控制。來自下伏層405的圖案化抵抗功能性可以在抗蝕製程的轉移期間與下伏的硬質掩模層403一起作用。在一個實例中,下伏層405不與光阻層407交互作用,並且與光阻層407沒有介面混合及/或擴散或交叉污染。Underlying
下伏層405包括一或更多種添加劑,例如酸劑(例如光酸產生劑(PAG)或酸催化劑)、鹼劑、增黏劑、或光敏成分。可以將該一或更多種添加劑設置在有機溶劑或樹脂及/或無機基質材料中。酸劑的合適實例包括選自由以下項目所組成的群組的光酸產生劑(PAG)及/或酸催化劑:磺酸(例如對甲苯磺酸、苯乙烯磺酸)、磺酸鹽(例如對甲苯磺酸吡啶鎓、三氟甲烷磺酸吡啶鎓、3-硝基苯磺酸吡啶鎓)、及上述項目的混合物。合適的有機溶劑可以包括含有二或更多個重複單元及聚合主鏈的均聚物或更高級的聚合物。有機溶劑的合適實例包括但不限於丙二醇甲醚乙酸酯(PGMEA)、乳酸乙酯(EL)、丙二醇甲醚(PGME)、丙二醇正丙醚(PnP)、環己酮、丙酮、γ-丁內酯(GBL)、及上述項目的混合物。The
在一個實例中,下伏層405在微影蝕刻暴露製程、預暴露烘烤製程、或後暴露烘烤製程期間提供活性的酸劑、鹼劑、或鐵性/非鐵性物質,以協助控制來自上光阻層407的光酸流動方向。In one example,
硬質掩模層403可以是由以下項目所組成的群組所製造的ARC層:氧化矽、氮化矽、氮氧化矽、碳化矽、非晶碳、摻雜過的非晶碳、TEOS氧化物、USG、SOG、有機矽、含氧化物的材料、氮化鈦、氮氧化鈦、上述項目的組合等等。
光阻層407可以是能夠進行化學放大反應的正性光阻劑及/或負性光阻劑。光阻層407是聚合物有機材料。The
如上文所論述,可以在微影蝕刻暴露製程、預暴露烘烤製程、或後暴露烘烤製程(特別是後暴露烘烤製程)期間施加來自電極116的電場以及來自磁鐵296的磁場。在圖4中所描繪的實例中,在微影蝕刻暴露製程期間施加電場及/或磁場。在微影蝕刻暴露製程期間,光輻射412被引導到光阻層407的第一區域408,而光阻層407的第二區域406被光掩模410保護。在光酸產生劑(PAG)暴露於光輻射412(例如UV光輻射)時,光酸(在圖4中示為e
-)產生在光阻層407中暴露的第一區域408中。然而,通常,光酸的移動一般是隨機的,並且光酸分佈可以不均勻地分佈在第一區域408中或可能沒有明顯的邊界設定在形成於界定在第一區域408與第二區域406之間的平面(與第二區域406交接)上的介面430處,從而造成一部分的光酸漂移及擴散到不想要的產生光酸的第二區域406中(如箭頭422中所示)。如此,漂移到第二區域406中(如箭頭422中所示)的側向光酸移動(例如與基板400的平坦面平行的方向)可能造成線緣粗糙、解析度損失、光阻劑走位、輪廓變形,因此對下伏的目標層402造成不準確的特徵轉移及/或最終導致元件故障。
As discussed above, the electric field from electrode 116 and the magnetic field from
儘管本文所論述的實例被示為來自光酸的電子的移動,但注意,任何合適的物質(包括電荷、帶電顆粒、光子、離子、電子、或呈任何形式的反應物質)也可以在向光阻層407施加電場時具有類似的效果。Although the examples discussed herein are shown as the movement of electrons from a photoacid, note that any suitable species (including charges, charged particles, photons, ions, electrons, or reactive species in any form) may also be present in the movement of electrons toward the photoacid. The
藉由向光阻層407施加電場及/或磁場,可以高效地控制及約束暴露的第一區域408中的光酸的分佈。如向光阻層407所施加的電場可以在側向運動(例如由箭頭422所示的x方向)最小的情況下在垂直方向(例如由箭頭416及420所示且與基板400的平坦面實質垂直的y方向)上移動光酸而不會擴散到相鄰的第二區域406中。一般而言,光酸可以具有可以受向其施加的電場或磁場影響的某種極性,因此用某些方向使光酸定向,因此產生暴露的第一區域408中的光酸所需的指向性移動而不會跨越到相鄰的受保護的第二區域406中。在一個實例中,可以進一步控制光酸以沿著側向平面(如由箭頭414所示)指向性地用縱向方向(例如由箭頭428所示的z方向,其被界定在與被光掩模410保護的光阻層407的第二區域406交接的平面上)移動,以便控制約束在暴露的第一區域408中的光酸的縱向分佈而不會用x方向(如由箭頭422所示)跨越到光阻層407的第二區域406中。向光阻層407產生的磁場可以使得電子沿著某個磁力線(例如縱向方向(例如由箭頭428所示的z方向))環行,以便進一步用所需的三維分佈控制光酸。磁場與電場之間的交互作用可以依需要最佳化某個路徑上的光酸軌跡線,並且將其約束在暴露的第一區域408中。並且,需要垂直光酸移動來消除由光暴露工具自然產生的駐波,因此增強了暴露解析度。在一個實施例中,可以在微影蝕刻暴露製程、預烘烤製程、或後烘烤製程期間向光阻層407施加具有約0.1 MV/m與約100 MV/m之間的強度的電場,以將光阻層407中所產生的光酸約束在垂直方向上(例如y方向上)。在一個實施例中,可以在微影蝕刻暴露製程、預烘烤製程、或後烘烤製程期間向光阻層407施加0.1特斯拉(T)與10 特斯拉(T)之間的磁場以及電場,以將光阻層407中所產生的光酸約束在縱向方向及垂直方向上(例如y及z方向上),其中最小限度地約束在側向方向上(例如x方向上)。在將磁場與電場結合的同時,可以進一步將如所產生的光酸約束為在縱向方向上(例如在由箭頭428所示的方向上)分佈,從而沿著暴露的第一區域408內的介面430平行地保留在光阻層407的第一區域408中。By applying an electric field and/or a magnetic field to the
圖5描繪光酸分佈的另一個輪廓,該光酸分佈可以藉由利用電場、磁場、或上述項目的組合來控制以在後暴露烘烤製程期間特別控制位於某些區處的光酸。在微影蝕刻暴露製程之後,光阻層407的暴露區域502已經由如圖4中所示的第一區域408化學改變。在微影蝕刻暴露光阻層407之後,接著執行後暴露烘烤製程以固化光阻層407,包括光阻層407中的暴露區域502及其餘區域(例如在微影蝕刻暴露製程期間被光掩模屏蔽的區域)。在後暴露烘烤製程期間,使用可以協助在所需的方向(如由圖5中的箭頭506所示)上分佈/移動光阻層407內的光酸的方式,來控制來自下伏層405的酸劑(例如光酸)、鹼劑、或其他合適的添加劑。下伏層405中的添加劑在後暴露烘烤製程期間(或甚至在微影蝕刻暴露製程期間)擴散到上光阻層504,這有助於改善光阻層407的靈敏度,以便維持光阻層407的垂直輪廓。其結果是,在顯影及沖洗之後,可以在光阻層407中獲得實質垂直的輪廓。Figure 5 depicts another profile of a photoacid distribution that can be controlled by utilizing electric fields, magnetic fields, or a combination thereof to specifically control photoacid located at certain regions during the post-exposure bake process. After the lithography exposure process, the exposed
在一個實施例中,可以在後暴露烘烤製程期間向上(如由箭頭506所示)熱驅動來自下伏層405的添加劑(舉一個例子,例如酸劑或光酸),使得可以高效地控制光阻層407的輪廓。並且,因為可以在後暴露烘烤製程期間藉由電場、磁場、或上述項目的組合向上用特定的方向驅動來自下伏層405的添加劑,可以將從添加劑提供的電子控制在某個移動路徑上(例如絕大多數是在朝向光阻層407的垂直方向上)。藉由這樣做,可以依需要在光阻層407中界定及約束所需的垂直結構。注意,圖4-5中所描繪的光阻層407的實例被形成為具有筆直的邊緣輪廓(例如垂直的側壁)。然而,可以依需要用任何所需的形狀(例如錐形或擴口開口)來形成光阻層407的輪廓。In one embodiment, additives (such as acid or photoacid, for example) from
在後暴露烘烤製程之後,可以執行各向異性蝕刻製程或其他合適的圖案化/蝕刻製程以依需要將特徵轉移到下伏層405、硬質掩模層403、及目標層402中。After the post-exposure bake process, an anisotropic etch process or other suitable patterning/etching process may be performed to transfer features into
圖6描繪方法600的流程圖,該方法用於利用設置在光阻層下方的下伏層來協助在微影蝕刻暴露製程期間或在預暴露烘烤製程或後暴露烘烤製程期間控制光阻層中的光酸分佈/擴散。方法600藉由將基板(例如上述的基板400)定位到處理腔室(例如圖2-3中所描繪的處理腔室200)中開始於操作602處,其中電極組件及磁性組件被設置在該處理腔室中。6 depicts a flow diagram of a
在操作604處,在定位基板400之後,可以向處理腔室個別或共同施加電場及/或磁場(在微影蝕刻暴露製程及/或後暴露烘烤製程期間施加),以控制光阻層內的光酸移動,其中下伏層被設置在該光阻層下方。在向設置在基板上的光阻層及下伏層個別或共同施加電場及/或磁場之後,如所產生的光酸可以主要在垂直方向、縱向方向、圓形方向上移動而不是在側向方向上移動。由設置在光阻層下方的下伏層所提供的協助的結果是,可以高效地控制光阻層中的光酸移動。At
在操作606處,在暴露製程之後,執行後暴露烘烤製程以固化光阻層及下伏層。在烘烤製程期間,也可以向下伏層提供能量(例如電能、熱能、或其他合適的能量)。在本文所描繪的一個實例中,能量是在後暴露烘烤製程期間提供到基板的熱能。來自下伏層的添加劑也可以協助控制光阻層內的光酸的流動方向。藉由利用具有圖案化的光阻層的預定路徑中的光酸分佈的指向性控制,可以獲得具有高的解析度、劑量靈敏度、對線塌陷及隨機故障的抗性、及最小線緣粗糙度的所需邊緣輪廓。在一個實例中,藉由利用下伏層結構,可以將臨界尺度均勻性(CDU)(例如臨界尺度變化)從一般從3 nm到6 nm減少到低達1 nm到2 nm或更小,這為約50%到600%的均勻性改善。可以將線寬粗糙度(LWR)從一般從3 nm到5 nm減少到低達1 nm到2 nm或更小,這為約50%到600%的粗糙度改善。並且,可以將第一溝槽的第一尖端與第二溝槽的第二尖端之間的距離從一般從30 nm到50 nm減少到低達10 nm到20 nm。並且,也可以高效地消除及減少一些類型的缺陷(例如圓角化、走位、變形的輪廓、歪斜的側壁輪廓)。At
先前所述的實施例具有許多優點,包括下述。例如,本文中所揭露的實施例可以在解析度高及邊緣輪廓尖銳的情況下減少或消除線緣/線寬粗糙度。上述優點是說明性而非限制性的。所有實施例不一定具有所有的優點。The previously described embodiments have many advantages, including the following. For example, embodiments disclosed herein can reduce or eliminate line edge/line width roughness at high resolution and sharp edge profiles. The above advantages are illustrative rather than restrictive. All embodiments do not necessarily have all advantages.
儘管以上內容是針對本揭示內容的實施例,但也可以在不脫離本揭示內容的基本範圍的情況下設計本揭示內容的其他的及另外的實施例,且本揭示內容的範圍是由隨後的申請專利範圍所決定的。Although the above is directed to embodiments of the disclosure, other and additional embodiments of the disclosure may be devised without departing from the essential scope of the disclosure, and the scope of the disclosure is determined by what follows. Determined by the scope of the patent application.
100:基板 102:目標材料 104:光阻層 106:開口 108:線寬粗糙度(LWR) 150:毛刺輪廓 200:處理腔室 202:腔室壁 204:供應源 206:側壁 208:底部 210:蓋組件 212:處理容積 214:泵送端口 216:電極組件 224:主體 226:第二表面 232:加熱器 234:第一表面 238:基板支撐組件 240:基板 242:桿 245:材料層 246:波紋管 250:光阻層 255:潛像線 258:第一電極 260:第二電極 270:電源 274:電源 275:電源 280:入口 290:致動器 296:磁鐵 310:第一終端 311:第二終端 320:天線 321:天線 323:終端 325:終端 330:第一支撐結構 331:第二支撐結構 355:帶電物質 370:雙向箭頭 400:基板 402:目標層 403:硬質掩模層 404:膜結構 405:下伏層 406:第二區域 407:光阻層 408:第一區域 410:光掩模 412:光輻射 414:箭頭 416:箭頭 420:箭頭 422:箭頭 428:箭頭 430:介面 502:暴露區域 504:上光阻層 506:箭頭 600:方法 602:操作 604:操作 606:操作 370':箭頭 A:距離 A':距離 B:距離 C:距離 d:距離 L:長度 L1:長度 W:寬度 100:Substrate 102:Target material 104: Photoresist layer 106:Open your mouth 108: Line width roughness (LWR) 150: Burr outline 200: Processing Chamber 202: Chamber wall 204:Supply source 206:Side wall 208: Bottom 210: Cover assembly 212: processing volume 214:Pumping port 216:Electrode assembly 224:Subject 226: Second surface 232:Heater 234:First surface 238:Substrate support assembly 240:Substrate 242:rod 245:Material layer 246: Bellows 250: Photoresist layer 255: latent image line 258:First electrode 260: Second electrode 270:Power supply 274:Power supply 275:Power supply 280:Entrance 290: Actuator 296:Magnet 310: First terminal 311: Second terminal 320:Antenna 321:Antenna 323:Terminal 325:Terminal 330:First support structure 331: Second support structure 355:Charged substances 370: Two-way arrow 400:Substrate 402: Target layer 403: Hard mask layer 404: Membrane structure 405:Underlying layer 406:Second area 407: Photoresist layer 408:First area 410:Photomask 412: Optical radiation 414:Arrow 416:arrow 420:Arrow 422:Arrow 428:arrow 430:Interface 502: Exposed area 504: Apply photoresist layer 506:arrow 600:Method 602: Operation 604: Operation 606: Operation 370':arrow A:Distance A':distance B:distance C: distance d: distance L: length L1:Length W: Width
可以藉由參照實施例來獲得上文所簡要概述的本揭示內容的更詳細說明以及可以用來詳細了解本揭示內容的上述特徵的方式,附圖中繪示了該等實施例中的一些。然而,要注意,附圖僅繪示此揭示內容的典型實施例,並且因此不要將該等附圖視為本揭示內容的範圍的限制,因為本揭示內容可以容許其他同等有效的實施例。A more detailed description of the disclosure briefly summarized above, and the manner in which the above-described features of the disclosure may be understood in detail, may be obtained by reference to the embodiments, some of which are illustrated in the accompanying drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this disclosure and are therefore not to be considered limiting of its scope, for the disclosure may admit to other equally effective embodiments.
圖1描繪在本領域中常規上設置在基板上的圖案化的光阻層的示例性結構的俯視圖;1 depicts a top view of an exemplary structure of a patterned photoresist layer conventionally disposed on a substrate in the art;
圖2是依據一個實施例用於處理基板的裝置的示意橫截面圖;Figure 2 is a schematic cross-sectional view of an apparatus for processing a substrate according to one embodiment;
圖3是設置在圖2的裝置中的電極組件的一個實施例的俯視圖;Figure 3 is a top view of one embodiment of an electrode assembly disposed in the device of Figure 2;
圖4描繪在暴露製程期間的設置在膜結構上的光阻層的酸分佈控制;Figure 4 depicts acid distribution control of a photoresist layer disposed on a film structure during an exposure process;
圖5描繪在後暴露烘烤製程期間的具有所需輪廓的膜結構上的光阻層的酸分佈控制;及Figure 5 depicts acid distribution control of a photoresist layer on a film structure with a desired profile during a post-exposure bake process; and
圖6是在暴露製程期間控制光阻層的酸分佈的一個方法的流程圖。Figure 6 is a flow chart of a method of controlling acid distribution of a photoresist layer during an exposure process.
為了促進了解,已使用了相同的參考標號(於可能處)以指定該等圖式通用的相同元件。此外,一個實施例的元件可被有利地調適以供用於本文中所述的其他實施例中。To facilitate understanding, the same reference numbers have been used where possible to designate the same elements common throughout the drawings. Furthermore, elements of one embodiment may be advantageously adapted for use in other embodiments described herein.
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic storage information (please note in order of storage institution, date and number) without Overseas storage information (please note in order of storage country, institution, date, and number) without
400:基板 402:目標層 403:硬質掩模層 404:膜結構 405:下伏層 406:第二區域 407:光阻層 408:第一區域 410:光掩模 412:光輻射 414:箭頭 416:箭頭 420:箭頭 422:箭頭 428:箭頭 430:介面 400:Substrate 402: Target layer 403: Hard mask layer 404: Membrane structure 405:Underlying layer 406:Second area 407: Photoresist layer 408:First area 410:Photomask 412: Optical radiation 414:Arrow 416:arrow 420:Arrow 422:Arrow 428:arrow 430:Interface
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CN119439649A (en) | 2025-02-14 |
US11880137B2 (en) | 2024-01-23 |
JP2022518411A (en) | 2022-03-15 |
US11650506B2 (en) | 2023-05-16 |
KR20210096302A (en) | 2021-08-04 |
TWI814921B (en) | 2023-09-11 |
US20200233307A1 (en) | 2020-07-23 |
TW202028879A (en) | 2020-08-01 |
WO2020149903A1 (en) | 2020-07-23 |
US20230229089A1 (en) | 2023-07-20 |
TW202401171A (en) | 2024-01-01 |
CN113196452A (en) | 2021-07-30 |
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