TWI792566B - Method of manufacturing a circuit board - Google Patents

Abstract

A method of manufacturing a circuit board includes: providing a metal substrate including a dielectric layer and a metal foil stacked together; pressing a photosensitive layer on the metal foil and exposing and developing the photosensitive layer to form a photosensitive pattern layer, wherein the photosensitive pattern layer includes a plurality of wiring grooves and at least one auxiliary groove between two adjacent wiring grooves; electroplating to form wiring portions corresponding to the wiring grooves and at least one auxiliary conductive portion corresponding to the at least one auxiliary groove, wherein the wiring portions and the at least one auxiliary conductive portion together form a conductive pattern layer; removing the photosensitive pattern layer, and removing a portion of the metal foil exposing from the conductive pattern layer by quickly etching, thereby forming a conductive design layer by the metal foil corresponding to the conductive pattern layer, wherein the wiring portions and portions of the conductive design layer corresponding to the wiring portions together form conductive wiring lines, the at least one auxiliary conductive portion and at least one portion of the conductive design layer corresponding to the at least one auxiliary conductive portion together form an auxiliary pattern; and removing the auxiliary pattern.

Description

How to make a circuit board

The present application relates to the field of circuit boards, in particular to a method for manufacturing a circuit board.

With the diversification of electronic products, the precision requirements for circuit boards are increasing. However, in the face of circuit boards with relatively sparse distribution of circuits, the problem of uneven plating thickness is likely to occur when making circuits by electroplating.

In view of this, the present application provides a method for manufacturing a circuit board that is beneficial to reduce uneven plating.

A method for manufacturing a circuit board, comprising the following steps: providing a metal substrate, including a dielectric layer and a metal foil disposed on the surface of the metal substrate; pressing a photosensitive film on the side of the metal foil facing away from the dielectric layer , and the photosensitive film is exposed and developed to form a photosensitive graphic layer, wherein the graphic layer includes a plurality of wire grooves and at least one auxiliary groove between two adjacent wire grooves; electroplating is used to correspond to the wire grooves forming a line part and forming an auxiliary conductive part corresponding to the auxiliary groove, wherein the line part and the auxiliary conductive part together form a conductive pattern layer; removing the photosensitive pattern layer, and removing the exposed part of the metal foil not covered by the conductive pattern layer by rapid etching, so that the metal foil is made into a conductive pattern layer corresponding to the conductive pattern layer , wherein, the line part and the part corresponding to the line part in the conductive pattern layer form a conductive line, and the auxiliary conductive part and the part corresponding to the auxiliary conductive part in the conductive pattern layer form an auxiliary pattern ; and removing the auxiliary graphics.

As a solution of the present application, the auxiliary pattern is removed by etching.

As a solution of the present application, the auxiliary pattern is removed by drilling.

As a solution of the present application, the auxiliary pattern is removed by the drilling method and a groove or a through hole is formed on the dielectric layer, and the groove or the through hole is formed with a solder resist material or a resin material. The hole is filled.

As a solution of the present application, the metal substrate further includes at least one circuit layer, and the circuit layer is embedded in the dielectric layer and spaced from the metal foil.

As a solution of the present application, the two metal foils are disposed on two opposite sides of the dielectric layer.

As a solution of the present application, after removing the auxiliary pattern, further includes: building up the circuit board.

The manufacturing method of the circuit board of the present application, it forms the auxiliary conductive part between the circuit parts when electroplating to form the conductive pattern layer, and then quickly etches the conductive circuit and the auxiliary pattern to form the auxiliary pattern Remove, so as to achieve without affecting the function of the circuit board, it is beneficial to improve the uniformity of metal deposition everywhere during electroplating, so that the thickness of each of the conductive lines formed at last is more uniform, thereby improving the quality of the lines in the circuit board.

10: Metal substrate

11: Dielectric layer

13: metal foil

15: Line layer

151: The first line layer

153: Second line layer

30: photosensitive film

30a: photosensitive graphics layer

31: trunking

33: Auxiliary slot

51: Line Department

53: Auxiliary conductive part

50: Conductive graphic layer

130: conductive pattern layer

60: Conductive circuit

63: Auxiliary graphics

110: through hole

70:Single-sided metal plate

71: Dielectric layer

73: metal layer

FIG. 1 is a schematic cross-sectional view of a metal substrate according to an embodiment of the present application.

FIG. 2 is a schematic cross-sectional view of disposing a photosensitive film on the metal substrate shown in FIG. 1 .

FIG. 3 is a schematic cross-sectional view of exposing and developing the photosensitive film shown in FIG. 2 to form a photosensitive graphic layer.

FIG. 4 is a schematic cross-sectional view of forming a conductive pattern layer on the metal foil shown in FIG. 3 .

FIG. 5 is a schematic cross-sectional view of removing the photosensitive pattern layer in FIG. 4 and forming a conductive pattern layer.

FIG. 6 is a schematic cross-sectional view of a circuit board according to an embodiment of the present application.

FIG. 7 is a schematic cross-sectional view of a circuit board according to another embodiment of the present application.

FIG. 8 is a schematic cross-sectional view of a circuit board according to yet another embodiment of the present application.

The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of them.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the application. The terms used herein in the description of the application are for the purpose of describing specific embodiments only, and are not intended to limit the application.

Some implementations of the present application will be described in detail below with reference to the drawings. In the case of no conflict, the following embodiments/implementations and features in the embodiments/implementations can be combined with each other.

Please refer to Fig. 1 to Fig. 6, the manufacturing method of the circuit board of an embodiment of the present application, it comprises the following steps:

Step S1 , please refer to FIG. 1 , providing a metal substrate 10 , the metal substrate 10 includes a dielectric layer 11 and a metal foil 13 disposed on the surface of the metal substrate 10 .

In some embodiments, the metal substrate 10 may further include at least one circuit layer 15 embedded in the dielectric layer 11 and spaced from the metal foil 13 . In this embodiment, the metal substrate 10 includes a two-layer wiring layer 15 as an example for illustration. Specifically, the two circuit layers 15 are respectively the first circuit layer 151 and the second circuit layer 153, and the first circuit layer 151 and the second circuit layer 153 are spaced apart along the first direction and embedded in the Dielectric layer 11. The first circuit layer 151 can also be electrically connected to the second circuit layer 153 .

In some embodiments, the metal foil 13 may be formed on one or more sides of the dielectric layer 11 . In this embodiment, it is taken as an example that the metal foil 13 is formed on two opposite sides of the dielectric layer 11 spaced along the first direction.

In some embodiments, the metal foil 13 can also be electrically connected to the circuit layer 15 . In this embodiment, specifically, the metal foil 13 adjacent to the first circuit layer 151 can be electrically connected to the first circuit layer 151, and the metal foil 13 adjacent to the second circuit layer 153 can be It is electrically connected with the second circuit layer 153 .

Step S2, please refer to FIG. 2 and FIG. 3 , press the photosensitive film 30 on the side of the metal foil 13 away from the dielectric layer 11, and expose and develop the photosensitive film 30 to form a photosensitive pattern layer 30a. Wherein, each photosensitive pattern layer 30a includes a plurality of wire grooves 31 and at least one auxiliary groove 33 between two adjacent wire grooves 31 .

In this embodiment, the two photosensitive films 30 are pressed and bonded to the two metal foils 13 respectively, and are exposed and developed to form two photosensitive pattern layers 30a.

Step S3, please refer to FIG. 4 , electroplating to form a line portion 51 corresponding to the wire groove 31 and an auxiliary conductive portion 53 corresponding to the auxiliary groove 33, wherein the line portion 51 and the auxiliary conductive portion 53 jointly form a conductive graphics layer 50 .

In this embodiment, the two conductive pattern layers 50 are respectively formed on the surfaces of the two metal foils 13 .

Due to the existence of the auxiliary groove 33 located between the two wire grooves 31, when forming the circuit part 51 by electroplating, an auxiliary conductive part is formed between two adjacent circuit parts 51 corresponding to the auxiliary groove 33 53 , which is beneficial to balance the current during electroplating, thereby facilitating the uniformity of metal deposition everywhere during electroplating, and further makes the thickness of each of the circuit parts 51 more uniform.

Step S4, please refer to FIG. 5, remove the photosensitive pattern layer 30a, and remove the exposed part of the metal foil 13 that is not covered by the conductive pattern layer 50 by rapid etching, so that the metal foil 13 is made A conductive pattern layer 130 corresponding to the conductive pattern layer 50 is formed. Wherein, the line part 51 and the part corresponding to the line part 51 in the conductive pattern layer 130 form a conductive line 60, and the auxiliary conductive part 53 and the auxiliary conductive part 53 in the conductive pattern layer 130 The corresponding parts constitute the auxiliary figure 63 .

In this embodiment, the two conductive lines 60 are respectively formed on two opposite sides of the dielectric layer 11 , and the two auxiliary patterns 63 are respectively formed on two opposite sides of the dielectric layer 11 .

Step S5, please refer to FIG. 6 , remove the auxiliary pattern 63, thereby manufacturing the circuit board.

In some embodiments, the auxiliary pattern 63 can be removed by partial etching.

In some embodiments, the auxiliary pattern 63 can also be removed by drilling. Wherein, it only needs to ensure the depth of the drilling to completely remove the auxiliary figure 63 . For example, the auxiliary pattern 63 is just removed during drilling; as another example, part of the dielectric layer 11 is also removed during drilling so as to form a groove (not shown) on the dielectric layer 11, and by Solder resist material (such as solder resist ink) or resin material fills the grooves on the dielectric layer 11; for another example, as shown in FIG. 7, the inside of the dielectric layer 11 is not damaged when drilling Under the premise of the line, the auxiliary pattern 63 is removed while penetrating through the dielectric layer 11 to form a through hole 110 on the dielectric layer 11, and the dielectric layer 11 is formed by solder resist material or resin material. The through-holes 110 above are filled.

In other implementations, the auxiliary graphics 63 can also be removed in other ways, not limited to the ways described above.

In some embodiments, the manufacturing method of the circuit board may further include step S6 after step S5, as shown in FIG. 8 , pressing a single-sided metal plate 70 on the conductive circuit 60 and performing browning, for subsequent layering operations. Wherein, the single-sided metal plate 70 includes a laminated dielectric layer 71 and a metal layer 73 , and the side of the dielectric layer 71 away from the metal layer 73 is combined with the conductive circuit 60 .

The manufacturing method of the circuit board of the present application is to form the auxiliary conductive part 53 between the circuit parts 51 when the conductive pattern layer 50 is formed by electroplating, and then quickly etch to form the conductive circuit 60 and the auxiliary pattern 63. The auxiliary pattern 63 is removed, so as to realize that without affecting the function of the circuit board, it is beneficial to improve the uniformity of metal deposition everywhere during electroplating, so that the thickness of each of the conductive lines 60 formed at last is more uniform, and then the circuit is improved. The quality of the lines in the board.

11: Dielectric layer

13: metal foil

30a: photosensitive graphics layer

31: trunking

33: Auxiliary slot

Claims (7)

A method for manufacturing a circuit board, comprising the following steps: providing a metal substrate, including a dielectric layer and a metal foil disposed on the surface of the metal substrate; pressing a photosensitive film on the side of the metal foil facing away from the dielectric layer , and the photosensitive film is exposed and developed to form a photosensitive graphic layer, wherein the photosensitive graphic layer includes a plurality of wire grooves and at least one auxiliary groove between two adjacent wire grooves; The groove forms a line portion and forms an auxiliary conductive portion corresponding to the auxiliary groove, wherein the line portion and the auxiliary conductive portion jointly form a conductive pattern layer; the photosensitive pattern layer is removed, and the metal is removed by rapid etching The exposed part of the foil is not covered by the conductive pattern layer, so that the metal foil is made into a conductive pattern layer corresponding to the conductive pattern layer, wherein the line part and the conductive pattern layer are connected to the conductive pattern layer The part corresponding to the line part forms a conductive line, and the auxiliary conductive part and the part corresponding to the auxiliary conductive part in the conductive pattern layer form an auxiliary pattern; and removing the auxiliary pattern. The method for manufacturing a circuit board according to claim 1, wherein the auxiliary pattern is removed by etching. The method for manufacturing a circuit board according to claim 1, wherein the auxiliary pattern is removed by drilling. The method for manufacturing a circuit board according to claim 3, wherein the auxiliary pattern is removed by the drilling method and a groove or a through hole is formed on the dielectric layer, and the solder resist material or The resin material fills the groove or the through hole. The method for manufacturing a circuit board according to claim 1, wherein the metal substrate further includes at least one circuit layer, and the circuit layer is embedded in the dielectric layer and spaced from the metal foil. The method for manufacturing a circuit board as claimed in claim 1, wherein the two metal foils are disposed on two opposite sides of the dielectric layer. The method for manufacturing a circuit board according to claim 1, further comprising: building up the circuit board after removing the auxiliary pattern.

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