TWI761048B - Display device - Google Patents

Abstract

A display device includes a color display panel and a shutter panel. The color display panel includes first scan lines, first data lines, and first pixels. The first pixels are electrically connected to the first scan lines and the first data lines. The shutter panel includes second scan lines, second data lines, second pixels, and a light-shielding structure. The second pixels are electrically connected to the second scan lines and the second data lines. The two adjacent scan lines and the two adjacent data lines define a pixel area. The light shielding structure includes scan line shielding parts, data line shielding parts, first parts and second parts. The first parts are parallel to the scanning line shading parts and overlap the pixel area. The second parts are parallel to the data line shielding parts and overlap the pixel area.

Description

display device

The present invention relates to a display device, and more particularly, to a display device including two display panels.

In recent years, in order to increase the light-dark contrast ratio of a display device, a shutter panel is often superimposed on a color display panel. A shutter panel is a panel that controls the passage of light. In the part where the light is not expected to pass through (such as the black part of the display screen), the shutter panel can block the light, and in the part where the light is expected to pass through (such as the color part of the display screen), the shutter panel allows the light to pass through, thereby allowing the light to pass through. Increases the light and dark contrast of the display device.

The present invention provides a display device, which can improve the problem of mesh-like lines appearing on the display screen caused by the shutter panel.

The present invention provides a display device capable of improving the problem of insufficient resolution of a shutter panel.

An embodiment of the present invention provides a display device. Display device includes color color display panel and shutter panel. The color display panel includes a plurality of first scan lines, a plurality of first data lines and a plurality of first pixels. The first pixel is electrically connected to the first scan line and the first data line. The shutter panel overlaps the color display panel. The shutter panel includes a plurality of second scan lines, a plurality of second data lines, a plurality of second pixels and a light shielding structure. The second pixel is electrically connected to the second scan line and the second data line. Two adjacent scan lines and two adjacent data lines define a pixel area. The light shielding structure includes a plurality of scan line light shielding parts, a plurality of data line light shielding parts, a plurality of first parts and a plurality of second parts. The scan line light shielding portion overlaps and is parallel to the second scan line. The width of each scanning line light shielding portion is W1. The data line shading portion overlaps and is parallel to the second data line. The width of each data line light-shielding portion is W2. The first portion is parallel to the scan line shielding portion and overlaps the pixel region. The width of each first portion is Wa, 0.8W1<Wa<1.2W1. The second portion is parallel to the data line shading portion and overlapped with the pixel area. The width of each second portion is Wb, 0.8W2<Wb<1.2W2.

An embodiment of the present invention provides a display device. The display device includes a color display panel and a shutter panel. The color display panel includes a plurality of first scan lines, a plurality of first data lines and a plurality of first pixels. The first pixel is electrically connected to the first scan line and the first data line. The shutter panel overlaps the color display panel. The shutter panel includes a plurality of second scan lines, a plurality of second data lines, a plurality of second pixels and a light shielding structure. The second pixel is electrically connected to the second scan line and the second data line. Two adjacent second scan lines and two adjacent second data lines define a pixel area. The light shielding structure includes a plurality of scan line light shielding parts, a plurality of first parts, a plurality of data line light shielding parts and a plurality of second parts. The scan line shielding part and the first part are parallel to the second scan Wire. The data line shading portion and the second portion are parallel to the second data line. The scan line shielding portion and the data line shielding portion are respectively overlapped with the second scan line and the second data line. The first part and the second part overlap in the pixel area. The first part and the second part define each pixel area into n areas, where n is 6 or 9.

1, 2, 3: Display device

10: Color display panel

20, 20a, 20b: Shutter panel

30 Backlight Modules

100, 200: the first substrate

102, 202: Gate insulating layer

104: Interlayer dielectric layer

106, 204: Flat layer

108: Buffer layer

110, 210: Second substrate

120, 220: liquid crystal layer

130, 230: The first polarizer

140, 240: Second polarizer

BM1, BM2: black matrix

C1: Part 1

C2: Part II

CE, COM, COMa, COM1: Common electrode

CF: Color Conversion Element

CH1, CH2: channel layer

D1, D2: drain

DL1: The first data line

DL2: Second data line

DLs: Data Line Shading

DR1: first direction

DR2: Second direction

DR3: Third Direction

DR4: Fourth direction

G1, G2: gate

H1, H2, O1, O2: Opening

PE1, PE2: pixel electrode

PX1: first pixel

PX2: Second pixel

PXr: pixel area

R: area

S1, S2: source

SL1: first scan line

SL2: Second scan line

SLs: Scan Line Shading

SP1: Red Subpixel

SP2: Green Subpixel

SP3: Blue Subpixel

SPr: sub-pixel area

SS: Shading structure

T1, T2: Active components

T2s: active element shading part

W1, W2, W3, Wa, Wb, W _DL1 , W _DL2 , W _G2 , W _SL1 , W _SL2 : Width

X1, X2: distance

FIG. 1A is a schematic top view of a color display panel according to an embodiment of the present invention.

FIG. 1B is a schematic top view of a shutter panel according to an embodiment of the present invention.

FIG. 1C is a schematic perspective view of a display device according to an embodiment of the present invention.

2 is a schematic top view of a shutter panel according to an embodiment of the present invention.

3A is a schematic top view of a shutter panel according to an embodiment of the present invention.

3B is a schematic perspective view of a display device according to an embodiment of the present invention.

4 is a schematic top view of a shutter panel according to an embodiment of the present invention.

FIG. 1A is a schematic top view of a color display panel according to an embodiment of the present invention. FIG. 1B is a schematic top view of a shutter panel according to an embodiment of the present invention. FIG. 1C is a schematic perspective view of a display device according to an embodiment of the present invention.

Please refer to FIG. 1A , the color display panel 10 includes a plurality of first scan lines SL1 , a plurality of first data lines DL1 and a plurality of first pixels PX1 . In this embodiment, the color display panel 10 further includes a black matrix BM1.

The first scan line SL1 extends along the first direction DR1, and the first data line DL1 extends along the second direction DR2. The first direction DR1 intersects with the second direction DR2. In some embodiments, the width W _SL1 of each first scan line SL1 is about 22 to 24 microns. In some embodiments, the width W _DL1 of each of the first data lines DL1 is about 6 μm to 7 μm. In this embodiment, the first data line DL1 is wavy, but the invention is not limited to this. In other embodiments, the first data line DL1 is straight.

The first pixel PX1 is electrically connected to the first scan line SL1 and the first data line DL1. In this embodiment, each first pixel PX1 includes a red sub-pixel SP1, a green sub-pixel SP2 and a blue sub-pixel SP3. The arrangement order of the red sub-pixel SP1, the green sub-pixel SP2 and the blue sub-pixel SP3 can be adjusted according to actual requirements. In this embodiment, two adjacent first scan lines SL1 and two adjacent first data lines DL1 define a sub-pixel region SPr. In other words, two adjacent first scan lines SL1 and two adjacent first data lines DL1 define a sub-picture area of the element. In other words, the area surrounded by the pattern of the two adjacent first scan lines SL1 vertically projected on the substrate and the pattern of the two adjacent first data lines DL1 vertically projected on the substrate is defined as a sub-pixel area. The area of each first pixel PX1 is equal to the sum of the areas of the multiple sub-pixels. In this embodiment, the area of each first pixel PX1 is equal to the sum of the area of one red sub-pixel SP1, the area of one green sub-pixel SP2 and the area of one blue sub-pixel SP3, that is, three sub-pixels the area of the prime region SPr, but the present invention is not limited thereto. In other embodiments, each first pixel PX1 may further include sub-pixels of other colors, such as white sub-pixels, yellow sub-pixels, or sub-pixels of other colors.

The red sub-pixel SP1, the green sub-pixel SP2, and the blue sub-pixel SP3 each include an active element T1 and a pixel electrode PE1. The active element T1 includes a channel layer CH1, a gate electrode G1, a source electrode S1 and a drain electrode D1. The gate electrode G1 is electrically connected to a corresponding first scan line SL1. The gate electrode G1 overlaps the channel layer CH1, and a gate insulating layer (not shown) is sandwiched between the gate electrode G1 and the channel layer CH1. An interlayer dielectric layer (not shown) covers the gate electrode G1, and the interlayer dielectric layer is located between the first scan line SL1 and the first data line DL1. The source electrode S1 and the drain electrode D1 are located on the interlayer dielectric layer, and are electrically connected to the channel layer CH1 through the openings H1 and H2 respectively. The openings H1 and H2 at least penetrate through the interlayer dielectric layer. In this embodiment, the openings H1 and H2 penetrate through the gate insulating layer and the interlayer dielectric layer. The source electrode S1 is electrically connected to a corresponding one of the first data lines DL1.

Although in this embodiment, the active element T1 is a top gate type thin film transistor as an example, the invention is not limited to this. In other embodiments, the active element T1 may also be a bottom gate type or other type of thin film transistor. In some embodiments In the figure, a light-shielding structure (not shown) is disposed under the active element T1, thereby preventing light (eg, light emitted by the backlight module) from irradiating the channel layer CH1, resulting in leakage problems.

The flat layer (not shown) is located on the first data line DL1, the source electrode S1 and the drain electrode D1. The pixel electrode PE1 is located on the flat layer, and is electrically connected to the drain electrode D1 through the opening O1. The opening O1 penetrates at least the flat layer. In some embodiments, the red sub-pixel SP1, the green sub-pixel SP2, and the blue sub-pixel SP3 each further include a common electrode (not shown). In this embodiment, the color display panel is a liquid crystal panel, and the orientation of the liquid crystal molecules is controlled by the electric field between the common electrode and the pixel electrode PE1.

The black matrix BM1 overlaps the first scan line SL1 and the first data line DL1. In this embodiment, the black matrix BM1 includes a plurality of openings, and each opening overlaps the pixel electrode PE1 of one sub-pixel.

Referring to FIG. 1B , the shutter panel 20 includes a plurality of second scan lines SL2 , a plurality of second data lines DL2 , a plurality of second pixels PX2 and a light shielding structure SS.

The second scan line SL2 extends along the third direction DR3, and the second data line DL2 extends along the fourth direction DR4. The third direction DR3 intersects with the fourth direction DR4. In some embodiments, the third direction DR3 is substantially equal to the first direction DR1, and the fourth direction DR4 is substantially equal to the second direction DR2, but the invention is not limited thereto. In other embodiments, the third direction DR3 is substantially equal to the second direction DR2, and the fourth direction DR4 is substantially equal to the first direction DR1. In other embodiments, the third direction DR3 is not parallel to the first direction DR1 and the second direction DR2, and the fourth direction DR4 is not parallel to the first direction DR1 and the second direction DR2. In this embodiment, two adjacent second scan lines SL2 and two adjacent second data lines DL2 define a A pixel area PXr. In other words, two adjacent second scan lines SL2 and two adjacent second data lines DL2 define an area of one second pixel PX2. In other words, the area surrounded by the pattern of the two adjacent second scan lines SL2 projected vertically on the substrate and the pattern of the two adjacent second data lines DL2 projected vertically on the substrate is defined as a second pixel Area of PX2.

In some embodiments, the width W _SL2 of each second scan line SL2 is about 4.5 to 7.5 microns, for example, 4 to 6 microns. In some embodiments, the width W _DL2 of each of the second data lines DL2 is about 3 micrometers to 5 micrometers.

The second pixel PX2 is electrically connected to the second scan line SL2 and the second data line DL2. The second pixel PX2 includes an active element T2 and a pixel electrode PE2. The active element T2 includes a channel layer CH2, a gate electrode G2, a source electrode S2 and a drain electrode D2. The gate electrode G2 is electrically connected to a corresponding one of the second scan lines SL2. In some embodiments, the width WG2 of each gate _G2 is greater than the width W _SL2 of each second scan line SL2 , and the width WG2 of each gate _G2 is about 20 μm to 24 μm. In this embodiment, the width of each active element T2 is substantially equal to the width WG2 of each gate _G2 , and the width of each active element T2 is less than 40 μm. The width of each active element T2 in the extending direction perpendicular to the second scan line SL2 The width is less than 40 microns. The gate electrode G2 is directly connected to a corresponding one of the second scan lines SL2. The gate electrode G2 overlaps the channel layer CH2, and a gate insulating layer (not shown) is sandwiched between the gate electrode G2 and the channel layer CH2, and a gate insulating layer is sandwiched between the second scan line SL2 and the second data line DL2. The source electrode S2 and the drain electrode D2 are located on the gate insulating layer and are electrically connected to the channel layer CH2. The source electrode S2 is electrically connected to a corresponding second data line DL2. In this embodiment, the drain electrode D2 of the active element T2 extends along the third direction DR3 parallel to the second scan line SL2, thereby reducing the width of the active element T2.

Although in this embodiment, the active element T2 is a bottom gate type thin film transistor as an example, the invention is not limited to this. In other embodiments, the active element T2 may also be a top gate type or other type of thin film transistor. In some embodiments, when the active element T2 is a top gate type thin film transistor, a light-shielding structure (not shown) is disposed under the active element T2 to prevent light (such as light emitted by the backlight module) from irradiating the channel layer CH2, causing leakage problems.

The flat layer (not shown) is located on the second data line DL2, the source electrode S2 and the drain electrode D2. The pixel electrode PE2 is located on the flat layer, and is electrically connected to the drain electrode D2 through the opening O2. The opening O2 penetrates at least the flat layer.

The light-shielding structure SS includes a black matrix BM2 and a common electrode COM. In this embodiment, the black matrix BM2 includes a plurality of scan line light shielding portions SLs, a plurality of data line light shielding portions DLs, and a plurality of active element light shielding portions T2s. In this embodiment, the common electrode COM includes a plurality of first portions C1 and a plurality of second portions C2.

The scan line light shielding portion SLs overlaps and is parallel to the second scan line SL2. The scan line light shielding portion SLs extends along the third direction DR3. In some embodiments, the width W1 of each scan line light shielding portion SLs is about 20 to 24 microns.

The data line shielding portions DLs overlap and are parallel to the second data line DL2. The data line light shielding portion DLs extends along the fourth direction DR4. In some embodiments, the width W2 of each data line light shielding portion DLs is about 4 μm to 8 μm.

The active element light-shielding portion T2s overlaps the active element T2. In some embodiments, the width W3 of each active element light shielding portion T2s is greater than that of each scan line light shielding portion SLs , and the width of each active element light-shielding portion T2s is about 38 μm to 42 μm, in this embodiment. The difference between the width W3 of each active element light shielding portion T2s and the width W1 of each scanning line light shielding portion SLs is less than 20 μm. In some embodiments, the distance X1 between one edge of the active element shading portion T2s and the edge of the corresponding scan line shading portion SLs is less than 10 μm, and the other side edge of the active element shading portion T2s and the corresponding scanning line The distance X2 between the edges of the line light shielding portions SLs is less than 10 micrometers.

In this embodiment, the scan line light shielding portion SLs, the data line light shielding portion DLs, and the active element light shielding portion T2s are connected to each other and form a grid-shaped black matrix BM2.

The first portion C1 is parallel to the scan line light shielding portion SLs and the second scan line SL2. The first portion C1 extends along the third direction DR3. The first portion C1 overlaps the pixel area PXr. In some embodiments, the first portion C1 overlaps the pixel electrode PE2 of the pixel region PXr. In some embodiments, the distance in the fourth direction DR4 between two adjacent first portions C1 is approximately equal to the distance in the fourth direction DR4 between the first portion C1 and the adjacent scan line shielding portions SLs.

The second portion C2 is parallel to the data line shading portion DLs and the second data line DL2. The second portion C2 extends along the fourth direction DR4. The second portion C2 overlaps the pixel area PXr. In some embodiments, the second portion C2 overlaps the pixel electrode PE2 of the pixel region PXr. In some embodiments, the distance in the third direction DR3 between two adjacent second portions C2 is approximately equal to the distance in the third direction DR3 between the second portion C2 and the adjacent data line shading portions DLs .

In this embodiment, at least one of the first portion C1 and the second portion At least one of C2 is connected to each other and constitutes a common electrode COM. The first portion C1 and the second portion C2 between two adjacent second scan lines SL2 are connected to each other and form a common electrode COM extending along the third direction DR3, and the common electrode COM is separated from the second scan lines SL2. In this embodiment, the orientation of the liquid crystal molecules is controlled by the electric field between other common electrodes (not shown) and the pixel electrode PE2.

In this embodiment, the common electrode COM, the gate electrode G2 and the second scan line SL2 belong to the same film layer, and the materials include, for example, chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, Metals such as tantalum, aluminum, zinc, the above-mentioned alloys, the above-mentioned metal oxides, the above-mentioned metal nitrides, or a combination of the above, or other conductive materials. In this embodiment, the material of the black matrix BM2 includes, for example, black resin, chrome or chrome oxide, or other opaque metal materials. The black matrix BM2 and the common electrode COM belong to different film layers, and the black matrix BM2 and the common electrode COM are separated from each other. In some embodiments, the black matrix BM2 and the common electrode COM include different materials.

In some embodiments, the first portion C1 and the second portion C2 define each pixel region PXr into n regions R, where n is 6 or 9. In other words, the pattern of the first portion C1, the second portion C2 and the black matrix vertically projected on the substrate divides the pattern of the pixel region PXr vertically projected on the substrate into 6 or 9 regions. In this embodiment, n is 9. The area of the partial region R (a central region R in FIG. 1A ) is defined by the first portion C1 and the second portion C2 (or surrounded by the first portion C1 and the second portion C2 ). The area of another part of the region R (the eight regions R at the periphery in FIG. 1A ) is defined by the first part C1, the second part C2 and the black matrix BM2 (or defined by the first part C1, the second part C2 and the black matrix BM2). around).

The pixel region PXr is defined into a plurality of regions R with smaller areas by the first portion C1 and the second portion C2, so that the problem of insufficient resolution of the shutter panel 20 can be improved. The area of the region R is not less than 1 times the area of the first pixel PX1. In this embodiment, the area of the region R is approximately equal to the area of the first pixel PX1.

The width of each first portion C1 is Wa. The difference between the width Wa of each first portion C1 and the width W1 of each scan line light shielding portion SLs is less than 20% of the width W1, in other words, 0.8W1<Wa<1.2W1. The width of each second portion C2 is Wb. The difference between the width Wb of each second portion C2 and the width W2 of each data line light shielding portion DLs is less than 20% of the width W2, in other words, 0.8W2<Wb<1.2W2.

In this embodiment, the width Wa of each first portion C1 is approximately or equal to the width W1 of each scan line light shielding portion SLs, and the width Wb of each second portion C2 is approximately or equal to the width W2 of each data line light shielding portion DLs, Therefore, the problem of mesh lines appearing on the display screen can be avoided.

Please refer to FIGS. 1A , 1B and 1C. For convenience of description, FIG. 1C omits the pixel electrode PE1 and the black matrix BM1 of FIG. 1A and the pixel electrode PE2 of FIG. 1B . The display device 1 includes a color display panel 10 , a shutter panel 20 and a backlight module 30 . The color display panel 10 , the shutter panel 20 and the backlight module 30 are overlapped with each other. In this embodiment, the shutter panel 20 is located between the color display panel 10 and the backlight module 30 . The first scan line SL1 of the color display panel 10 overlaps the second scan line SL2 of the shutter panel 20 and the first portion C1 . A portion of the first data line DL1 of the color display panel 10 overlaps the second data line DL2 and the second portion C2 of the shutter panel 20 .

In this embodiment, the area of one first pixel PX1 of the color display panel 10 is approximately equal to the area of one region R, and nine first pixels PX1 overlap with one second pixel PX2.

2 is a schematic top view of a shutter panel according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 2 uses the element numbers and part of the content of the embodiment of FIG. 1A to FIG. 1C , wherein the same or similar numbers are used to represent the same or similar elements, and the same technical content is omitted. illustrate. For the description of the omitted part, reference may be made to the foregoing embodiments, which will not be repeated here.

The main difference between the shutter panel 20a of FIG. 2 and the shutter panel 20 of FIG. 1B is: the scan line shading part SLs, the data line shading part DLs, the active element shading part T2s, the first part C1 and the second part of the shutter panel 20a C2 belongs to the same layer.

In this embodiment, the light shielding structure SS includes a scan line light shielding portion SLs, a data line light shielding portion DLs, an active element light shielding portion T2s, a first portion C1 and a second portion C2, and the scan line light shielding portion SLs, the data line light shielding portion DLs, The active element light-shielding portion T2s, the first portion C1 and the second portion C2 are a black matrix connected together.

In this embodiment, the shutter panel 20a further includes a common electrode COMa. The common electrode COMa overlaps the first portion C1 and the second portion C2, and the common electrode COMa is located between two adjacent second scan lines SL2.

In some embodiments, the first portion C1 and the second portion C2 define each pixel region PXr into n regions R, where n is 6 or 9. In other words, the pattern of the first portion C1, the second portion C2 and the black matrix vertically projected on the substrate divides the pattern of the pixel region PXr vertically projected on the substrate into 6 or 9 regions. In this example , n is 9. The area of the partial region R (a central region R in FIG. 2 ) is defined by the first portion C1 and the second portion C2 (or surrounded by the first portion C1 and the second portion C2 ). The area of a part of the region R (a region R in the middle of the left and a region R in the middle of the right in FIG. 2) is defined by the first part C1, the second part C2 and the data line shading part DLs (or by the first part C1, the second part C2 and the data line shading part DLs). The portion C2 is surrounded by the data line shading portion DLs). The area of a part of the region R (a region R in the middle of the upper side and a region R in the middle of the lower side in FIG. 2 ) is defined by the first part C1, the second part C2 and the scan line shading part SLs (or by the first part C1, the second part The portion C2 is surrounded by the scan line light shielding portion SLs). The area of a part of the region R (the four regions R at the four corners in FIG. 2 ) is defined by the first part C1 , the second part C2 , the active element shading part T2s , the data line shading part DLs and the scanning line shading part SLs ( or surrounded by the first portion C1, the second portion C2, the active element light shielding portion T2s, the data line light shielding portion DLs and the scan line light shielding portion SLs).

In this embodiment, the common electrode COMa, the gate electrode G2 and the second scan line SL2 belong to the same film layer, and the materials include, for example, chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, Metals such as tantalum, aluminum, zinc, the above-mentioned alloys, the above-mentioned metal oxides, the above-mentioned metal nitrides, or a combination of the above, or other conductive materials. In this embodiment, the materials of the scan line shading portion SLs, the data line shading portion DLs, the active element shading portion T2s, the first portion C1 and the second portion C2 include, for example, black resin, chrome or chrome oxide or other opaque metals Material.

3A is a schematic top view of a shutter panel according to an embodiment of the present invention. 3B is a perspective view of a display device according to an embodiment of the present invention intention. It must be noted here that the embodiments of FIGS. 3A and 3B use the element numbers and part of the content of the embodiments of FIGS. 1A to 1C , wherein the same or similar numbers are used to represent the same or similar elements, and the same elements are omitted. Description of technical content. For the description of the omitted part, reference may be made to the foregoing embodiments, which will not be repeated here.

The main difference between the shutter panel 20b of FIG. 3A and FIG. 3B and the shutter panel 20 of FIG. 1B is that the first part C1 and the second part C2 of the shutter panel 20b define each pixel area PXr into six areas.

The display device 2 includes a color display panel 10 , a shutter panel 20b and a backlight module.

In this embodiment, the first portion C1 and the second portion C2 of the shutter panel 20b define the pixel area PXr into a plurality of smaller areas R, which can improve the problem of insufficient resolution of the shutter panel 20b. The area of the region R is not less than 1 times the area of the first pixel PX1. In some embodiments, the area of the region R is approximately equal to 1.5 times the area of the first pixel PX1 .

The width of each first portion C1 is Wa. The difference between the width Wa of each first portion C1 and the width W1 of each scan line light shielding portion SLs is less than 20% of the width W1, in other words, 0.8W1<Wa<1.2W1. The width of each second portion C2 is Wb. The difference between the width Wb of each second portion C2 and the width W2 of each data line light shielding portion DLs is less than 20% of the width W2, in other words, 0.8W2<Wb<1.2W2.

In this embodiment, the width Wa of each first portion C1 is approximately or equal to the width W1 of each scan line light shielding portion SLs, and the width Wb of each second portion C2 is approximately or equal to the width W2 of each data line light shielding portion DLs, Therefore, it is possible to avoid displaying pictures There is a problem with mesh lines on the surface.

4 is a schematic top view of a shutter panel according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 4 uses the element numbers and part of the content of the embodiment of FIG. 1A to FIG. 1C , wherein the same or similar numbers are used to represent the same or similar elements, and the same technical content is omitted. illustrate. For the description of the omitted part, reference may be made to the foregoing embodiments, which will not be repeated here.

Referring to FIG. 4 , the display device 3 includes a color display panel 10 , a shutter panel 20 and a backlight module 30 . In this embodiment, the shutter panel 20 is located between the color display panel 10 and the backlight module 30 . In other embodiments, the color display panel 10 is located between the shutter panel 20 and the backlight module 30 .

The diffusion layer D is located between the color display panel 10 and the shutter panel 20 . In this embodiment, the diffusion layer D includes a plurality of scattering particles (not shown). After the light emitted from the backlight module 30 passes through the shutter panel 20 , it is further scattered by the scattering particles in the diffusion layer D, so that the light can be dispersed more evenly, thereby improving the overall visual effect of the display device 3 .

The color display panel 10 includes a first substrate 100, a second substrate 110, a liquid crystal layer 120, an active element T1, a pixel electrode PE1, a common electrode CE, a black matrix BM1, a color conversion element CF, a first polarizer 130, and a second polarizer Sheet 140.

The active element T1 is located on the first substrate 100 and includes a channel layer CH1 , a gate electrode G1 , a source electrode S1 and a drain electrode D1 . The gate electrode G1 is electrically connected to a corresponding one of the first scan lines SL1 (please refer to FIG. 1A ). The gate electrode G1 overlaps with the channel layer CH1, and a gate insulating layer 102 is sandwiched between the gate electrode G1 and the channel layer CH1. The interlayer dielectric layer 104 covers The gate electrode G1, and the interlayer dielectric layer 104 is located between the first scan line SL1 and the first data line DL1 (please refer to FIG. 1A ). The source electrode S1 and the drain electrode D1 are located on the interlayer dielectric layer 104 , and are electrically connected to the channel layer CH1 through openings passing through the gate insulating layer 102 and the interlayer dielectric layer 104 , respectively. The source electrode S1 is electrically connected to a corresponding one of the first data lines DL1.

The flat layer 106 is located on the first data line DL1, the source electrode S1 and the drain electrode D1. The common electrode CE and the pixel electrode PE1 are located on the flat layer 106 . A buffer layer 108 is sandwiched between the common electrode CE and the pixel electrode PE1. The pixel electrode PE1 is electrically connected to the drain electrode D1 through openings passing through the planarization layer 106 and the buffer layer 108 . In this embodiment, both the common electrode CE and the pixel electrode PE1 are located on the same side of the liquid crystal layer 120 to form a fringe field switching (FFS) type display panel, an in-plane switching (IPS) type display panel or Advanced Hyper-Viewing Angle (AHVA) type display panel. In other embodiments, the common electrode CE is located on the second substrate 110 to form a twisted nematic (TN) type liquid crystal panel or a vertical alignment (Vertical Alignment, VA) type liquid crystal panel.

The black matrix BM1 and the color conversion element CF are located on the second substrate 110 . The liquid crystal layer 120 is located between the first substrate 100 and the second substrate 110 . The first polarizer 130 and the second polarizer 140 are respectively located on the first substrate 100 and the second substrate 110 .

The shutter panel 20 includes a first substrate 200 , a second substrate 210 , a liquid crystal layer 220 , an active element T2 , a pixel electrode PE2 , a light-shielding structure SS, and a first polarizer 230 and the second polarizer 240 . In this embodiment, the shutter panel 20 further includes a common electrode COM and a common electrode COM1.

The active element T2 is located on the first substrate 200 and includes a channel layer CH2, a gate electrode G2, a source electrode S2 and a drain electrode D2. The gate electrode G2 is electrically connected to a corresponding second scan line SL2 (please refer to FIG. 1B ). The gate electrode G2 is directly connected to a corresponding one of the second scan lines SL2. The gate electrode G2 overlaps the channel layer CH2, and the gate insulating layer 202 is sandwiched between the gate electrode G2 and the channel layer CH2, and the gate insulating layer 202 is sandwiched between the second scan line SL2 and the second data line DL2 (please refer to FIG. 1B ) layer 202. The source electrode S2 and the drain electrode D2 are located on the gate insulating layer 202 and are electrically connected to the channel layer CH2. In some embodiments, an ohmic contact layer R is further included between the source electrode S2 and the channel layer CH2 and between the drain electrode D2 and the channel layer CH2, but the invention is not limited thereto. The source electrode S2 is electrically connected to a corresponding second data line DL2 (please refer to FIG. 1B ).

The common electrode COM and the gate electrode G2 belong to the same film layer. In some embodiments, the common electrode COM and the gate electrode G2 are located between the gate insulating layer 202 and the first substrate 200 .

The flat layer 204 is located on the second data line DL2, the source electrode S2 and the drain electrode D2. The pixel electrode PE2 is located on the flat layer 204 and is electrically connected to the drain electrode D2 through the opening through the flat layer 204 .

The light shielding structure SS is located on the second substrate 210 . The liquid crystal layer 220 is located between the first substrate 200 and the second substrate 210 . The first polarizer 230 and the second polarizer 240 are respectively located on the first substrate 200 and the second substrate 210 . In some embodiments, the color display panel 10 and the shutter panel 20 share one of the polarizers, in other words, The first polarizer 130 of the color display panel 10 or the second polarizer 240 of the shutter panel 20 may be omitted, but the invention is not limited thereto.

The common electrode COM1 is located on the second substrate 210 . In some embodiments, the common electrode COM1 is located between the second substrate 210 and the light shielding structure SS. In this embodiment, the orientation of the liquid crystal molecules is controlled by the electric field between the common electrode COM1 and the pixel electrode PE2.

To sum up, by designing the first part and the second part of the light-shielding structure, the problem of insufficient resolution of the shutter panel can be improved. In addition, the width of the first portion is approximately or equal to the width of the scan line light shielding portion, and the width of the second portion is approximately or equal to the width of the data line light shielding portion. Therefore, the problem of mesh lines on the display screen can be avoided.

20: Shutter panel

BM2: Black Matrix

C1: Part 1

C2: Part II

COM: Common electrode

CH2: Channel Layer

D2: drain

DL2: Second data line

DLs: Data Line Shading

DR3: Third Direction

DR4: Fourth direction

G2: Gate

O2: Opening

PE2: pixel electrode

PX2: Second pixel

PXr: pixel area

R: area

S2: source

SL2: Second scan line

SLs: Scan Line Shading

SS: Shading structure

T2: Active Components

T2s: active element shading part

W1, W2, W3, Wa, Wb, W _DL2 , W _G2 , W _SL2 : Width

X1, X2: distance

Claims (11)

A display device, comprising: a color display panel, comprising: a plurality of first scan lines, a plurality of first data lines and a plurality of first pixels, wherein the first pixels are electrically connected to the first scan lines lines and the first data lines; and a shutter panel overlapping the color display panel and comprising: a plurality of second scan lines, a plurality of second data lines and a plurality of second pixels, wherein the first Two pixels are electrically connected to the second scan lines and the second data lines, and two adjacent second scan lines and two adjacent second data lines define a pixel area; and A light-shielding structure includes: a plurality of scan line light-shielding portions overlapping and parallel to the second scan lines, wherein the width of each scan line light-shielding portion is W1; a plurality of data line light-shielding portions overlapping and parallel to the second scan lines Two data lines, wherein the width of each of the data line light-shielding portions is W2; and a plurality of first portions, which are parallel to the scan line light-shielding portions and overlap the pixel area, and the widths of each of the first portions are Wa, 0.8 W1<Wa<1.2W1; and a plurality of second portions, which are parallel to the data line light-shielding portions and overlap the pixel region, and the widths of the second portions are Wb, 0.8W2<Wb<1.2W2. The display device of claim 1, wherein each of the pixel regions overlaps 6 or 9 of the first pixels. The display device of claim 1, wherein the first parts and the second parts define each of the pixel regions into n regions, where n is 6 or 9. The display device of claim 1, wherein each of the second pixels comprises: an active element, wherein the gate of the active element is electrically connected to a corresponding one of the second scan lines, wherein the source of the active element The electrode is electrically connected to a corresponding one of the second data lines, the drain electrode of the active element extends along a direction parallel to the second scan lines; and a pixel electrode is electrically connected to the drain electrode of the active element pole. The display device of claim 4, wherein the light-shielding structure further comprises: a plurality of active element light-shielding portions overlapping the active elements, the scan line light-shielding portions, the data line light-shielding portions and the active elements The shading parts are connected to each other and form a black matrix, wherein the width of each active element shading part is greater than the width of each scanning line shading part, and the difference between the width of each active element shading part and the width of each scanning line shading part is less than 20 microns. The display device according to claim 4, wherein the width of each of the active elements is less than 40 microns. The display device of claim 5, wherein at least one of the first parts and at least one of the second parts are connected to each other and form a common electrode, and the black matrix and the common electrode belong to different layers. The display device according to claim 1, wherein the width of each of the second scan lines is 4 to 6 microns, the width W1 of each of the scan line shielding portions is 20 to 24 microns, and the width of each of the second data lines The width W2 of each data line light shielding portion is 4 to 8 microns. The display device of claim 1, wherein the scan line light shielding parts, the first parts, the data line light shielding parts, and the second parts are connected black matrices. A display device, comprising: a color display panel, comprising: a plurality of first scan lines, a plurality of first data lines and a plurality of first pixels, wherein the first pixels are electrically connected to the first scan lines lines and the first data lines; and a shutter panel overlapping the color display panel, including: a plurality of second scan lines, a plurality of second data lines and a plurality of second pixels, wherein the second The pixels are electrically connected to the second scan lines and the second data lines, and two adjacent second scan lines and two adjacent second data lines define a pixel area; and a The light shielding structure includes: a plurality of scanning line light shielding parts and a plurality of first parts, parallel to the a plurality of second scan lines; and a plurality of data line light-shielding portions and a plurality of second portions, parallel to the second data lines, wherein the scan line light-shielding portions and the data line light-shielding portions respectively overlap the second data lines The scan lines and the second data lines, the first parts and the second parts overlap the pixel area, and the first parts and the second parts define each of the pixel areas into n areas, wherein n is 6 or 9, wherein the area of each of the regions is not less than 1 times the area of the first pixel. The display device of claim 10, wherein each of the first pixels includes a red sub-pixel, a green sub-pixel and a blue sub-pixel.

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