TWI749555B - Reference voltage generating circuit - Google Patents

Abstract

The present invention provides a reference voltage generating circuit. The reference voltage generating circuit includes a charge supply circuit providing a first reference voltage during a first period; and a voltage supply circuit providing a second reference voltage during a second period. The voltage supply circuit does not provide the second reference voltage during the first period

Description

Reference voltage generating circuit

The present invention refers to a reference voltage generating circuit, in particular to a reference voltage generating circuit that can provide a stable reference voltage and can reduce power loss.

In the field of electronic technology, a reference voltage generating circuit has a certain importance, which is used to generate a stable reference voltage and provide it to a required circuit, such as an analog-to-digital conversion circuit. However, during the operation of the circuit receiving the reference voltage, the circuit draws electrical energy, such as drawing current, which affects the level of the reference voltage and affects the accuracy of the circuit's operation.

In this case, many reference voltage generating circuits have been developed to provide a stable reference voltage, such as US Patent No. US 10,236,903. However, this conventional architecture consumes more power and cannot dynamically maintain the reference voltage level in real time. As shown in Figure 5, a power supply circuit composed of a power supply voltage VDD, a current source 560, and a resistor R1 is continuously coupled to the analog-to-digital converter and the charge compensation circuit 510 to supply power to maintain the reference voltage level, which is quite costly Electricity. In addition, this conventional architecture is based on the output bit compensation charge obtained after the analog-to-digital converter converts the analog input signal to maintain the level of the reference voltage, that is, the level of the reference voltage is drawn by the operation of the analog-to-digital converter. Compensation is performed after fluctuations, so that the fluctuations in the level of the reference voltage cannot be reduced immediately, which affects the stability of the reference voltage and the conversion accuracy of the analog-to-digital converter.

In view of this, it is necessary to improve the conventional technology.

The main purpose of the present invention is to provide a reference voltage generating circuit, which can provide a reference voltage by using circuits with different power supply characteristics to provide a stable reference voltage according to the degree of influence of the power loss of the functional circuit operation on the reference voltage. , And can save the power consumption of the reference voltage generating circuit, so that it can save power, and can stabilize the level of the reference voltage in real time.

The present invention discloses a reference voltage generating circuit. The reference voltage generating circuit includes a charge supply circuit that provides a first reference voltage during a first period; and a voltage supply circuit that provides a second reference voltage during a second period; Wherein, the voltage supply circuit does not provide the second reference voltage during the first period.

10: Touch detection module

12: Panel

102: Transmitter

104: Power supply circuit

122: select circuit

20: Reference voltage generating circuit

201: Timing Controller

202: charge supply circuit

204: Voltage supply circuit

206: Controller

207: Resistance

208: error amplifier

209: Resistance

210: Transistor

302: Detection Circuit

Tx: Touch drive signal

R ₁ ~R _N : receiving circuit

Rx ₁ ~Rx _N : Receive signal

Vin ₁ ~Vin _N ,Vin: input signal

Bout: output signal

ADC ₁ ~ ADC _N , ADC: analog-to-digital converter

C _DC ,C _ADC1 ~C _ADCN ,212,C _ADC : capacitor

V _{DD_AD} : Supply voltage

SW ₁ ~SW _N ,SW _c ,SW _d : switch

I: current

Con, CON ₁ , CON ₂ : control signal

T ₁ , T ₂ : period

Vref ₁ ,Vref ₂ : Reference voltage

CLK: clock signal

V _th : Threshold voltage

V _DD1 , V _DD2 : supply voltage

I _L : Variable current source

Q: Energy storage element

Q _L : charge

Figure 1 is a schematic diagram of an embodiment of the reference voltage generating circuit of the present invention.

FIG. 2A is a schematic diagram of another embodiment of the reference voltage generating circuit of the present invention.

Figure 2B is a timing diagram of the operation of the reference voltage generating circuit shown in Figure 2A.

Figure 3 is a schematic diagram of an embodiment of the charge supply circuit and analog-to-digital converter of the present invention.

FIG. 4 is a schematic diagram of an embodiment of the reference voltage generating circuit of the present invention applied to a touch detection module.

Certain words are used to refer to specific components in the specification and claim items. However, those with ordinary knowledge in the technical field of the present invention should understand that the manufacturer may use different terms to refer to the same component. Moreover, this specification and The requested item does not use the difference in names as a way of distinguishing components, but uses the overall technical difference of the components as the criterion for distinguishing. The "including" mentioned in the entire manual and request items is an open term, so it should be interpreted as "including but not limited to". Furthermore, the term "coupling" here includes any direct and indirect connection means. Therefore, if it is described that a first device is coupled to a second device, it means that the first device can be directly connected to the second device, or can be indirectly connected to the second device through other devices or other connection means.

Please refer to Figure 1. Figure 1 is a schematic diagram of an embodiment of the reference voltage generating circuit of the present invention. As shown in FIG. 1, the reference voltage generating circuit 20 includes a charge supply circuit 202 and a voltage supply circuit 204. The charge supply circuit 202 and the voltage supply circuit 204 are coupled to a functional circuit. In this embodiment, the functional circuit may be an analog-to-digital converter ADC, and the analog-to-digital converter may be a successive approximation register (Successive Approximation Register) analog Digital converter. In this embodiment, the reference voltage generating circuit 20 is applied to an analog-to-digital converter as an example for description, and it does not limit the reference voltage generating circuit 20 to only be applied to an analog-to-digital converter. The reference voltage generating circuit 20 of the present invention is used to generate a stable reference voltage, and can be applied to functional circuits that require a reference voltage.

Referring again to FIG. 1, the charge supply circuit 202 generates a first reference voltage Vref ₁ , and the voltage supply circuit 204 generates a second reference voltage Vref ₂ . The charge supply circuit 202 provides a first reference voltage Vref ₁ to the analog-to-digital converter ADC during a first period, and the voltage supply circuit 204 provides a second reference voltage Vref ₂ to the analog-to-digital converter ADC during a second period. In addition, the voltage supply circuit 204 does not provide the second reference voltage Vref ₂ to the analog-to-digital converter ADC during the first period. In other words, when the charge supply circuit 202 provides the first reference voltage Vref ₁ to the analog-to-digital converter ADC, the voltage supply circuit 204 does not provide the second reference voltage Vref ₂ to the analog-to-digital converter ADC, so that the power of the reference voltage generating circuit 20 can be reduced. Loss, and can save power. In another embodiment of the present invention, the charge supply circuit 202 may not provide the first reference voltage Vref ₁ to the analog-to-digital converter ADC during the second period. The analog-to-digital converter ADC receives an analog input signal Vin, _{operates according to the first reference voltage Vref 1} and the second reference voltage Vref ₂ , and converts the input signal Vin to generate a digital output signal Bout.

According to the above description, the charge supply circuit 202 and the voltage supply circuit 204 respectively provide the first reference voltage Vref ₁ and the second reference voltage Vref ₂ to the analog-to-digital converter ADC during different periods. The first period and the second period are the operating periods of the functional circuit. In this embodiment, the first period and the second period are the operation periods of the analog-to-digital converter ADC. The first period and the second period are not limited to the first period being earlier than the second period. The first period may be earlier than the second period, or the second period may be earlier than the first period.

In addition, the quantity of electric charge that can be supplied per unit time of the charge supply circuit 202 is different from the quantity of electric charge that can be supplied per unit time of the voltage supply circuit 204. In one embodiment of the present invention, the amount of charge that can be supplied per unit time of the charge supply circuit 202 is greater than the amount of charge that can be supplied per unit time of the voltage supply circuit 204, which means that the ability of the charge supply circuit 202 to provide charge in a short time is better than The voltage supply circuit 204 has the ability to provide electric charge in a short time. When the analog-to-digital converter ADC is operating and drawing a large current, that is, during the period when the analog-to-digital converter ADC consumes more charge/power, the charge supply circuit 202 can be used to provide the first reference voltage Vref ₁ to the analog-to-digital converter ADC In this way, the reference voltage received by the analog-to-digital converter ADC can be prevented from being greatly fluctuated by the operation of the analog-to-digital converter ADC, that is, the charge supply circuit 202 can provide a stable reference voltage Vref ₁ with small fluctuations, and can maintain the analog-to-digital converter ADC The conversion accuracy. In addition, when the analog-to-digital converter ADC is operating and drawing a small current, that is, when the analog-to-digital converter ADC consumes less charge/power, the voltage supply circuit 204 can be used to provide the second reference voltage Vref ₂ to analog-to-digital conversion器ADC. In the embodiment of the present invention, _{the voltage level of the second reference voltage Vref 2} may be the same or different from _{the voltage level of the first reference voltage Vref 1} , which is determined according to the usage requirements of the functional circuit.

Please refer to FIGS. 2A and 2B. FIG. 2A is a schematic diagram of another embodiment of the reference voltage generating circuit 20 of the present invention, and FIG. 2B is a timing diagram of the operation of the reference voltage generating circuit 20 shown in FIG. 2A. As shown in FIGS. 2A and 2B, the reference voltage generating circuit 20 includes a charge supply circuit 202 and a voltage supply circuit 204. The charge supply circuit 202 is coupled to a supply voltage V _DD to generate a first reference voltage Vref ₁ . Charge supply circuit 202 in a period (first period) T ₁ providing a first reference voltage Vref ₁ the ADC analog to digital converter, the voltage supply circuit 204 (the second period) T ₂ generates a second reference voltage Vref ₂ in a period, and Provide the second reference voltage Vref ₂ to the analog-to-digital converter ADC. The voltage supply circuit 204 does not provide the second reference voltage Vref _{2 during the period T 1} , so that the power loss of the reference voltage generating circuit 20 can be reduced to save power.

Referring again to Figure 2A, a timing controller 201 is coupled to the charge supply circuit 202, the voltage supply circuit 204 and the analog-to-digital converter ADC, and generates a clock signal CLK, the charge supply circuit 202, the voltage supply circuit 204 and the analog-to-digital converter The ADC operates according to the clock signal CLK. Under this structure, when the level of the clock signal CLK is at a low level, the analog-to-digital converter ADC samples the input signal Vin for subsequent analog-to-digital conversion. When the level of the clock signal CLK is converted to a high level, the analog-to-digital converter ADC performs analog-to-digital conversion, and the reference voltage generating circuit 20 can provide the first reference voltage Vref ₁ and the second reference voltage Vref ₂ to the analog-to-digital converter ADC is used as the reference voltage for the analog-to-digital converter ADC to perform analog-to-digital conversion. The period T ₁ is the period during which the analog-to-digital converter ADC converts at least one high significant bit (such as the first 5 bits) of the input signal Vin. T ₂ is the period during which the analog-to-digital converter ADC converts at least one low-significant bit (for example, after the 6th bit) of the input signal Vin.

_{In this case, the analog-to-digital converter ADC can generate control signals CON 1} and CON ₂ according to whether the effective bit of the converted input signal Vin is a high-significant bit or a low-significant bit. During the valid bit period T ₁ , the level of the control signal CON ₁ can be changed to a high level, so that the charge supply circuit 202 can provide the first reference voltage Vref ₁ . When the analog-to-digital converter ADC converts high-significant bits, the analog-to-digital converter ADC draws a larger current, that is, a larger amount of charge, which may cause greater fluctuations in the reference voltage provided to the analog-to-digital converter ADC. Since the charge supply circuit 202 can compensate the charge/power loss of the analog-to-digital converter ADC in a short time, the charge supply circuit 202 provides the first reference voltage Vref ₁ to the analog-to-digital converter ADC. The operation greatly affects the level of the first reference voltage Vref ₁ , that is, the level of the first reference voltage Vref ₁ is maintained to provide a stable first reference voltage Vref ₁ . In addition, during the period T ₁ , the level of the control signal CON ₂ can be changed to a low level to disable the voltage supply circuit 204 without providing the second reference voltage Vref ₂ to the analog-to-digital converter ADC to save power. _{During the period T 2} when the analog-to-digital converter ADC converts the low-significant bits, since the analog-digital converter ADC converts the low-significant bits, the analog-to-digital converter ADC draws a smaller current, that is, draws less charge, and thus provides to the analog The reference voltage of the digital converter ADC may have relatively small fluctuations, so the level of the control signal CON ₂ can be converted to a high level, so that the voltage supply circuit 204 can provide the second reference voltage Vref ₂ to the analog-to-digital converter ADC. The voltage supply circuit 204 can accurately maintain the level of the second reference voltage Vref ₂ , so that the analog-to-digital converter ADC can ensure the conversion accuracy when converting the low-significant bits of the input signal Vin. The conversion accuracy of the low-significant bits determines the analog The overall conversion accuracy of the digital converter ADC, therefore, accurately maintaining the level of the second reference voltage Vref ₂ can ensure the precision (resolution) of the analog-to-digital conversion of the analog-to-digital converter ADC. In this way, the reference voltage generating circuit 20 can compensate for the charge loss of the analog-to-digital converter ADC and can provide a stable reference voltage.

In detail, please refer to FIG. 3, which is a schematic diagram of an embodiment of the charge supply circuit 202 and the analog-to-digital converter ADC of the present invention. A power supply circuit (not shown) or voltage supply circuit 204 can be coupled to the charge supply circuit 202 and provide a supply voltage V _DD2 to charge the charge supply circuit 202 with the supply voltage V _DD2 to generate the first reference voltage Vref ₁ . In an embodiment of the present invention, the power supply circuit may be a system power supply. In one embodiment of the present invention, the charge supply circuit 202 can be a charge storage circuit, and includes a plurality of energy storage elements Q, such as a plurality of capacitors, to form a capacitor bank, but it is not limited to the charge supply circuit 202 can only be a charge Energy storage circuit. In addition, the charge supply circuit 202 includes a plurality of switches SW _c and SW _d , the switch SW _{c is} coupled between the supply voltage V _DD2 and the energy storage elements Q, and the switch W _{d is} coupled to the energy storage elements Q and analog Between the digital converter ADC. Specifically, the power supply circuit or the voltage supply circuit 204 provides the supply voltage V _{DD2 before the period T 1} and charges the charge supply circuit 202 (switch SW _{c is} turned on), and is not coupled (uncharged) to the charge supply circuit _{during the period T 1} 202 (switch SW _{c is} turned off) to save power. At this time, the charge supply circuit 202 can generate the first reference voltage Vref ₁ (switch SW _{d is} turned on) to provide the first reference voltage Vref ₁ to the analog-to-digital converter ADC. Furthermore, the charge supply circuit 202 may be _carried out according to analog to digital converter (ADC) during the T converter of the analog digital power consumption, such as power and providing a charge corresponding to the amount of the loss or loss of charge, i.e. the charge supply circuit 202 according to the analog to digital converter (ADC) to The power loss during the period T ₁ provides the first reference voltage Vref ₁ to compensate the power loss of the analog-to-digital converter ADC during the period T ₁ , so as to prevent the operation of the analog-to-digital converter ADC from greatly affecting the level of the first reference voltage Vref ₁ , And the level of the first reference voltage Vref ₁ can be maintained to provide a stable first reference voltage Vref ₁ .

In addition, the reference voltage generating circuit 20 may further comprise a detection circuit 302, which is coupled to analog to digital converter (ADC) and the charge supply circuit 202, detection circuit 302 detects analog to digital converter (ADC) for analog to digital in period T ₁ Conversion of The power loss is used to control the charge supply circuit 202 to provide a corresponding amount of charge to provide a stable first reference voltage Vref ₁ . _{In detail, the detection circuit 302 can predict that the period T 1} will affect the power consumption of the first reference voltage Vref ₁ before the analog-to-digital converter ADC performs the analog-to-digital conversion of the high-significant bits, so as to dynamically control the charge supply in real time. The circuit 202 provides the corresponding amount of charge. The analog-to-digital converter ADC of the embodiment in FIG. 3 includes a variable current source _IL , which represents that the analog-to-digital converter ADC _{performs analog-to-digital conversion during the period T 1} to extract currents of different magnitudes, and the charge supply circuit 202 provides The charge Q _{L is} equivalent to the integral of the current drawn by the analog-to-digital conversion by the analog-to-digital converter ADC during the period T _1. Since the analog-to-digital converter 202 is not a technical feature of the present invention, and different analog-to-digital converters ADC have different circuit structures, the detailed circuit is not shown in FIG. 3.

The detection circuit 302 shown in the embodiment in FIG. 3 is disposed in the analog-to-digital converter ADC, and in other embodiments, it may be independent of the analog-to-digital converter ADC, and is not limited to this. In an embodiment of the present invention, the detection circuit 302 can detect the input signal Vin and predict that the analog-to-digital converter ADC will affect the power loss of the first reference voltage Vref _{1 during the period T 1.} In an embodiment of the present invention, the detection circuit 302 may use regression approximation or other methods. In this way, the reference voltage generating circuit 20 predicts the power consumption before the analog-to-digital converter ADC performs analog-to-digital conversion on the input signal Vin, and the first reference voltage Vref _{1 can} be affected by the power loss of the operation of the analog-to-digital converter ADC. When the impact occurs and fluctuates, compensation is performed dynamically in real time to reduce _{the fluctuation of the first reference voltage Vref 1.} The reference voltage generating circuit 20 is equivalent to instantaneous compensation when the fluctuation of the _{first reference voltage Vref 1 occurs.} Since the detection circuit 302 and the charge supply circuit 202 are closed loop for compensation, the response speed is fast and the power is saved.

Refer back to FIG. 3, the reference voltage generating circuit 20 may further include a capacitor C _ADC, capacitor C _ADC is coupled to analog to digital converter (ADC) and the charge supply circuit 202, a charge supply circuit 202 in the period T ₁ providing a first reference voltage Vref ₁ To the capacitor C _ADC to provide the first reference voltage Vref ₁ to the analog-to-digital converter ADC. The capacitor C _ADC can also be coupled to the voltage supply circuit 204 to provide the second reference voltage Vref ₂ to the capacitor C _{ADC during the period T 2} to Provide the second reference voltage Vref ₂ to the analog-to-digital converter ADC. The capacitor C _ADC can stabilize the first reference voltage Vref ₁ and the second reference voltage Vref ₂ . When the power supply circuit or voltage supply circuit 204 charges the charge supply circuit 202 before the _{period T 1 , the capacitor C ADC is} also charged, and the power supply circuit or the voltage supply circuit 204 is not coupled to the capacitor C _ADC and the charge supply _{during the period T 1} Circuit 202.

In other words, by controlling the operation of the switches SW _C and SW _{d , the supply voltage V DD2} provided by the power supply circuit or the voltage supply circuit 204 _{charges the capacitor C ADC} and the charge supply circuit 202 before the analog-to-digital conversion of the analog-to-digital converter ADC. When the analog-to-digital converter ADC performs analog-to-digital conversion, _{the path between the supply voltage V DD2} and the capacitor C _ADC is cut off. The capacitor C _ADC , the charge supply circuit 202, and the voltage supply circuit 204 provide a reference voltage to the analog-to-digital converter ADC for analog-to-digital conversion. . In this way, the power supply circuit (such as the system power supply) or the voltage supply circuit 204 can charge the charge supply circuit 202 before the analog-to-digital converter ADC performs the analog-to-digital conversion. Because the time is sufficient, the power supply circuit or the voltage supply circuit The power supply capability of 204 does not need to be too strong, which saves energy and circuit area. If the power supply circuit has a stronger power supply capability, its electronic components must withstand greater power, so the size of the electronic components is larger and the area is occupied. In addition, when the analog-to-digital converter ADC performs analog-to-digital conversion, the power supply circuit or the voltage supply circuit 204 does not charge the charge supply circuit 202, which saves more power.

Furthermore, please continue to refer to Figure 2A. As shown in FIG. 2A, the voltage supply circuit 204 can be implemented as a voltage stabilizer, but it is not limited to the voltage supply circuit 204 can only be a voltage stabilizer. The voltage supply circuit 204 may include a controller 206, an error amplifier 208, complex resistors 207 and 209, a transistor 210, and a capacitor 212. During the period T ₂ , when the level of the control signal CON ₂ changes to a high level, the control signal CON ₂ controls the controller 206 to enable the error amplifier 208 and drive the error amplifier 208 to operate. The error amplifier 208 receives a threshold voltage V _th and a time For the voltage supply, the resistors 207 and 209 are connected in series and coupled between the capacitor 212 and the ground terminal to divide the second reference voltage Vref ₂ generated by the capacitor 212 to generate the feedback voltage. The error amplifier 208 controls the transistor 210 according to the feedback voltage and the threshold voltage V _th. When the analog to digital converter (ADC) draws current of the second reference voltage Vref ₂ drops, i.e., the feedback voltage is lower than the threshold voltage V _th, the error amplifier 208 controls the transistor 210 is turned on, to allow the supply voltage V _DD1 of the capacitor 212 charged, i.e. via A closed loop is used to accurately maintain the level of the second reference voltage Vref ₂ . The above-mentioned supply voltage V _DD1 may be the same or different from the supply voltage V _DD2 received by the charge supply circuit 202. In addition, the resistors 207 and 209 can be variable resistors, which can be adjusted according to usage requirements, and can _{generate a supply voltage V DD2 when the second reference voltage Vref 2 is} not yet provided to the analog-to-digital converter ADC, and provide it to the charge supply circuit 202. In this way, there is no need to additionally provide a power supply circuit to provide the supply voltage V _DD2 .

It is worth noting that the above description is only an embodiment of the present invention. The main spirit of the reference voltage generating circuit 20 of the present invention is to use the charge supply circuit 202 or The voltage supply circuit 204 provides a reference voltage to the functional circuit. When the functional circuit consumes more power and has a greater impact on the reference voltage, the charge supply circuit 202 with strong charge supply capability is used to provide the reference voltage. Conversely, the voltage supply circuit 204, which has a weak charge supply capability but can accurately maintain the voltage level, can be used to provide the reference voltage, and when the charge supply circuit 202 provides the reference voltage, the voltage supply circuit 204 does not provide the reference voltage, so as to save power. In addition, the reference voltage generating circuit 20 can further predict the power consumption that affects the reference voltage before the functional circuit operates to consume power and affect the reference voltage, so as to dynamically compensate the power loss in real time and avoid affecting the level of the reference voltage. For example, before the analog-to-digital converter ADC converts the high-significant bits, predict the power that the analog-to-digital converter ADC may consume in advance to dynamically compensate the power consumption during the analog-to-digital conversion process. The loop method generates a reference voltage to accurately maintain the level of the reference voltage. Those with ordinary knowledge in the field can make modifications or changes accordingly, and it is not limited to this. Since the amount of charge supplied per unit time of the charge supply circuit 202 is greater than the amount of charge supplied per unit time of the voltage supply circuit 204, that is, the voltage supply circuit 204 can have a smaller size, bandwidth, or driving capability to save circuit area and cost.

On the other hand, as shown in Figure 2B, when the level of the clock signal CLK is converted to a high level, the analog-to-digital converter ADC performs analog-to-digital conversion according to the clock signal CLK, and resets before the _{period T 1} For example, the reference voltage is reset. At this time, the analog-to-digital converter ADC draws a small current, so the level of the control signal CON ₂ is converted to a high level, so that the voltage supply circuit 204 can provide the second reference voltage Vref ₂ , but in other implementations In the example, the level of the control signal CON ₁ can be changed to a high level to enable the charge supply circuit 202 to reset. In addition, after the period T ₂ , the analog-to-digital converter ADC can be configured to be idle for a period of time, that is, the control signal CON ₁ The level of CON ₂ is the low level, but in other embodiments, the idle period may not be configured. In addition, the charge supply circuit 202 shown in FIG. 3 can be implemented by a charge compensator or a pump squeezing circuit, but is not limited thereto.

Please refer to FIG. 4, which is a schematic diagram of an embodiment of the reference voltage generating circuit of the present invention applied to a touch detection module. It shows a schematic diagram of a touch detection module 10 performing touch detection on a panel 12. As shown in Figure 1, the touch module 10 includes a touch drive circuit 102, complex receiving circuits R ₁ ~R _N , complex analog-to-digital converters ADC ₁ ~ ADC _N , a power supply circuit 104, and complex reference voltage generation Circuit 20. The touch detection circuit 102 generates a touch drive signal Tx and provides it to a selection circuit 122 of the panel 12, and the selection circuit 122 respectively transmits the touch drive signal Tx to a plurality of rows of touch drive lines of the panel 12. The receiving circuits R ₁ ~R _N are respectively coupled to a plurality of rows of touch sensing lines of the panel 12, and receive touch sensing signals Rx ₁ ~Rx _N to process the touch sensing signals Rx ₁ ~Rx _N to generate corresponding _{The analog input signals Vin 1} ~Vin _N at a plurality of positions of the panel 12 are transferred to the analog-to-digital converter ADC ₁ ~ ADC _N to perform analog-to-digital conversion. Each receiving circuit R ₁ ~R _N includes an amplifier and a filter circuit. The amplifiers amplify the touch sensing signals Rx ₁ ~Rx _N and send them to the filter circuit to filter the amplified touch sensing signals. Signals Rx ₁ ~Rx _N , and these input signals Vin ₁ ~Vin _N are generated.

The reference voltage generating circuits 20 are respectively coupled to the analog-to-digital converters ADC ₁ to ADC _N to provide reference voltages to the analog-to-digital converters ADC ₁ to ADC _N. The complex capacitors C _{ADC1 ˜C ADCN} are respectively coupled to the analog-to-digital converters ADC _{1 ˜ADC N} and the reference voltage generating circuits 20 to stabilize the reference voltage. In an embodiment of the present invention, the capacitors C _{ADC1 ˜C ADCN} may not be needed. The power supply circuit 104 provides a supply voltage V _{DD_AD} to the reference voltage generation circuit 20 and charges the charge supply circuit 202 of the reference voltage generation circuits 20 and the capacitors C _{ADC1 ˜C ADCN} . In an embodiment of the present invention, the supply voltage V _{DD_AD is the} same as the supply voltages V _DD1 and V _DD2 shown in Figure 2A.

The plurality of switches SW ₁ ˜SW _{N are} coupled between the power supply circuit 104 and the reference voltage generating circuits 20. Before the analog-to-digital conversion circuits ADC ₁ to ADC _N perform analog-to-digital conversion, the switches SW ₁ to SW _{N are} turned on to charge the charge supply circuits 202 and the capacitors C _ADC1 to C _ADCN and to When the analog-to-digital conversion circuits ADC ₁ ~ADC _N perform analog-to-digital conversion, the switches SW ₁ ~SW _{N are} turned off, and the power supply circuit 104 is not coupled to the capacitors C _ADC1 ~C _ADCN and the reference voltage generating circuits 20 In this way, the analog-to-digital conversion circuits ADC ₁ to ADC _{N are} driven to be independent of each other, so that when the analog-to-digital conversion circuits ADC ₁ to ADC _{N are} operating while simultaneously drawing current, it is possible to prevent noise from coupling to the analog-to-digital conversion circuits ADC ₁ ~ ADC _N , so as to avoid affecting the operation of the analog-to-digital conversion circuits ADC ₁ ~ ADC _N , and can also reduce the power consumption of the power supply circuit 104.

In addition, a capacitor C _{DC is} coupled to the power supply circuit 104 to stabilize the supply voltage V _{DD_AD} . Since the capacitors C _ADC1 to C _ADCN with small capacitance are provided, the capacitance of the capacitor C _DC is small. In one embodiment of the present invention, except for the panel 12 and the power supply circuit 104, all other circuits can be integrated in one chip. Because the capacitance of the capacitor C _DC and the capacitors C _ADC1 to C _ADCN is small, it is also possible It is integrated in the chip without the need for additional capacitors outside the chip, which can reduce the cost of components, the time and cost of the process of installing capacitors outside the chip, and can reduce the damage rate and improve the yield. In addition, in an embodiment of the present invention, the voltage supply circuit 204 can provide a supply voltage to the charge supply circuit 202, so that the power supply circuit 104, the switches SW ₁ ˜SW _N , and the capacitor C _DC are not needed.

In summary, the reference voltage generating circuit of the present invention can provide a reference based on the power consumption of the function circuit’s operation on the reference voltage, using a charge supply circuit with a strong charge supply capability or a voltage supply circuit with a weak charge supply capability. In this way, a stable reference voltage can be provided, and when the charge supply circuit provides the reference voltage, the voltage supply voltage does not provide the reference voltage, which can save power. In addition, the reference voltage generating circuit can predict that the functional circuit will affect the power consumption of the reference voltage, and when the functional circuit consumes power, it will dynamically compensate in an open loop to quickly react and reduce the fluctuation of the reference voltage.

The foregoing descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the present invention.

20: Reference voltage generating circuit

202: charge supply circuit

204: Voltage supply circuit

ADC: analog to digital converter

Vref ₁ ,Vref ₂ : Reference voltage

Vin: input signal

Bout: output signal

Claims (13)

A reference voltage generating circuit includes: a charge supply circuit that provides a first reference voltage in a first period; and a voltage supply circuit that provides a second reference voltage in a second period, wherein the voltage supply circuit is coupled Connect to the charge supply circuit and charge the charge supply circuit; wherein the voltage supply circuit does not provide the second reference voltage during the first period; wherein the reference voltage generation circuit provides the first reference voltage and the second reference Voltage to an analog-to-digital converter, the first period is a period during which the analog-to-digital converter converts at least one significant bit of an input signal, and the second period is a period during which the analog-to-digital converter converts at least one low of the input signal The period of valid bits. The reference voltage generating circuit according to claim 1, further comprising: a power supply circuit, coupled to the charge supply circuit, and charges the charge supply circuit. The reference voltage generating circuit according to claim 2, wherein the power supply circuit charges the charge supply circuit before the first period, and is not coupled to the charge supply circuit during the first period. The reference voltage generating circuit according to claim 1, wherein the voltage supply circuit charges the charge supply circuit before the first period, and does not charge the charge supply circuit during the first period. The reference voltage generating circuit according to claim 1, wherein the reference voltage generating circuit provides the first reference voltage and the second reference voltage to a functional circuit, and the charge supply circuit is based on the electrical energy of the functional circuit in the first period The loss provides this first reference voltage. The reference voltage generating circuit according to claim 5, further comprising: a detection circuit, coupled to the charge supply circuit, and detects the power loss of the functional circuit in the first period, so as to control the charge supply circuit to provide The first reference voltage. The reference voltage generating circuit according to claim 1, wherein the reference voltage generating circuit provides the first reference voltage and the second reference voltage to a functional circuit, and the reference voltage generating circuit further includes: a detection circuit, a coupling The charge supply circuit is connected, and an input signal of the functional circuit is detected to control the charge supply circuit to provide the first reference voltage. The reference voltage generating circuit according to claim 1, further comprising a capacitor to provide the first reference voltage and the second reference voltage to a functional circuit, and the capacitor is coupled to the charge supply circuit, the voltage supply circuit and the Functional circuit, the charge supply circuit provides the first reference voltage to the capacitor in the first period to provide the first reference voltage to the functional circuit, and the voltage supply circuit provides the second reference voltage to the capacitor in the second period The capacitor provides the second reference voltage to the functional circuit, a power supply circuit is coupled to the charge supply circuit and the capacitor, and charges the capacitor and the charge supply circuit before the first period, and performs The capacitor is not coupled to the period and the second period, and the first period and the second period are operating periods of the functional circuit. The reference voltage generating circuit according to claim 1, further comprising a capacitor to provide the first reference voltage and the second reference voltage to a functional circuit, and the capacitor is coupled to the charge supply circuit, the voltage supply circuit and the A functional circuit, the charge supply circuit provides the first reference voltage to the capacitor during the first period to provide the first reference voltage to the functional circuit, the The voltage supply circuit provides the second reference voltage to the capacitor during the second period to provide the second reference voltage to the functional circuit, the voltage supply circuit is coupled to the charge supply circuit, and charges the capacitor before the first period The capacitor and the charge supply circuit are not coupled to the capacitor in the first period, and the first period and the second period are operation periods of the functional circuit. The reference voltage generating circuit according to claim 1, wherein the amount of charge supplied per unit time of the charge supply circuit is greater than the amount of charge supplied per unit time of the voltage supply circuit. The reference voltage generating circuit according to claim 1, wherein the voltage level of the second reference voltage is different from the voltage level of the first reference voltage. The reference voltage generating circuit according to claim 1, wherein the voltage supply circuit is a voltage stabilizer. The reference voltage generating circuit according to claim 1, wherein the first period is earlier than the second period, or the second period is earlier than the first period.

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