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TWI710099B - 封裝結構及其製法 - Google Patents

封裝結構及其製法 Download PDF

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Publication number
TWI710099B
TWI710099B TW109112808A TW109112808A TWI710099B TW I710099 B TWI710099 B TW I710099B TW 109112808 A TW109112808 A TW 109112808A TW 109112808 A TW109112808 A TW 109112808A TW I710099 B TWI710099 B TW I710099B
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Taiwan
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connector
carrier
layer
packaging
manufacturing
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TW109112808A
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English (en)
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TW202141740A (zh
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蔡文榮
邱志賢
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矽品精密工業股份有限公司
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Priority to TW109112808A priority Critical patent/TWI710099B/zh
Priority to CN202010326932.0A priority patent/CN113539979B/zh
Priority to US16/890,128 priority patent/US11233324B2/en
Application granted granted Critical
Publication of TWI710099B publication Critical patent/TWI710099B/zh
Publication of TW202141740A publication Critical patent/TW202141740A/zh

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    • H—ELECTRICITY
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    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/52—Means for reducing coupling between antennas; Means for reducing coupling between an antenna and another structure
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Abstract

本發明提供一種封裝結構，其包括：一承載件及設於該承載件上之電子元件、天線模組與連接器，且以封裝層包覆該電子元件及該連接器，並使該連接器之部分表面外露於該封裝層，以利於電性連接一電子產品之主機板。本發明復提供一種封裝結構之製法。

Description

封裝結構及其製法
本發明係有關一種封裝結構及其製法，尤指一種具有天線模組之封裝結構及其製法。
隨著電子產業的蓬勃發展，電子產品也逐漸邁向多功能、高性能的趨勢。目前第四代(4G)的無線傳輸通訊技術已廣泛應用於各式各樣的消費性電子產品以利接收或發送各種無線訊號。
然而，隨著無線通信發展迅速，以及網路資源流量日趨龐大，所需的無線傳輸頻寬也越來越大，故無線傳輸第五代(5G)之研發已呈趨勢。
第1圖係習知無線通訊裝置之立體示意圖。如第1圖所示，該無線通訊裝置1係包括：一配置有電子元件11之電路板10、設於該電路板10上之複數晶片元件16、一天線元件12以及封裝體13。該晶片元件16係設於該電路板10上且電性連接該電路板10。該天線元件12係藉由一傳輸線17電性連接該晶片元件16。該封裝體13覆蓋該晶片元件16與該部分傳輸線17。
惟，習知無線通訊裝置1中，由於5G用天線元件12為了加強訊號強度，該天線元件12需設於靠近該可攜式電子產品之機殼附近處，故該可攜式 電子產品可提供設置該天線元件12的空間有限，故需進一步滿足無線通訊裝置1的微小化需求；此外，設於機殼附近處的無線通訊裝置1如何與設於中央的可攜式電子產品之內部其它組件(如主機板)進行電性溝通也是一需解決的問題。
因此，如何克服上述習知技術之種種問題，實已成為目前業界亟待克服之難題。
鑑於上述習知技術之種種缺失，本發明提供一種封裝結構，係包括：承載件；天線模組，係設於該承載件上；電子元件，係設於該承載件上；連接器，係設於該承載件上；以及封裝層，係形成於該承載件上並包覆該電子元件及該連接器，且使該連接器之部分表面外露於該封裝層。
本發明復提供一種封裝結構之製法，係包括：提供一配置有電子元件之承載件；將連接器設置於該承載件上；以及以封裝層包覆該電子元件及該連接器，且令該連接器之部分表面外露於該封裝層，其中，該承載件上復配置有天線模組。
前述之封裝結構及其製法中，該承載件係具有相對之第一側與第二側，且該第一側上係配置該電子元件與連接器，而該第二側上係配置該天線模組。
前述之封裝結構及其製法中，該承載件與該天線模組係結合成一天線板。
前述之封裝結構及其製法中，該天線模組係藉由至少一導電元件堆疊於該承載件上。
前述之封裝結構及其製法中，該連接器係具有一接口，其外露於該封裝層之側面。例如，該承載件上設置複數個連接器，且各該連接器之接口係相互對接，以於該封裝層包覆該電子元件及該連接器後，再以切割該封裝層之方式，分開各該連接器，且各該連接器之接口外露於該封裝層之側面。或者，先於該連接器之接口上形成阻層，再以該封裝層包覆該電子元件及該連接器，待切單製程後，移除該阻層，使該接口外露於該封裝層之側面。亦或，該連接器之接口係背對該承載件，且於形成該封裝層之前，以阻層或金屬框架遮蔽該接口。
前述之封裝結構及其製法中，更包括設置金屬框架於該承載件上，且該金屬框架遮蓋該連接器，並令該封裝層包覆該金屬框架。例如，該金屬框架係形成用以容置該連接器之容置空間，且使該容置空間連通該封裝層之側面。進一步，該容置空間係作為切割路徑，以沿該切割路徑進行切單製程，使該連接器及該容置空間同時外露於該封裝層之側面；或者，該金屬框架係藉由其支撐部支撐於該承載件上，使該連接器位於該支撐部內，再進行切單製程，以沿該金屬框架之支撐部進行切割，使該連接器及該容置空間同時外露於該封裝層之側面。
前述之封裝結構及其製法中，更包括形成於該封裝層上之屏蔽層，並使該屏蔽層接地。
綜上所述，本發明之封裝結構及其製法，主要藉由將該連接器整合在該封裝層內，並外露出該連接器之接口，以利於電性連接該電子產品之主機板，故相較於習知技術，該封裝結構之配置不受該天線模組之位置之限制，因而該電子產品之內部其它組件之設計不會受到空間限制，使該電子產品 可依需求滿足所有之功能，且該主機板提供的電能可直接傳進該承載件而不需經過其他傳電路徑，以提升該封裝結構之電性表現，並減少電耗。
再者，藉由將該連接器整合在該封裝層內，不僅使該天線模組可依訊號強度需求設置靠近機殼處而有效利用系統端(或該電子產品)的內部空間，且該封裝層可形成於該承載件之整版面上而不需如習知技術之局部版面配置，故本發明可大幅簡化製程，因而可大幅降低封裝成本，並可大幅縮小該封裝結構之體積。
1:無線通訊裝置
10:電路板
11:電子元件
12:天線元件
13:封裝體
16:晶片元件
17:傳輸線
2,2a,3a,4,4a,5a:封裝結構
20:承載件
20a:第一側
20b:第二側
200:絕緣層
201:線路層
21,21’:電子元件
22,32:天線模組
221:天線本體
222:絕緣體
23:連接器
23a:相接處
231:接口
24:封裝層
24c:側面
25,25’:屏蔽層
36:導電元件
3b,5b:中介結構
323:基部
324:線路部
47:金屬框架
47a:容置空間
471:支撐部
68:阻層
8:傳輸配件
9:電子產品
9a:機殼
90:主機板
900:連接埠
91:支撐架
S,S1,S2:切單製程
t:間隔
第1圖為先前技術習知裝置之立體示意圖。
第2A至2E圖為本發明之封裝結構之製法之第一實施例之剖視示意圖。
第2D’圖係為第2D圖之局部立體圖。
第2E’圖係為第2E圖之另一態樣。
第2F圖為第2E圖之後續應用之剖視示意圖。
第3A至3G圖為本發明之封裝結構之製法之第二實施例之剖視示意圖。
第3H圖為第3G圖之後續應用之剖視示意圖。
第4A至4E圖為本發明之封裝結構之製法之第三實施例之剖視示意圖。
第4D’圖為第4D圖之另一製法。
第4F圖為第4E圖之後續應用之剖視示意圖。
第5A至5G圖為本發明之封裝結構之製法之第四實施例之剖視示意圖。
第5D’圖為第5D圖之另一製法。
第5H圖為第5G圖之後續應用之剖視示意圖。
第6A圖為本發明之封裝結構之製法之第五實施例中之局部剖視示意圖。
第6B圖為第6A圖之局部立體示意圖。
第6B’圖為第6B圖之另一態樣。
以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A至2F圖為本發明之封裝結構2,2a之製法之第一實施例之剖視示意圖。
如第2A圖所示，提供一承載件20，該承載件20係具有相對之第一側20a及第二側20b，其中，該第一側20a上設置有複數個電子元件21,21’，且該第二側20b上設置有一天線模組22。
於本實施例中，該承載件20可為具有核心層或無核心層(coreless)之線路結構，如封裝基板(substrate)，且該承載件20係包含至少一絕緣層200與設於該絕緣層200上之線路層201，如線路重佈層(redistribution layer，簡稱RDL)。另外，形成該線路層201之材質係為銅，且形成該絕緣層200之材質係為如聚對二唑苯(Polybenzoxazole，簡稱PBO)、聚醯亞胺(Polyimide，簡稱PI)、預浸材(Prepreg，簡稱PP)等之介電材。應可理解地，該承載件20亦可為其它可供承載如晶片等電子元件之構件，例如導線架(lead frame)或矽中介板(silicon interposer)，但並不限於上述。
再者，該電子元件21,21’係為主動元件、被動元件或其二者組合，且主動元件係例如半導體晶片(如圖所示之電子元件21)，而被動元件(如圖所示之電子元件21’)係例如電阻、電容及電感。具體地，該電子元件21係以覆晶方式設於該承載件20上並電性連接該線路層201；或者，該電子元件21可藉由複數銲線(圖略)以打線方式電性連接該線路層201。然而，有關該電子元件電性連接該承載件之方式不限於上述。
又，該天線模組22係包含一結合於承載件20之第二側20b上的絕緣體222及至少一結合絕緣體222之天線本體221。例如，形成絕緣體222之材質係為聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)等，但並不限於上述。具體地，該承載件20與該天線模組22係結合成一天線板(例如，該天線模組22係接觸結合於該承載件20上)， 且該天線本體221係為毫米波式天線，其對應配置於該絕緣體222之相對兩側以形成耦合式天線(但該天線本體221之態樣不以此為限)。
如第2B圖所示，將至少一連接器23設置在該承載件20之第一側20a上。
於本實施例中，該連接器23之數量係為至少二個，且該連接器23具有一接口231。例如，將任二連接器23以其接口231對接之方式設置在該承載件20之第一側20a上。具體地，該兩對接之連接器23係由其接口231形成一封閉空腔。
如第2C圖所示，在該承載件20之第一側20a上形成一封裝層24，以包覆該些電子元件21,21’及連接器23。
於本實施例中，該封裝層24可為絕緣材，如聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)，其可用壓合(lamination)或模壓(molding)之方式形成於該承載件20上。
如第2D及2D’圖所示，沿切割路徑進行切單製程S，以獲取複數封裝結構2，並使該連接器23之部分表面外露於該封裝層24之側面24c。
於本實施例中，該切單製程S之切割路徑係對應該連接器23之接口231之相接處23a(如第2C圖所示)，以分開該二連接器23，並使該些連接器23之接口231外露於封裝層24之側面24c。
如第2E圖所示，可視該封裝結構2之電磁干擾(EMI)需求，於其封裝層24表面上形成一屏蔽層25，並使該屏蔽層25接觸該線路層201以進行接地，其中，該屏蔽層25未包覆該連接器23之接口231，以取得另一封裝結構2a。或者，如第2E’圖所示，可在形成該屏蔽層25’之前，可先形成遮蔽膜(未圖示) 於該連接器23之接口231上，待形成該屏蔽層25’後，再移除該遮蔽膜，使該屏蔽層25’未包覆該連接器23之接口231之邊緣。
於本實施例中，該屏蔽層25可例如以濺鍍(sputtering)、蒸鍍(vaporing)、電鍍、無電電鍍、化鍍或貼膜(foiling)等方式製作，但本發明並不以此為限。
本發明之封裝結構2,2a於後續應用時，如第2F圖所示，該連接器23可藉由一如傳輸排線或可撓式電路板之傳輸配件8電性連接至一電子產品9(如智慧型手機)之主機板90之連接埠900上，並使該封裝結構2,2a可藉由一支撐架91而整合配置於該電子產品9中。應可理解地，可依該電子產品9之內部空間狀況來佈設該封裝結構2,2a，例如，可依訊號強度需求，將該封裝結構2,2a之天線模組22設置於靠近該機殼9a之處。
第3A至3G圖為本發明之封裝結構3a之製法之第二實施例之剖視示意圖。本實施例與第一實施例之主要差異在於承載件與天線模組之配置方式，其他製程大致相同，故以下不再贅述相同處。
如第3A至3B圖所示，於一承載件20之第一側20a上設置複數個電子元件21,21’，再將至少一連接器23設於該承載件20之第一側20a上(本實施例以兩連接器23例示說明)。
如第3C圖所示，在該承載件20之第一側20a上形成一封裝層24，以包覆該些電子元件21,21’及連接器23，且於該承載件20之第二側20b上形成複數電性連接該線路層201之導電元件36。
於本實施例中，該導電元件36可為焊球(solder ball)、銅核心球、如銅材或金材等之金屬件(如柱狀、塊狀或針狀)或其他適當構件等。
如第3D圖所示，進行第一次切單製程S1，使該連接器23之接口231外露於該封裝層24之側面24c，以獲取複數中介結構3b(可參考第2D’圖)。
如第3E圖所示，可依需求於該封裝層24上形成一屏蔽層25，並使該屏蔽層25接觸該線路層201以接地，其中，該屏蔽層25未包覆該連接器23之接口231。
如第3F圖所示，將該些中介結構3b以其導電元件36接置及電性連接一天線模組32。
於本實施例中，該天線模組32係為天線板形式，其包括相結合之天線本體221、絕緣體222、基部323及線路部324。例如，該基部323係為板體，且以其一側接置該導電元件36，另一側接置該天線本體221及絕緣體222。例如，形成該基部323之材質可為聚對二唑苯(PBO)、聚醯亞胺(PI)、預浸材(PP)等之介電材，而該線路部324可為配置在該基部323中之線路重佈層(RDL)，且該基部323與線路部324可構成具有核心層或無核心層(coreless)之線路結構，如封裝基板(substrate)。
如第3G圖所示，沿如第3F圖所示之切割路徑進行第二次切單製程S2，以取得本發明之封裝結構3a。
本發明之封裝結構3a於後續應用時，如第3H圖所示，該連接器23可藉由一如傳輸排線或可撓式電路板之傳輸配件8電性連接至一電子產品9(如智慧型手機)之主機板90之連接埠900上，並使該封裝結構3a可藉由一支撐架91而整合配置於該電子產品9中，且可將該封裝結構3a之天線模組32設置於靠近該機殼9a之處。
第4A至4F圖為本發明之封裝結構4,4a之製法之第三實施例之剖視示意圖。本實施例與第一實施例之主要差異在於連接器之配置方式，其他製程大致相同，故以下不再贅述相同處。
如第4A圖所示，提供一承載件20，其第一側20a上設置有複數個電子元件21,21’及複數連接器23，且其第二側20b上設置有一天線模組22。
於本實施例中，該些連接器23係以接口231背對該承載件20之第一側20a的方式作設置。例如，該些連接器23係以間隔並排之方式設於該承載件20之第一側20a上。
如第4B圖所示，將一金屬框架47以遮蓋該些連接器23之方式設置在該承載件20之第一側20a上，且該金屬框架47係具有一容置該些連接器23之容置空間47a。
於本實施例中，該金屬框架47可例如為鐵片，其以罩蓋方式遮蓋於該些連接器23之外圍，且該容置空間47a係為凹槽狀，以利於封蓋該些連接器23。
如第4C圖所示，在該承載件20之第一側20a上形成一封裝層24，以包覆該些電子元件21,21’及金屬框架47。
如第4D圖所示，將該容置空間47a作為切割路徑，以沿該切割路徑進行切單製程S，使該金屬框架47之容置空間47a連通該封裝層24之側面(可參考第2D’圖)，故藉由該金屬框架47之設計，以避免該封裝層24覆蓋該連接器23，使該連接器23可外露於該封裝層24之側面。
於本實施例中，該切單製程S之切割路徑係對應各該連接器23之間的間隔t(如第4C圖所示)，以獲取複數個具有該金屬框架47與連接器23之封 裝結構4，並使該連接器23及該金屬框架47之容置空間47a同時外露於該封裝層24之側面。
再者，該金屬框架47係藉由其支撐部471支撐於該承載件20上，以令該支撐部471定義出該容置空間47a，使該連接器23位於該支撐部471內，如第4D’圖所示，故於另一實施例中，依據產品功能需求，將該容置空間47a作為切割路徑，可於沿該切割路徑進行切單製程S之過程中，針對該金屬框架47之其中一側處進行切割(如沿該金屬框架47之其中一支撐部471進行切割)，以同時獲取複數具有該金屬框架47與連接器23之封裝結構4，且使該連接器23及該金屬框架47之容置空間47a同時外露出該封裝層24之側面24c。
如第4E圖所示，可依需求於該封裝層24上形成一接地該線路層201之屏蔽層25，且該屏蔽層25未包覆該連接器23及該金屬框架47之容置空間47a，以取得另一封裝結構4a。
本發明之封裝結構4,4a於後續應用時，如第4F圖所示，該連接器23可藉由一如傳輸排線或可撓式電路板之傳輸配件8電性連接至一電子產品9(如智慧型手機)之主機板90之連接埠900上，並使該封裝結構4,4a可藉由一支撐架91而整合配置於該電子產品9中，且可將該封裝結構4,4a之天線模組22設置於靠近該機殼9a之處。
第5A至5G圖為本發明之封裝結構之製法之第四實施例之剖視示意圖。本實施例與第二實施例之主要差異在於天線模組之配置方式，其他製程大致相同，故以下不再贅述相同處。
如第5A至5B圖所示，係於一承載件20之第一側20a上設置複數電子元件21,21’、連接器23及金屬框架47。
如第5C圖所示，在該承載件20之第一側20a上形成封裝層24，以包覆該些電子元件21,21’及金屬框架47，且在該承載件20之第二側20b上形成複數電性連接該承載件20的導電元件36。
如第5D圖所示，進行第一次切單製程S1，以分割該金屬框架47，使該容置空間47a及其內之連接器23外露於該封裝層24之側面24c，以獲取複數個具有該金屬框架47與連接器23之中介結構5b。
於另一實施例中，如第5D’圖所示，依據產品功能需求，可於進行切單製程S1之過程中，針對該金屬框架47之其中一側處進行切割(如沿該金屬框架47之其中一支撐部471進行切割)，以同時獲取複數具有該金屬框架47與連接器23之中介結構5b。
如第5E圖所示，於該封裝層24上形成一接地該線路層201之屏蔽層25，且該屏蔽層25未包覆該連接器23及該金屬框架47之容置空間47a。
如第5F圖所示，可將複數個中介結構5b透過該些導電元件36接置一天線模組32。接著，如第5G圖所示，進行第二次切單製程S2，以取得本發明之封裝結構5a。
本發明之封裝結構5a於後續應用時，如第5H圖所示，該連接器23可藉由一如傳輸排線或可撓式電路板之傳輸配件8電性連接至一電子產品9(如智慧型手機)之主機板90之連接埠900上，並使該封裝結構5a可藉由一支撐架91而整合配置於該電子產品9中，且可將該封裝結構5a之天線模組22設置於靠近該機殼9a之處。
因此，本發明之製法藉由整合一連接器23於該封裝結構2,2a,3a,4,4a,5a上，使該封裝結構2,2a,3a,4,4a,5a可電性連接該電子產品9(如智慧 型手機)之主機板90，且該封裝結構2,2a,3a,4,4a,5a可依訊號強度需求設置靠近機殼9a處，故相較於習知技術，該封裝結構2,2a,3a,4,4a,5a之配置不受該天線模組22,32之位置之限制，因而該電子產品9之內部其它組件之設計不會受到空間限制，致使該電子產品9可依需求滿足預設之功能。
再者，該連接器23直接設於該封裝結構2,2a,3a,4,4a,5a上，使該主機板90提供的電能可直接傳進該承載件20，而不需經過其他傳電路徑，故該封裝結構2,2a,3a,4,4a,5a之電性表現較佳，且電耗(loss)較少。
又，藉由將該連接器23設於該切單製程S(或第一與第二切單製程S1,S2)之切割路徑上，以於切割作業完成後，該連接器23的一側即外露出該封裝層24之側面24c，故本發明之製法省時且省成本，即該封裝層24可直接形成於該承載件20之整版面上，而無需如習知技術之局部模封(partial molding)製程(習知技術僅局部版面配置，因而需特製模具或移除多餘的封裝材)。
另外，於其它實施例中，若該連接器23未設於該切單製程S(或第一與第二切單製程S1,S2)之切割路徑上，如第6A圖所示，可先形成一如光阻或其它可移除耗材之阻層68於該連接器23及其接口231上，再以封裝層24包覆該電子元件21及阻層68，故於切單製程後，只需移除該阻層68，即可令該連接器23之接口231外露於該封裝層24之側面24c，如第6B及6B’圖所示，因而可免用該金屬框架47。因此，藉由該阻層68之佈設可避免該封裝層24覆蓋該連接器23，但亦可依需求同時使用該阻層68與金屬框架47。
本發明復提供一種封裝結構2,2a,3a,4,4a,5a，其包括一承載件20、設於該承載件上之一天線模組22、至少一電子元件21、至少一連接器23以及一封裝層24。
所述之封裝層24係包覆該電子元件21及該連接器23，且使該連接器23之部分表面外露於該封裝層24。
於一實施例中，該承載件20與該天線模組22係結合成一天線板。
於一實施例中，該天線模組22可藉由至少一導電元件36堆疊於該承載件20上。
於一實施例中，該連接器23係具有一接口231，其外露於該封裝層24之側面24c。
於一實施例中，該封裝結構4,4a,5a更包括一埋設於該封裝層24中之金屬框架47，其設於該承載件20上並遮蓋該連接器23。例如，該金屬框架47係形成用以容置該連接器23之容置空間47a，且使該容置空間47a連通該封裝層24之側面24c。
於一實施例中，該封裝結構2a,3a,4a,5a更包括一形成於該封裝層24上且接地之屏蔽層25。
綜上所述，本發明之封裝結構主要藉由將該連接器封裝於該封裝層內，並外露出該連接器之接口，以利於電性連接該電子產品之主機板，故該封裝結構之配置不受該天線模組之位置之限制，因而該電子產品之內部其它組件之設計不會受到空間限制，使該電子產品可依需求滿足所有之功能，且該主機板提供的電能可直接傳進該承載件而不需經過其他傳電路徑，以提升該封裝結構之電性表現，並減少電耗。
再者，本發明之封裝結構藉由將該連接器一同整合在該封裝層內，不僅使該天線模組可依訊號強度需求設置靠近機殼處而有效利用系統端(或該電子產品)的內部空間，且可整面封裝而大幅降低封裝成本，並大幅縮小該封裝結構之體積。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。
2a:封裝結構
20:承載件
20a:第一側
20b:第二側
200:絕緣層
201:線路層
21,21’:電子元件
22:天線模組
221:天線本體
222:絕緣體
23:連接器
231:接口
24:封裝層
25:屏蔽層

Claims (19)

  1. 一種封裝結構，係包括：承載件；天線模組，係設於該承載件上；電子元件，係設於該承載件上；連接器，係設於該承載件上；以及封裝層，係形成於該承載件上並包覆該電子元件及該連接器，且使該連接器之部分表面外露於該封裝層；其中，該連接器係具有一外露於該封裝層之接口。
  2. 如申請專利範圍第1項所述之封裝結構，其中，該承載件係具有相對之第一側與第二側，且該第一側上係配置該電子元件與連接器，而該第二側上係配置該天線模組。
  3. 如申請專利範圍第1項所述之封裝結構，其中，該天線模組與該承載件係結合成一天線板。
  4. 如申請專利範圍第1項所述之封裝結構，其中，該天線模組係藉由至少一導電元件堆疊於該承載件上。
  5. 如申請專利範圍第1項所述之封裝結構，更包括埋設於該封裝層中之金屬框架，其中，該金屬框架係設於該承載件上並遮蓋該連接器。
  6. 如申請專利範圍第5項所述之封裝結構，其中，該金屬框架係形成用以容置該連接器之容置空間，且使該容置空間連通該封裝層之側面。
  7. 如申請專利範圍第1項所述之封裝結構，更包括形成於該封裝層上且接地之屏蔽層。
  8. 一種封裝結構之製法，係包括：提供一配置有電子元件之承載件；將連接器設置於該承載件上；以及以封裝層包覆該電子元件及該連接器，且令該連接器之部分表面外露於該封裝層，其中，該承載件上復配置有天線模組，且該連接器係具有一外露於該封裝層之接口。
  9. 如申請專利範圍第8項所述之封裝結構之製法，其中，該承載件係具有相對之第一側與第二側，且該第一側上係配置該電子元件與連接器，而該第二側上係配置該天線模組。
  10. 如申請專利範圍第8項所述之封裝結構之製法，其中，該承載件與該天線模組係結合成一天線板。
  11. 如申請專利範圍第8項所述之封裝結構之製法，其中，該天線模組係藉由至少一導電元件堆疊於該承載件上。
  12. 如申請專利範圍第8項所述之封裝結構之製法，其中，該承載件上設置複數連接器，且各該連接器之接口係相互對接，以於該封裝層包覆該電子元件及該複數連接器後，再以切割該封裝層之方式，分開該複數連接器，且使各該連接器之接口外露於該封裝層之側面。
  13. 如申請專利範圍第8項所述之封裝結構之製法，其中，先於該連接器之接口上形成阻層，再以該封裝層包覆該電子元件及該連接器，待切單製程後，移除該阻層，使該接口外露於該封裝層之側面。
  14. 如申請專利範圍第8項所述之封裝結構之製法，其中，該連接器之接口係背對該承載件，且於形成該封裝層之前，以阻層或金屬框架遮蔽該接口。
  15. 如申請專利範圍第8項所述之封裝結構之製法，更包括形成金屬框架於該承載件上，且該金屬框架遮蓋該連接器，並令該封裝層包覆該金屬框架。
  16. 如申請專利範圍第15項所述之封裝結構之製法，其中，該金屬框架係形成用以容置該連接器之容置空間，且使該容置空間連通該封裝層之側面。
  17. 如申請專利範圍第16項所述之封裝結構之製法，其中，該容置空間係作為切割路徑，以沿該切割路徑進行切單製程，使該連接器及該容置空間同時外露於該封裝層之側面。
  18. 如申請專利範圍第16項所述之封裝結構之製法，其中，該金屬框架係藉由其支撐部支撐於該承載件上，使該連接器位於該支撐部內，再進行切單製程，以沿該金屬框架之支撐部進行切割，使該連接器及該容置空間同時外露於該封裝層之側面。
  19. 如申請專利範圍第8項所述之封裝結構之製法，更包括於該封裝層上形成屏蔽層，並使該屏蔽層接地。
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TWI759120B (zh) * 2021-03-04 2022-03-21 恆勁科技股份有限公司 中介基板及其製法
TWI778816B (zh) * 2021-09-28 2022-09-21 欣興電子股份有限公司 晶片互聯的封裝結構及其封裝方法
US11670520B2 (en) 2021-09-28 2023-06-06 Unimicron Technology Corp. Package structure with interconnection between chips and packaging method thereof

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