TWI708951B - Detection circuit and display panel - Google Patents

Abstract

A detection circuit includes a rectifier circuit, a first amplifier circuit, and a first capacitor. The rectifier circuit is configured to convert a feedback voltage from a pixel array to a first signal. The first amplifier circuit is configured to amplify the first signal to generate a second signal. The first capacitor is configured to be charged or discharged according to the second signal to adjust a node voltage, in which the node voltage is configured to determine whether to adjust a plurality of data polarities of the pixel array.

Description

Detection circuit and display panel

The present disclosure relates to a detection circuit and a display panel, and more particularly to a detection circuit and a display panel for switching the polarity of data.

The display panel can output different images according to different input data. However, in practical applications, when the input data conforms to some special input patterns, the internal voltage of the display panel will be disturbed, which indirectly causes the color shift of the display panel.

In order to solve the above problem, an embodiment of the present disclosure provides a detection circuit including a rectifier circuit, a first amplifying circuit, and a first capacitor. The rectifier circuit is used for converting the feedback voltage from the pixel array into the first signal. The first amplifying circuit is used for amplifying the first signal to generate the second signal. The first capacitor is used to be charged or discharged according to the second signal to adjust the node voltage, wherein the node voltage is used to determine whether to adjust the plurality of data polarities of the pixel array.

An implementation aspect of the present disclosure provides a display panel including a pixel array, a driver, and a detection circuit. Pixel array to provide A feedback voltage. The driver is used for controlling a plurality of data polarities of the pixel array according to the control signal. The detection circuit is coupled to the pixel array and used to rectify the feedback voltage to adjust the node voltage to output a control signal.

In summary, the detection circuit and the display panel provided by the embodiment of the present application adjust the polarity configuration of the pixel array by detecting the feedback voltage, reduce the pinch voltage variation of the pixel circuit, and reduce the color shift effect of the display panel.

100‧‧‧Display Panel

110‧‧‧Detection circuit

120‧‧‧Processing circuit

130‧‧‧Drive

140‧‧‧Pixel array

150‧‧‧Multiple data polarity

CS‧‧‧Control signal

MS‧‧‧ Modulation signal

Vcom‧‧‧Feedback voltage

200‧‧‧Pixel circuit

210、220、230‧‧‧electrode

240‧‧‧Transistor

Cx、Cy‧‧‧Capacitor

Gate‧‧‧Gate signal

Data‧‧‧Enter data

250‧‧‧Feedback voltage waveform

260‧‧‧First input data waveform

270‧‧‧The second input data waveform

300‧‧‧Detection circuit

310‧‧‧Rectifier circuit

320‧‧‧First amplifier circuit

320A‧‧‧Amplifier

330‧‧‧Second amplifier circuit

D‧‧‧Diode

R1~R3‧‧‧Resistor

R4, R5‧‧‧Resistor

R6, R7‧‧‧Resistor

C1, C2‧‧‧Capacitor

VDD‧‧‧Supply voltage

Vn‧‧‧node voltage

Vn2‧‧‧First divided voltage

VDD2‧‧‧Second divided voltage

V1‧‧‧First signal

V2‧‧‧Second signal

Vcom‧‧‧Feedback voltage

400‧‧‧Polar configuration diagram

410‧‧‧Original Polarity Configuration

420‧‧‧First polarity configuration

430‧‧‧Second polarity configuration

The schematic description of this case is as follows: Figure 1 is a schematic diagram of a display panel according to some embodiments of this case; Figure 2A is a schematic diagram of the internal circuit of a pixel circuit according to some embodiments of this case; 2B Fig. 3 is a schematic diagram of the detection circuit according to some embodiments of the present case; and Fig. 4 is a schematic diagram of the detection circuit according to some embodiments of the present case; Schematic diagram of polarity configuration shown.

In this article, the terms first, second, third, etc., are used to describe various elements, components, regions, layers, and/or blocks. But these elements, components, regions, layers and/or blocks should not Limited by these terms. These terms are only used to identify single elements, components, regions, layers and/or blocks. Therefore, in the following, a first element, component, region, layer and/or block may also be referred to as a second element, component, region, layer and/or block without departing from the original meaning of the present case.

In this article, unless the article is specifically limited in the context, "一" and "the" can generally refer to one or more. It will be further understood that the terms "include", "include", "have" and similar words used in this article indicate the recorded features, regions, integers, steps, operations, elements and/or components, but do not exclude The described or additional one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.

Unless otherwise defined, all words (including technical and scientific terms) used herein have their usual meanings, and their meanings can be understood by those familiar with the field. Furthermore, the definitions of the above-mentioned words in commonly used dictionaries should be interpreted as meaning consistent with the relevant fields in this case in the content of this specification. Unless specifically defined, these terms will not be interpreted as idealized or overly formal.

As used herein, "about", "approximately", or "substantially" includes the stated value and the average value within the acceptable deviation range of the specific value determined by a person of ordinary skill in the art, taking into account the measurement in question and the A certain amount of measurement-related error (ie, the limitation of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, the "about", "approximately" or "substantially" used herein can select a more acceptable bias based on optical properties, etching properties or other properties. The range of difference or standard deviation can be applied to all properties without using one standard deviation.

When an element is called "connected" or "coupled" to another element, it can be directly connected or coupled to another element, or an additional element may be present. In contrast, when an element is referred to as "directly connected" or "directly coupled" to another element, there is no additional element in it.

Hereinafter, multiple implementations of this case will be disclosed in schematic form. For the sake of clarity, many practical details will be described in the following description. However, it should be understood that these practical details should not be used to limit the case. In other words, in some implementations of this case, these practical details are unnecessary. In addition, in order to simplify the drawings, some conventionally used structures and elements will be shown in a simple schematic manner in the drawings.

Referring to FIG. 1, FIG. 1 is a schematic diagram of a display panel 100 according to some embodiments of the present application. The display panel 100 includes a detection circuit 110, a processing circuit 120, a driver 130 and a pixel array 140. The pixel array 140 is coupled between the driver 130 and the detection circuit 110. The detection circuit 110 is coupled to the pixel array 140 to receive the feedback voltage Vcom to the detection circuit 110 to determine whether the feedback voltage Vcom is disturbed by the pattern of the input data Data (as shown in FIG. 2A).

In some embodiments, the pixel array 140 includes a plurality of pixel circuits 200 arranged in a matrix. The pixel array 140 is used to output corresponding display content according to the input data Data. In some embodiments, in this matrix, according to the input data Data, the plurality of pixel circuits 200 in each column corresponds to one of the plurality of data polarities 150.

The arrangement of data polarity shown in Figure 1 is used as an example, and this The case is not limited to this. The arrangement of the polarity of the various data is within the scope of this case.

In some embodiments, as shown in FIG. 2A later, the feedback voltage Vcom comes from a common electrode 210 of a plurality of pixel circuits 200 in the pixel array 140. In some embodiments, the feedback voltage Vcom can also come from other nodes in the pixel array 140 coupled to the common electrode 210.

In some embodiments, the detection circuit 110 is coupled to the pixel array 140 and the processing circuit 120, and is used to rectify the feedback voltage Vcom to adjust a node voltage Vn in the detection circuit 110 (as shown in the third figure below), and The control signal CS is generated according to the node voltage Vn.

In some embodiments, the processing circuit 120 is coupled between the detection circuit 110 and the driver 130, and is used to receive the control signal CS. The processing circuit 120 is activated according to the control signal CS to generate a modulation signal MS to control the driver 130. In some embodiments, the processing circuit 120 can be implemented by a special application integrated circuit, but this case is not limited to this. The processing circuit 120 can confirm whether there is a color shift in the pixel array 140 according to the modulation signal MS, so as to improve the color shift problem by redistributing a plurality of data polarities 150.

In some embodiments, the driver 130 is used to redistribute a plurality of data polarities 150 of the pixel array 140 according to the modulation signal MS to prevent the feedback voltage Vcom from being disturbed by the input data data. In some embodiments, the driver 130 can be a source driver, which can be used to provide the aforementioned input data data.

Referring to FIG. 2A, FIG. 2A is a schematic diagram of the internal circuit of the pixel circuit 200 according to some embodiments of the present application. Pixel circuit 200 It includes a transistor 240, a capacitor Cy, and a capacitor Cx. In the pixel circuit 200, the electrode 220 receives the gate signal Gate, and the electrode 230 receives the input data Data. The transistor 240 is turned on according to the gate signal Gate to transfer the input data Data to charge the capacitor Cy and the capacitor Cx to output corresponding display content.

In some embodiments, the pixel circuit 200 receives a common voltage (not shown) from the common electrode 210, which is used to define the data polarity of the pixel circuit 200. In some embodiments, the voltage on the common electrode 210 can be regarded as the feedback voltage Vcom. In some cases, due to the coupling between the electrode 230 and the common electrode 210, the feedback voltage Vcom may be disturbed due to the unevenness of the input data Data transformation or the special input pattern. The disturbance on the feedback voltage Vcom causes the capacitor Cy and the capacitor Cx to produce a clamping voltage variation, which causes the display panel 100 to produce a color shift effect.

Referring to FIG. 2B, FIG. 2B is a schematic diagram illustrating the state of the feedback voltage Vcom according to some embodiments of the present application. Under some specific input types, the feedback voltage Vcom may be disturbed due to the uneven variation of the input data Data. As shown in FIG. 2B, the feedback voltage waveform 250 is pulled along with the first input data waveform 260 and the second input data waveform 270, resulting in the original level of the feedback voltage waveform 250 showing an unstable state. The first input data waveform 260 and the second input data waveform 270 may be data signals adjacent to or coupled to the electrodes 230 of the plurality of pixel circuits 200.

Because of the coupling effect, when there is a transient switch (for example, a positive half cycle) on the first input data waveform 260, the feedback voltage waveform 250 will produce a similar transient switch. When there is a transient switch (for example, a negative half cycle) on the second input data waveform 270, the feedback voltage waveform 250 will produce a similar transient switch. by Due to the instability of the feedback voltage waveform 250, the display panel 100 may have undesirable problems such as color shift effects.

Referring to FIG. 3, FIG. 3 is a schematic diagram of the detection circuit 300 according to some embodiments of the present application. The detection circuit 300 includes a rectifier circuit 310, a first amplifying circuit 320, a first capacitor C1, and a second amplifying circuit 330.

The rectifier circuit 310 is used to rectify the feedback voltage Vcom containing positive and negative half cycles into a first signal V1 containing a single half cycle, and output the first signal V1 to the first amplifying circuit 320.

In some embodiments, the rectifier circuit 310 includes a second capacitor C2, a diode D, and a resistor R1. The second capacitor C2 is coupled to the pixel array 140 and used to receive the feedback voltage Vcom. The diode D is coupled to the second capacitor C2. The resistor R1 is coupled between the diode D and the ground, and is used to output the first signal V1.

The above-mentioned circuit setting method is a half-flow rectification circuit. In some embodiments, the rectifier circuit 310 may be implemented by a half-wave rectifier circuit or a full-wave rectifier circuit. In a half-wave rectifier circuit, one of the positive or negative half cycles of the AC waveform will be eliminated, and only half of the input waveform will form the output signal. The full-wave rectifier circuit can convert the complete input waveform into a waveform of the same polarity, which means that the full-wave rectifier can convert the positive and negative half cycles of the original AC signal into the same half-cycle output signal.

Referring to the aforementioned Figure 2B, the feedback voltage waveform 250 will be subjected to different input data Data, causing the waveform to be pulled up or down. In some embodiments, the feedback voltage Vcom can be adjusted by the rectifier circuit 310 The flow is drawn in a single direction (upward or downward) and output as the first signal V1.

In some embodiments, the first amplifying circuit 320 receives and amplifies the first signal V1 to generate the second signal V2. In some embodiments, the magnification of the first amplifying circuit 320 depends on the usage requirements, so that the subsequent circuit can determine whether to readjust the data polarities 150 of the pixel array 140.

In some embodiments, the first amplifying circuit 320 includes an amplifier 320A and a plurality of resistors R2 and R3. The first input terminal of the amplifier 320A is used to receive the first signal V1, and output a second signal V2 through the output terminal to charge the capacitor C1. The first end of the resistor R2 is coupled to ground, and the second end of the resistor R2 is coupled to the second input end of the amplifier 320A. The first end of the resistor R3 is coupled to the second input end of the amplifier 320A, and the second end of the resistor R2 is coupled to the output end of the amplifier 320A. The plurality of resistors R2 and R3 are used to set the magnification of the first amplifying circuit 320, and the magnification can be adjusted according to different requirements.

In some embodiments, the first terminal of the first capacitor C1 is coupled to the output terminal of the amplifier 320A, and the second terminal of the first capacitor C1 is coupled to the ground. The first capacitor C1 is used to be charged or discharged according to the second signal V2 to adjust the node voltage Vn for the second amplifying circuit 330 to generate the control signal CS to the processing circuit 120.

For example, when the feedback voltage Vcom is pulled by the input data Data to cause disturbance, the rectifier circuit 110 rectifies the feedback voltage Vcom to a positive voltage (ie, the first signal V1). In response to this positive voltage, the first amplifying circuit 320 generates a higher voltage (that is, the second signal V2) to quickly become the first capacitor C1 charging. In this way, the node voltage Vn on the first capacitor C1 will increase accordingly to present a high voltage level. At this time, the second amplifying circuit 330 determines that the feedback voltage Vcom is in an unstable state according to the high voltage level of the node voltage Vn, and then generates a control signal CS of a predetermined level (for example, a high voltage level) to the processing circuit 120 to Adjust the data polarity 150 of the pixel array 140.

In some embodiments, when the feedback voltage Vcom is in a steady state, the potential of the second signal V2 will also be in a steady state (or approaching zero). At this time, the first capacitor C1 is discharged, and the node voltage Vn begins to decrease to present a low voltage level. The second amplifying circuit 330 judges that the feedback voltage Vcom is in a stable state according to the low voltage level of the node voltage Vn to generate the control signal CS of the low voltage level. In other words, in some embodiments, the level of the node voltage Vn can be used to determine whether the pixel array 140 has problems such as color shift, so as to determine whether to adjust the plurality of data polarities 150 of the pixel array 140.

In some embodiments, the detection circuit 300 further includes a plurality of resistors R4, R5, R6, and R7. A plurality of resistors R4 and R5 are coupled to the first amplifying circuit 320 and the second amplifying circuit 330. In detail, the first terminal of the resistor R4 is used to receive the supply voltage VDD, and the second terminal of the resistor R4 is coupled to the second input terminal of the second amplifying circuit 330. The first end of the resistor R5 is coupled to the second end of the first resistor R4, and the second end of the resistor R5 is coupled to the ground. The resistors R4 and R5 can be used to divide the supply voltage VDD to generate the second divided voltage VDD2. In some embodiments, the second divided voltage VDD2 can be used as a reference voltage for comparison with the first divided voltage Vn2 described later. A plurality of resistors R6 and R7 are coupled to the first capacitor C1, wherein the first end of the resistor R6 is coupled to the second end of the first capacitor C1, and the second end of the resistor R6 is coupled to the second The first input terminal of the amplifying circuit 330. The first end of the resistor R7 is coupled to the first end of the first capacitor C1, and the second end of the resistor R7 is coupled to the first input end of the second amplifying circuit 330. The plurality of resistors R6 and R7 are used to divide the node voltage Vn to generate the first divided voltage Vn2.

In some embodiments, the second amplifying circuit 330 includes an amplifier. The first input of the amplifier is used to receive the first divided voltage Vn2 associated with the node voltage Vn, and the second input of the amplifier is used to receive The voltage VDD is a second divided voltage VDD2, and the output terminal of the amplifier is used to output the control signal CS.

In some embodiments, when the node voltage Vn increases, the second amplifying circuit 330 generates a control signal CS with a predetermined level to adjust the plurality of data polarities 150 of the pixel array 140.

In the related art, a special application integrated circuit that detects the input data is used to determine whether to adjust the polarity of the pixel array. However, with more and more forms of input data, the design complexity of the integrated circuit algorithm for this special application is getting higher and higher. Compared with the aforementioned technology, in the embodiment of the present case, as shown in FIG. 3, the detection circuit 300 determines whether to activate the processing circuit 120 by detecting the feedback voltage Vcom to control the plurality of data of the pixel array 140 Polarity 150. The implementation of the detection circuit 300 will reduce the operating cost of the processing circuit 120 and reduce the design complexity of the internal algorithm of the processing circuit 120.

In some embodiments, the detection circuit 300 can ignore the pattern of the input data Data, directly detect the feedback voltage Vcom of the pixel array 140 to determine whether it is pulled, and raise the first capacitor C1 according to the feedback voltage Vcom The voltage level (ie, the node voltage Vn) generates a control signal CS to the processing circuit 120.

Referring to FIG. 4, FIG. 4 is a schematic diagram 400 of the polarity configuration according to some embodiments of the present application. In the original polarity configuration 410, the polarity of each column of data lines from left to right is arranged in the order of negative and positive, and when the feedback voltage Vcom is disturbed by a certain amount of variation, the pixel array 140 changes each column according to the control signal CS. The polarity arrangement of a column of data lines is to change a plurality of data polarities 150 included in the pixel array 140 in the first figure.

In some embodiments, the pixel array 140 changes the sequence arrangement of the plurality of data polarities 150 according to the control signal CS. The sequence can be: negative, negative, positive, and positive, as shown in the first polarity configuration 420 in Figure 4. Or it can be: negative, negative, negative, negative, positive, positive, positive, positive, such as the second polarity configuration 430.

In some embodiments, the sequence of the plurality of data polarities 150 is not limited to the above two, and the processing circuit 120 can adjust the sequence arrangement according to the control signal CS and the input data Data.

The pixel circuit 200 of the above embodiment can also be implemented by various suitable types of N-type transistors. In this case, the enable level of each corresponding signal is the high voltage level, and the disable level is the low voltage level.

In summary, the detection circuit 110 and the display panel 100 provided by the embodiment of the present application adjust the polarity configuration of the pixel array 140 by detecting the feedback voltage Vcom, thereby reducing the clamping voltage variation of the pixel circuit, and reducing the display panel 100 Color cast effect.

Although this case has been disclosed as above in the implementation mode, it is not limited to this case. Anyone who is familiar with this technique will not depart from the spirit and scope of this case. Various changes and modifications can be made, so the scope of protection in this case shall be subject to the scope of the attached patent application.

100‧‧‧Display Panel

110‧‧‧Detection circuit

120‧‧‧Processing circuit

130‧‧‧Drive

140‧‧‧Pixel array

150‧‧‧Multiple data polarity

200‧‧‧Pixel circuit

CS‧‧‧Control signal

MS‧‧‧ Modulation signal

Vcom‧‧‧Feedback voltage

Claims (13)

A detection circuit includes: a rectifier circuit for converting a feedback voltage from a pixel array into a first signal; a first amplifying circuit for amplifying the first signal to generate a second signal; and A first capacitor is used to be charged or discharged according to the second signal to adjust a node voltage, wherein the node voltage is used to determine whether to adjust a plurality of data polarities of the pixel array; wherein the feedback voltage comes from the pixel A common electrode in the array. The detection circuit according to claim 1, wherein the rectifier circuit includes: a second capacitor for receiving the feedback voltage; a diode coupled to the second capacitor; and a resistor coupled to the Between the diode and the ground, and used to output the first signal. The detection circuit according to claim 1, wherein the rectifier circuit is a half-wave rectifier circuit or a full-wave rectifier circuit. The detection circuit according to claim 1, wherein the first amplifying circuit includes: an amplifier, wherein a first input terminal of the amplifier is used to receive the first signal, and an output terminal of the amplifier is used to output the first signal Two signals; A plurality of resistors are coupled to a second input terminal and the output terminal of the amplifier, and are used to set a magnification ratio of the first amplifying circuit. The detection circuit according to claim 1, further comprising: a second amplifying circuit for generating a control signal to a processing circuit according to the node voltage to adjust the data polarities of the pixel array. The detection circuit according to claim 5, wherein the second amplifying circuit includes: an amplifier, a first input terminal of the amplifier is configured to receive a first divided voltage associated with the node voltage, and a first divided voltage of the amplifier Two input terminals are used for receiving a second divided voltage associated with a supply voltage, and an output terminal of the amplifier is used for outputting the control signal. The detection circuit according to claim 6, further comprising: a plurality of first resistors coupled to the first amplifying circuit and the second amplifying circuit, and the first resistors are used to divide the supply voltage to generate the A second divided voltage; and a plurality of second resistors coupled to the first capacitor, and the second resistors are used to divide the node voltage to generate the first divided voltage. The detection circuit according to claim 1, wherein when the node voltage rises, the second amplifying circuit generates the control signal with a predetermined level to adjust the data polarity of the pixel array. A display panel includes: a pixel array for providing a feedback voltage; a driver for controlling a plurality of data polarities of the pixel array according to a control signal; and a detection circuit coupled to the picture The pixel array is used to rectify the feedback voltage to adjust a node voltage to output the control signal; wherein the feedback voltage comes from a common electrode in the pixel array. The display panel of claim 9, wherein the detection circuit includes: a rectifier circuit for rectifying a feedback voltage from a pixel array into a first signal; and a first amplifier circuit for amplifying the first signal A signal is used to generate a second signal; and a capacitor is used to be charged or discharged according to the second signal to adjust the node voltage, wherein the node voltage is used to determine whether to adjust the data polarities of the pixel array. The display panel according to claim 10, wherein the rectifier circuit is a half-wave rectifier circuit or a full-wave rectifier circuit. The display panel according to claim 10, wherein the detection circuit further comprises: a second amplifying circuit for generating the control signal to a processing circuit according to the node voltage to adjust the data polarities of the pixel array. The display panel of claim 12, wherein the processing circuit is coupled to the detection circuit and the driver, and when the control signal is at a predetermined level, the processing circuit is activated and generates a modulation signal to control the driver .

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