TWI704440B - Power supply capable of reducing hold up time of output capacitor - Google Patents

Abstract

A power supply includes an inverter, an input capacitor, an output capacitor, a discharge control circuit. The inverter is configured to convert an input voltage supplied by mains electricity to an output voltage. The discharge control circuit is configured to monitor the supply status of the mains electricity. When determined that the mains electricity is currently isolated from the power supply, the discharge control circuit is configured to rapidly cut off the supply path of the input capacitor, thereby preventing the output capacitor from being continuously charged. Meanwhile, the discharge control circuit is configured provide a fast discharge path for the output capacitor, thereby reducing the holdup time of the output capacitor.

Description

Power supply capable of reducing the maintenance time of output capacitor

The present invention relates to a power supply, especially a power supply that can reduce the maintenance time of the output capacitor.

Different components in notebook computers require different operating voltages. Therefore, power supplies are commonly used to convert alternating current (AC) city power into direct current (DC) through transformation, rectification, and filtering to drive different zeros. Components. When the AC mains power is on, the notebook will operate in AC mode, and the power required for its operation is provided by the AC mains. When the AC mains is not powered on, the notebook will operate in DC mode. If the plug of the power supply is still connected to the jack of the notebook, the power required for the notebook to operate It will be provided by the output capacitance of the power supply and the equivalent input capacitance of the notebook computer.

In the prior art, when a notebook computer operating in DC mode enters hibernation, if the output capacitor of the power supply and the equivalent input capacitor of the notebook computer still store a large amount of power, the screen of the notebook computer still It will be in a continuous display state, so that the notebook computer cannot enter hibernation smoothly. Therefore, there is a need for a device that can reduce the output capacitance Power Supplier.

The present invention provides a power supply capable of shortening the maintenance time of an output capacitor, which includes a first node, a second node, a transformer, a first input capacitor, an output capacitor, a first switch, and a discharge control circuit . There is a wire resistance between the first node and the second node. The transformer includes a first primary side winding, a second primary side winding, a third primary side winding, a first secondary side winding, and a second secondary side winding, which are used to input one of the mains supply The voltage is converted into a first output voltage. The first input capacitor is coupled between the input voltage and a ground potential, and the output capacitor is coupled between the first node and the ground potential. The first terminal of the first switch is coupled to the first primary winding, the second terminal is coupled to the ground potential, and the control terminal is used to receive a first control signal. The discharge control circuit includes a first resistor and a second resistor, a second input capacitor, a second switch, a comparator, and a third switch connected in series between the first node and the ground potential. The second input capacitor includes a first terminal and a second terminal coupled to the input voltage. A first terminal of the second switch is coupled to the second terminal of the second input capacitor, a second terminal is coupled to the ground potential, and a control terminal is coupled to the third primary winding to receive a The second control signal. A positive input terminal of the comparator is coupled to the second node to receive a second output voltage, a negative input terminal is coupled to the first node to receive the first output voltage, and an output terminal is used to output a The third control signal. A first terminal of the third switch is coupled between the first resistor and the second resistor, a second terminal is coupled to the second secondary winding, and a control terminal is coupled to the comparator The output terminal receives the third control signal.

10: Transformer

20: Discharge control circuit

30: Pulse width modulation circuit

40: Detection circuit

50: laptop

100: power supply

Q1: Power switch

Q2, Q3: auxiliary switch

C _IN1 : the first input capacitor

C _IN2 : second input capacitor

C _OUT : output capacitance

C _SYS : The equivalent input capacitance of a notebook computer

D _O : output diode

D _I : Input diode

R1, R2: resistance

R _CABLE : line resistance

NP1~NP3: Primary side winding

NS1, NS3: secondary winding

N1, N2: Node

PLUG: Connector

JACK: socket

V _IN : Input voltage

V _OUT1 , V _OUT2 : output voltage

I _IN : Input current

I _OUT : output current

GD1, GD2, GD3: control signal

V _FB : Feedback voltage

GND: ground potential

P1, P2: pin

A1, A2: discharge path

Figure 1 is a schematic diagram of a power supply in an embodiment of the invention.

Figure 2 is an equivalent circuit diagram of the secondary side of the power supply of the present invention operating in the fourth state.

Figure 1 is a schematic diagram of a power supply 100 in an embodiment of the present invention. The power supply 100 includes a transformer 10, a discharge control circuit 20, a pulse width modulation circuit 30, a detection circuit 40, a power switch Q1, a power switch Q1, a first input capacitor C _IN1 , and an output The capacitor C _OUT , an input diode D _I , and an output diode D _O. The power supply 100 can convert an input voltage V _IN supplied by the city power into an output voltage V _OUT1 , and then provide the power required for the operation of a notebook computer 50. The power supply 100 can be connected to a jack jack on the notebook computer 50 through a connector PLUG. I _IN represents the input current when the power supply 100 is operating, I _OUT represents the output current when the power supply 100 is operating, C _SYS represents the equivalent input capacitance of the notebook computer, and N1 represents the output capacitance on the wire of the power supply 100 C _{OUT is} the node, and N2 represents the node on the wire of the power supply 100 close to the connector PLUG. Among them, there is a line resistance R _CABLE between the nodes N1 and N2, and V _OUT2 represents the output voltage established on the node N2.

The transformer 10 includes 3 sets of primary side windings (represented by turns NP1 to NP3, respectively) and 2 sets of secondary side windings (represented by turns NS1 and NS3, respectively). The primary side winding NP1 is coupled to the input voltage V _IN , the secondary side winding NS1 is coupled to the connector PLUG through the output diode D _O and the wire (represented by the wire resistance R _CABLE ), and the input current flowing through the primary side is I _IN , and the output current flowing through the secondary side is I _OUT . The primary side winding NP1 and the secondary side winding NS1 form a voltage induction unit, the secondary side winding NS1 and the primary side winding NP2 form a voltage induction unit, and the primary side winding NP2 and the primary side winding NP3 form a voltage induction unit. An anode coupled to the input of the diode D _I is connected between the primary winding NP1 and NP2 primary winding, and the cathode coupled to the primary winding NP3, for controlling the inductive path between the primary side and the primary side winding NP2, NP3 . In the operation of the transformer 10, the relationship between the relevant voltage and current is V _IN /V _OUT =I _OUT /I _IN =NP1/NS1. In boost applications, the number of turns NS1 of the secondary side winding is greater than the number of turns NP1 of the primary side winding; in a step-down application, the number of turns NS1 of the secondary side winding is less than the number of turns NP1 of the primary side winding. In an embodiment of the present invention, the ratio of NP1 and NS1 can be 40:2, the ratio of NS1 and NP2 can be 2:2, and the ratio of NP3 and NS3 can be 5:5. The number of turns NP1 to NP3 of the side winding and the number of turns NS1 and NS3 of the secondary side winding do not limit the scope of the present invention.

The discharge control circuit 20 includes a second input capacitor C _IN2 , auxiliary switches Q2~Q3, resistors R1~R2, and a comparator CP. The first terminal of the second input capacitor C _IN2 is coupled to the input voltage V _IN , and the second terminal is selectively coupled to a ground potential GND through the auxiliary switch Q2. The first terminal of the auxiliary switch Q2 is coupled to the second terminal of the second input capacitor C _IN2 , the second terminal is coupled to the ground potential GND, and the control terminal is coupled to the primary winding NP3. The resistors R1 and R2 are connected in series between the node N1 and the ground potential GND to form a voltage divider circuit. V _DIV represents the voltage across the resistor R2, where V _DIV =(R2/R1+R2)*V _OUT . The positive input terminal of the comparator CP is coupled to the node N2 on the wire, and the negative input terminal is coupled to the node N1 on the wire. A control signal GD3 can be provided at an output terminal according to the potential relationship between the nodes N1 and N2. The first terminal of the auxiliary switch Q3 is coupled between the resistors R1 and R2, the second terminal is coupled to the secondary winding NS3, and the control terminal is coupled to the output terminal of the comparator CP.

The detection circuit 40 may be a resistor for providing a feedback voltage V _FB related to the output voltage V _OUT . The pulse width modulation circuit 30 includes two pins P1 to P2. The pin P1 is used to receive the feedback voltage V _FB , and the pin P2 is used to output a control signal GD1 to turn on or turn off the power switch Q1. The pulse width modulation circuit 30 can adjust the duty cycle of the control signal GD1 according to the value of the feedback voltage V _FB , thereby adjusting the ratio of on/off periods of the power switch Q1.

In the present invention, the purpose of the first input capacitor C _IN1 is to quickly start the power supply 100, and the purpose of the second input capacitor C _IN2 is to store energy, so the value of the second input capacitor C _IN2 is much larger than the value of the first input capacitor C The value of _IN1 . In one embodiment, the first input capacitor C _IN1 can be implemented by a 450V/33μF capacitor (error ±20%), and the second input capacitor C _IN2 can be implemented by a 450V/470μF capacitor (error ±20%). ) To implement the capacitor. However, the values of the first input capacitor C _IN1 and the second input capacitor C _IN2 do not limit the scope of the present invention.

For the purpose of illustration, the operation of the power supply 100 is divided into four states for illustration. Among them, the first state is the initial state when the AC mains power is not energized and the notebook computer 50 is not powered, the second state is the charging state when the AC mains power is on, and the third state is the charging state when the AC mains power is on. The fully charged state, and the fourth state is the discharging state when the AC mains is not powered on and needs to be supplied to the notebook computer 50.

In the first state, when the AC mains is not powered on and the notebook computer 50 is not powered, the value of the input voltage V _IN is 0, and the power switch Q1 and the auxiliary switches Q2 to Q3 are all turned off at this time.

When the AC mains starts to be energized, the power supply 100 will operate in the second state. At this time, the value of the input voltage V _IN is no longer 0, and the first input capacitor C _{IN1 is} charged. At the same time, the pulse width modulation circuit 30 outputs a control signal GD1 with a specific duty cycle so that the power switch Q1 can switch at a high frequency between on and off states. When the power switch Q1 is turned on, the primary side energy can be induced to the secondary side winding NS1 through the primary side winding NP1, thereby charging the output capacitor C _OUT and establishing the output voltage V _OUT1 on the node N1. Then, the secondary side energy will be induced to the primary side winding NP2 through the secondary side winding NS1, and then transferred to the primary side winding NP3 through the input diode D _I , so that it provides an enabling potential on the control terminal of the auxiliary switch Q2 The control signal GD2. When the auxiliary switch Q2 is turned on, the input voltage V _IN will start to charge the second input capacitor C _IN2 .

In the embodiment of the present invention, by selecting the number of turns of the secondary winding NS1, the primary winding NP2 and the primary winding NP3, the secondary energy can be induced to the primary through the secondary winding NS1 and the primary winding NP2 in sequence. The potential of the control signal GD2 established by the side winding NP3 is an enabling potential for the auxiliary switch Q2.

As mentioned earlier, the output voltage V _OUT1 established on node N1 will be lost due to the wire resistance R _CABLE after being transmitted through the wire. Therefore, the value of the output voltage V _OUT22 established on node N2 will be smaller than the output voltage. The value of V _OUT1 , that is, in the second state, the potential of the positive input terminal of the comparator CP will be lower than the potential of the negative input terminal, so the comparator CP will output a control signal GP3 with a disabling potential to turn off the auxiliary switch Q3. When the AC mains power is on, the power required for the operation of the notebook computer 50 is provided by AC mains (AC mode), but the power supply 100 operating in the second state has an output voltage V established on the output capacitor C _{OUT OUT1 is} also passed to the notebook computer 50.

After the AC mains is energized for a period of time, all the capacitors in the power supply 100 including the first input capacitor C _IN1 , the second input capacitor C _IN2 and the output capacitor C _OUT will be in a fully charged and full energy state. At this time, the power supply 100 will operate in the third state. When the AC mains power is on, the power required for the operation of the notebook computer is provided by AC mains (AC mode), but the power supply 100 operating in the third state has an output voltage V _OUT1 established on the output capacitor C _OUT It will also be delivered to the laptop 50.

When the AC mains power is stopped, if the power supply 100 and the notebook computer 50 are still connected to each other through the connector PLUG and the socket JACK, the power required for the operation of the notebook computer 50 will be from the power supply 100 operating in the fourth state The output capacitance C _OUT and the equivalent input capacitance C _{SYS of the} notebook computer are provided (DC mode). Since the notebook computer 50 operating in DC mode does not draw load, the line loss voltage drop is 0 at this time, so the energy stored in the equivalent input capacitance C _{SYS of} the notebook computer 50 will be greater than the output of the power supply 100 The energy stored in the capacitor C _OUT , that is, the potential of the positive input terminal of the comparator CP will be higher than the potential of the negative input terminal, so the comparator CP will output the control signal GP3 of the enable potential to turn on the auxiliary switch Q3. At this time, the voltage V _DIV established on the resistor R2 will be induced to the primary winding NP3 through the secondary winding NS3, and then a control signal GD2 with a disabling potential is established to turn off the auxiliary switch Q2. In this state, the path of the second input capacitor C _IN2 is cut off by the auxiliary switch Q2, which reduces the energy on the primary side so that the output capacitor C _OUT on the secondary side will not be continuously powered, thus shortening the power supply The output capacitance of the device 100 is maintained for a time, so that the notebook computer 50 can smoothly enter the sleep state when operating in the DC mode.

In the embodiment of the present invention, by selecting the values of resistors R1 and R2, the number of turns of the secondary winding NS3 and the number of turns of the primary winding NP3, the voltage V _DIV can be induced to the primary winding through the secondary winding NS3 The control signal GD2 established by NP3 has a disabling potential for the auxiliary switch Q2.

FIG. 2 is an equivalent circuit diagram of the secondary side of the power supply 100 operating in the fourth state of the present invention. In addition to quickly stopping the power supply to the output capacitor C _OUT , the output capacitor C _OUT can be quickly discharged to the ground potential GND (as indicated by the arrow A1) through the resistors R1 and R2, and the equivalent input capacitor C _{SYS of the} notebook computer 50 It will also quickly discharge to the ground potential GND (as indicated by the arrow A2) through the line resistance R _{CABLE of the} power supply 100 and the resistances R1 and R2. Therefore, the maintenance time of the output capacitance of the power supply 100 can be shortened, and the notebook computer 50 can enter the sleep state smoothly when operating in DC mode.

In the present invention, the rated power of the power supply 100 can be 330W (19.5V/16.9A), the first input capacitor C _IN1 can be a 450V/33μF capacitor (error ±20%), and the second input capacitor C _IN2 can use a 450V/470μF capacitor (error ±20%). The output capacitor C _OUT can be made up of 7 25V/1000μF capacitors (error ±20%) in parallel. The value of resistance R1 can be 18.5. KΩ (error ±1%), the value of resistance R2 can be 1KΩ (error ±1%), the value of the wire impedance R _CABLE of the power supply 100 can be 300mΩ, and the value of the equivalent capacitance C _SYS of the notebook computer can be It is 10000μF (error ±20%). However, the implementation of the above elements does not limit the scope of the present invention.

In the embodiment of the present invention, the power switch Q1 and the auxiliary switches Q2~Q3 may be metal Metal-oxide-semiconductor field-effect transistor (MOSFET), bipolar junction transistor (BJT), or other devices with similar functions. For N-type transistors, the enabling potential is a high potential, and the disabling potential is a low potential; for P-type transistors, the enabling potential is a low potential, and the disabling potential is a high potential. However, the types of power switch Q1 and auxiliary switches Q2 to Q3 do not limit the scope of the present invention.

In summary, the power supply of the present invention can monitor the energization status of the AC mains, and when it is determined that the AC mains is stopped, it will quickly cut off the power supply path of the input capacitor C _IN to prevent the output capacitor C _OUT from being continuously charged. At the same time, when it is determined that the AC mains power is stopped, a fast discharge path will be provided for the output capacitor C _{OUT of the} power supply and the equivalent capacitor C _{SYS of the} notebook computer. Therefore, the present invention can shorten the maintenance time of the output capacitor of the power supply, so that the notebook computer can smoothly enter the sleep state when operating in the DC mode. The foregoing descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made in accordance with the scope of the patent application of the present invention shall fall within the scope of the present invention.

10: Transformer

20: Discharge control circuit

30: Pulse width modulation circuit

40: Detection circuit

50: laptop

100: power supply

Q1: Power switch

Q2, Q3: auxiliary switch

C _IN1 : the first input capacitor

C _IN2 : second input capacitor

C _OUT : output capacitance

C _SYS : The equivalent input capacitance of a notebook computer

D _O : output diode

D _I : Input diode

R1, R2: resistance

R _CABLE : line resistance

NP1~NP3: Primary side winding

NS1, NS3: secondary winding

N1, N2: Node

PLUG: Connector

JACK: socket

V _IN : Input voltage

V _OUT1 , V _OUT2 : output voltage

I _IN : Input current

I _OUT : output current

GD1~GD3: control signal

V _FB : Feedback voltage

GND: ground potential

P1~P2: Pin

Claims (10)

A power supply capable of shortening the maintenance time of the output capacitor, comprising: a first node (N1) and a second node (N2), wherein there is a wire resistance between the first node and the second node; a transformer, It includes a first primary side winding (NP1), a second primary side winding (NP2), a third primary side winding (NP3), a first secondary side winding (NS1) and a second secondary side winding (NS2), used to convert an input voltage supplied by a mains power supply into a first output voltage; a first input capacitor (C _IN1 ), coupled between the input voltage and a ground potential; an output capacitor (C _OUT ), coupled between the first node and the ground potential; a first switch (Q1), which includes; a first terminal, coupled to the first primary winding; a second terminal, coupled At the ground potential; and a control terminal for receiving a first control signal; and a discharge control circuit (20), including: a first resistor (R1) and a second resistor (R2), connected in series with the Between the first node and the ground potential; a second input capacitor (C _IN2 ), which includes: a first terminal coupled to the input voltage; and a second terminal; a second switch (Q2), which Including; a first terminal, coupled to the second terminal of the second input capacitor; a second terminal, coupled to the ground potential; and a control terminal, coupled to the third primary winding to receive a A second control signal; a comparator (CP), which includes; a positive input terminal, coupled to the second node to receive a second output voltage; a negative input terminal, coupled to the first node to receive the A first output voltage; and an output terminal for outputting a third control signal; and a third switch (Q3) including; a first terminal coupled between the first resistor and the second resistor ; A second terminal, coupled to the second secondary side winding; and a control terminal, coupled to the output terminal of the comparator to receive the third control signal. The power supply according to claim 1, further comprising: a detection circuit for providing a feedback voltage related to the first output voltage; and a pulse width modulation circuit for providing a feedback voltage according to the feedback The value of the grant voltage provides the first control signal. The power supply according to claim 1, further comprising: an input diode including: an anode coupled to the second primary winding; and a cathode coupled to the third primary winding And an output diode, which includes: an anode coupled to the first secondary side winding; and A cathode is coupled to the first node. The power supply of claim 1, wherein when the comparator determines that the mains has been removed according to the values of the first output voltage and the second output voltage, the discharge control circuit is used to cut off the second The power supply path of the input capacitor. The power supply of claim 4, wherein: when the value of the second output voltage is greater than the value of the first output voltage, the comparator is used to output the third control signal with a consistent energy potential to turn on the first Three switches; and the second secondary winding is used to induce the cross voltage of the second resistor to the third primary winding to provide the second control signal with a disabling potential, and then turn off the second switch to Cut off the power supply path of the second input capacitor. The power supply of claim 1, wherein when the comparator determines that the mains has been removed based on the values of the first output voltage and the second output voltage, the output capacitor passes through the first resistor and the second output voltage. The two resistors are discharged to the ground potential. The power supply according to claim 1, further comprising: a plug for connecting to a jack of a notebook computer. The power supply of claim 7, wherein when the comparator determines that the mains has been removed according to the values of the first output voltage and the second output voltage, an equivalent input capacitance of the notebook computer is determined according to The sequence discharges to the ground potential through the line resistance, the first resistance and the second resistance. The power supply according to claim 7, wherein the position of the second node is closer to the connector than the first node. The power supply of claim 1, wherein when the comparator determines that the mains is energized according to the values of the first output voltage and the second output voltage, the first primary winding is used to sense the input voltage To the first secondary side winding to provide the first output voltage on the first node, the first secondary side winding is used to induce the first output voltage to the second primary side winding, and the second The primary side winding is used to induce its induced voltage to the third primary side winding to provide the second control signal with a uniform energy potential, and then turn on the second switch.

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