TWI699539B - Io-pin abnormal detecting system and method thereof - Google Patents

Abstract

An IO-pin abnormal detecting system and method thereof are provided. The IO-pin abnormal detecting system includes a central control module, a power management module, a tested module, a switching control module, an abnormality detecting module and an output display module. The central control module generates a set value. The power management module generates a power-on signal corresponding a voltage slope based on the set value. The power management module includes a low-speed/high-speed power-on module and an ultra-high-speed power-on module. According to the voltage slope, the power management module selects the low-speed/high-speed power-on module or the ultra-high-speed power-on module to generate the power-on signal. A chip to be tested set on the tested module. The tested module is connected to the power management module and receives the power-on signal. The switching control module is connected to a plurality of pins of the chip to be tested, and the switching control module is connected to the central control module and receives the set value, and switches one of the pins to be tested based on the set value. The abnormality detecting module is connected to the tested module, and detects one of the pins and records an abnormal state, and generates abnormal state information corresponding to the abnormal state. The output display module is connected to the abnormality detecting module and receives and displays the abnormal state information.

Description

System and method for detecting abnormal output and input pins

The present invention relates to an abnormality detection system and method, in particular to an abnormality detection system and a method thereof, in particular to a selection of a low-speed/high-speed power-on module or an ultra-high-speed power-on module according to the voltage slope to generate a power-on signal, and to switch by a switching control module The output and input pin anomaly detection system for automatic detection of the tested pins.

Generally, when testing I/O pins, only Open/Short tests are performed, but when the chip is powered on, if any I/O pin is triggered by mistake, the potential will suddenly change from low. When it reaches high (tie high) or a situation similar to pulse high, it will affect the controlled device and cause malfunction (for example, the motor controlled by the chip suddenly moves), and this phenomenon is used as a general I/O pin Open During the /Short test, no problems will be found.

In addition, the power-on speed of the conventional chip is in the order of ms (milliseconds), but when the power-on speed is in the order of milliseconds, pulse high may sometimes be encountered during power-on in places with poor power quality, causing the controlled device to malfunction. .

Therefore, how to increase the power-on speed by orders of magnitude and automatically detect each pin will be one of the issues that the industry needs to improve.

In view of the above-mentioned conventional problems, the purpose of the present invention is to provide an output/input pin abnormality detection system to solve the problems faced by the conventional technology.

Based on the above objective, the present invention provides an output/input pin abnormality detection system, which includes a central control module, a power management module, a module to be tested, a switching control module, an abnormal detection module, and an output display module. The central control module generates the set value. The power management module is connected to the central control module and receives the set value, and generates the corresponding voltage slope upper electrical signal according to the set value. The power management module includes low-speed/high-speed power-on modules and ultra-high-speed power-on modules, and power management modules The group selects low-speed/high-speed power-on modules or ultra-high-speed power-on modules to generate power-on signals based on the voltage slope. The module to be tested is equipped with the chip to be tested, and the module to be tested is connected to the power management module and receives the power-on signal. The switch control module is connected to a plurality of pins of the chip to be tested, and the switch control module is connected to the central control module and receives the setting value, and switches one of the pins to be tested according to the setting value. The abnormal detection module is connected to the module to be tested, and detects one of the pins of the power-on signal and records the abnormal state, and generates abnormal state information corresponding to the abnormal state. The output display module is connected to the abnormal detection module and receives and displays abnormal status information.

Preferably, the ultra-high-speed power-on module may include a power supply, a signal generator, and a unity gain board. The power supply provides operating voltage to the unity gain board, and the signal generator transmits the power-on waveform to the unity gain board. Generate a power-on signal based on the power-on waveform.

Preferably, the module to be tested may include a processor and a control board, and the processor is connected to the control board.

Preferably, the abnormality detection module may include an oscilloscope and a temperature sensor. The oscilloscope generates a detection result corresponding to one of the pins under test, and the temperature sensor transmits temperature information to the oscilloscope.

Preferably, the setting value can include the time scale, voltage scale, time axis offset, trigger mode of the abnormal detection module, the total number of test pins of the switch control module, and the switch of test pins Meter, test pin switching sequence, scan mode, channel setting, voltage and current setting, feedback and gain setting, input signal for power management module.

Based on the above objective, the present invention provides a method for detecting abnormality of input and output pins, which is suitable for the detection system of abnormality of input and output pins. The detection system for abnormality of output and input pins includes a central control module, a power management module, a module to be tested, and a switching control. Module, anomaly detection module and output display module. The method for detecting abnormality of output and input pins includes the following steps: generate a set value; select the low-speed/high-speed power-on module or ultra-high-speed power-on module of the power management module according to the set value The module generates the upper electrical signal corresponding to the voltage slope; switches one of the pins of the chip under test set by the side module to be tested according to the set value; detects one of the pins that passed the electrical signal and records the abnormal condition. The abnormal state information is generated corresponding to the abnormal state and sent to the output display module for display.

Preferably, the ultra-high-speed power-on module may include a power supply, a signal generator, and a unity gain board. The method for detecting an abnormality in the output and input pins further includes the following steps: providing a working voltage to the unity gain board. Send the power-on waveform to the unity gain board. Generate a power-on signal based on the power-on waveform.

Preferably, the module to be tested may include a processor and a control board, and the processor is connected to the control board.

Preferably, the abnormality detection module may include an oscilloscope and a temperature sensor, and the output and input pin abnormality detection method further includes the following steps: generating a detection result corresponding to one of the tested pins. Send temperature information to the oscilloscope.

Preferably, the setting value includes the time scale, voltage scale, time axis offset, trigger mode for the abnormal detection module, the total number of test pins for the switching control module, the test pin switching table, Test pin switching sequence, scan mode, channel setting, voltage and current setting, feedback and gain setting, input signal of the power management module.

Based on the above, the output and input pin abnormality detection system and method of the present invention generate a power-on signal by the ultra-high-speed power-on module, and switch the tested pins by the switching control module for automatic detection, and then To achieve the purpose of ultra-high-speed power-on detection, and has the function of automatic power-on detection.

100: Output and input pin abnormal detection system

110: Central control module

120: Power Management Module

121: Low-speed/high-speed power-on module

122: Ultra-high-speed power-on module

123: power supply

124: Signal Generator

125: unity gain board

130: Module to be tested

131: Processor

132: Control Panel

140: Switch control module

150: Abnormal detection module

151: Oscilloscope

152: temperature sensor

160: output display module

S21 to S25: steps

Figure 1 is a block diagram of the output/input pin abnormality detection system of the present invention.

Figure 2 is a flow chart of the method for detecting abnormality of output and input pins of the present invention.

In order to understand the features, content and advantages of the present invention and its achievable effects, the present invention is combined with the figures and described in detail in the form of an embodiment as follows, and the figures used therein are just The schematic and auxiliary instructions are not necessarily the true proportions and precise configurations after the implementation of the present invention. Therefore, the proportions and configuration relationships of the attached drawings should not be interpreted as to limit the scope of rights of the present invention in actual implementation.

The advantages, features, and technical methods of the present invention will be described in more detail with reference to exemplary embodiments and the accompanying drawings to make it easier to understand, and the present invention may be implemented in different forms, so it should not be understood to be limited to these The stated embodiments, on the contrary, for those with ordinary knowledge in the technical field, the provided embodiments will make this disclosure more thorough, comprehensive and complete to convey the scope of the present invention, and the present invention will only be additional As defined by the scope of patent applications.

Please refer to Figure 1, which is a block diagram of the output/input pin abnormality detection system of the present invention. As shown in the figure, the output/input pin abnormality detection system 100 of the present invention includes a central control module 110, a power management module 120, a test module 130, a switching control module 140, an abnormal detection module 150, and an output Display module 160. The central control module 110 can be connected to the power management module 120, the switching control module 140, and the abnormal detection module 150, and generate and transmit corresponding setting values to the power management module 120, the switching control The control module 140 and the abnormality detection module 150, the power management module 120, the switching control module 140, and the abnormality detection module 150 can be initialized before power-on detection according to the set value. Of course, the above are only examples, and not limited thereto.

However, the power management module 120 is connected to the central control module 110 and receives the set value, and generates the corresponding voltage slope upper electrical signal according to the set value. The power management module 120 includes a low-speed/high-speed power-on module 121 and an ultra-high-speed power-on module. Module 122, the power management module 120 selects the low-speed/high-speed power-on module 121 or the ultra-high-speed power-on module 122 to generate a power-on signal according to the voltage slope. For example, if the slope of the voltage to be tested is lower than 20us/5v, the power management module 120 selects the low-speed/high-speed power-on module 121 to generate the power-on signal. If the slope of the voltage to be tested is higher than 20us/5v, it needs to be used The ultra-high-speed power-on module 122 generates a power-on signal. Of course, the above are only examples, and not limited thereto.

The module to be tested 130 is provided with a chip to be tested, the module to be tested 130 is connected to the power management module 120 and receives power-on signals; wherein the module to be tested 130 may include a processor 131 and a control board 132, and the processor 131 is connected to the control board 132.

The switching control module 140 is connected to a plurality of pins of the chip to be tested, and the switching control module 140 is connected to the central control module 110 and receives the setting value, and switches one of the pins to be tested according to the setting value. Generally, when testing the pins, a single pin test is used in conjunction with manual replacement. However, this method is too costly and time-consuming. The present invention can determine the switch slot to be used according to the number of different pins. If the number is 1~ 64, choose one set of switching slots, if the number is 65~128, choose two sets of switching slots, and so on, and then use the central control module to test a large number of pins without manually changing pins, and save A lot of manpower time to go. Of course, the above are only examples, and not limited thereto.

The abnormality detection module 150 is connected to the module under test 130, and detects one of the pins passing the power-on signal, records the abnormal state, and generates abnormal state information corresponding to the abnormal state. Output display module connection End the abnormal detection module and receive and display abnormal status information. When the power management module 120 selects the low-speed/high-speed power-on module 121 or the ultra-high-speed power-on module 122 to generate the power-on signal, and the switch control module 140 determines the number of pins to be tested, it starts abnormal detection The module 150 detects abnormalities in a polling mode. Among them, during the detection process, a single pin can be detected from 0~5v. After detection, the switch control module 140 switches to the next pin to continue the detection from 0~5v; on the other hand, After detecting all the pins with one voltage, you can change the voltage to detect all the pins. Of course, the above are only examples, and not limited thereto.

However, the ultra-high-speed power-on module 122 may include a power supply 123, a signal generator 124, and a unity gain board 125. The power supply 123 provides a working voltage of plus or minus 12v to the unity gain board 125, and the signal generator 124 transmits power-on waveforms. (That is, the fast power-on waveform) to the unity gain board 125, and the unity gain board 125 generates a power-on signal according to the power-on waveform. However, the reason why the power-on waveform generated by the signal generator 124 is not directly used for the module under test 130 is because the current of the power-on waveform generated by the signal generator 124 is very small, and the module under test 130 cannot be pushed. The unity gain board 125 (having an operational amplifier) amplifies the current so that the module under test 130 can receive enough current to test power-on. Among them, the unity gain board 125 is installed with a negative feedback connection method. Of course, the above are only examples, and not limited thereto.

However, the abnormality detection module 150 may include an oscilloscope 151 and a temperature sensor 152. The oscilloscope 151 generates a detection result corresponding to one of the pins under test, and the temperature sensor 152 transmits temperature information to the oscilloscope 151. Among them, the trigger condition set by the central control module is used as the level of abnormality detection. When the waveform of the oscilloscope 151 exceeds the set level (or other special conditions), the abnormality detection module 150 records all the current Status, including voltage slope, temperature, pin number, time (month/data/hour/minute/second) and current waveform picture. The waveform data includes VDD, LDO, and IO-Pin levels. All data will be stored in the specified location and Display abnormal waveforms in the output display module 160, The test can be continued, and if an exception occurs again, new error data can be recorded again until the test is completed.

Preferably, the setting value may include:

(1) Give abnormal detection module:

Time scale: The scale setting of the horizontal (time) axis in the oscilloscope, such as 20us per grid.

Voltage scale (amplitude): The scale setting of the vertical (voltage) axis in the oscilloscope, such as one grid 1v.

Time axis offset (position): When the offset is equal to zero, the waveform will be displayed at the center of the oscilloscope after triggering.

Trigger mode (trigger mode): Generally there will be a single trigger, multiple triggers, and continuous triggers.

(2) Give the switching control module:

The total number of test pins (total pin set): if set to 64 or 128.

Test pin switch list (switch list): Here you can name the test pins, such as PA0, PA1, PA2...

Test pin switching sequence (switch sequence): Here you can set the pre-switch sequence, such as ch0->ch1->ch2 or ch0->ch10->ch15...

Scan mode: Like the oscilloscope trigger mode, there are single scan or continuous scan.

(3) Give the power management module:

Channel select: Generally, the power supply has 1~4 output channels, and you need to set the output voltage of the channel to use.

Voltage/current set: Set output voltage such as 0~5v or 0~3.3v and current limit to prevent chip burn.

Feedback/gain set: The current default is to use 1x negative feedback mode. Changing different gains can change the rated output current of the operational amplifier.

Input signal: Use a signal generator to create waveforms with different slopes (such as triangular waves) and then pass through a unity gain board (with an operational amplifier) to generate a powerful power-on waveform.

Although the foregoing description of the output and input pin abnormality detection system of the present invention has also explained the concept of the output and input pin abnormality detection method of the present invention, for the sake of clarity, a flowchart is shown below in detail. .

Please refer to Fig. 2, which is a flowchart of the method for detecting abnormality of the output and input pins of the present invention. As shown in the figure, the output and input pin abnormality detection method of the present invention is applicable to the above-mentioned output and input pin abnormality detection system. The output and input pin abnormality detection system includes a central control module, a power management module, a module to be tested, and a switch The control module, the abnormal detection module and the output display module, the output and input pin abnormal detection method includes the following steps:

In step S21: a set value is generated.

In step S22: select a low-speed/high-speed power-on module or an ultra-high-speed power-on module of the power management module according to the set value to generate an electrical signal corresponding to the voltage gradient.

In step S23: switch one of the pins of the chip under test set by the side module to be tested according to the set value.

In step S24: detect one of the pins passing the power-on signal and record the abnormal condition.

In step S25: the abnormal state information is generated corresponding to the abnormal state and transmitted to the output display module for display.

However, the ultra-high-speed power-on module may include a power supply, a signal generator, and a unity gain board, and the output and input pin abnormality detection method further includes the following steps: providing a working voltage to the unity gain board.

Send the power-on waveform to the unity gain board.

Generate a power-on signal based on the power-on waveform.

However, the module to be tested may include a processor and a control board, and the processor is connected to the control board.

Furthermore, the abnormality detection module may include an oscilloscope and a temperature sensor, and the output and input pin abnormality detection method further includes the following steps: generating a detection result corresponding to one of the tested pins.

Send temperature information to the oscilloscope.

As a supplement, the setting value can include the time scale, voltage scale, time axis offset, trigger mode for the abnormal detection module, the total number of test pins for the switching control module, test pin switching table, Test pin switching sequence, scan mode, channel setting, voltage and current setting, feedback and gain setting, input signal of the power management module. The detailed description has been described in the foregoing description of the output/input pin abnormality detection system of the present invention, and will not be repeated here for the sake of brief description.

Based on the above, the output and input pin abnormality detection system and method of the present invention generate a power-on signal by the ultra-high-speed power-on module, and switch the tested pins by the switching control module for automatic detection, and then To achieve the purpose of ultra-high-speed power-on detection, and has the function of automatic power-on detection.

The above-mentioned embodiments are only to illustrate the technical ideas and features of the present invention, and their purpose is to enable those who are familiar with the art to understand the content of the present invention and implement them accordingly. The patent scope of the present invention, that is, all equal changes or modifications made in accordance with the spirit of the present invention, should still be covered by the patent scope of the present invention.

100: Output and input pin abnormal detection system

110: Central control module

120: Power Management Module

121: Low-speed/high-speed power-on module

122: Ultra-high-speed power-on module

123: power supply

124: Signal Generator

125: unity gain board

130: Module to be tested

131: Processor

132: Control Panel

140: Switch control module

150: Abnormal detection module

151: Oscilloscope

152: temperature sensor

160: output display module

Claims (8)

An output and input pin abnormality detection system includes: a central control module, which generates a set value; a power management module, which is connected to the central control module and receives the set value, and generates a correspondence based on the set value A power-on signal with a voltage slope. The power management module includes a low-speed/high-speed power-on module and an ultra-high-speed power-on module. The power management module selects the low-speed/high-speed power-on according to the voltage slope The module or the ultra-high-speed power-on module generates the power-on signal; a module to be tested is equipped with a chip to be tested, and the module to be tested is connected to the power management module and receives the power-on signal; a switch The control module is connected to a plurality of pins of the chip to be tested, and the switching control module is connected to the central control module and receives the setting value, and switches one of the pins to be tested according to the setting value; an abnormality detection The module is connected to the module under test, detects one of the pins passing the power-on signal, records an abnormal condition, and generates an abnormal state information corresponding to the abnormal state; and an output display module is connected to the The abnormal detection module receives and displays the abnormal status information; the ultra-high-speed power-on module includes a power supply, a signal generator and a unity gain board, and the power supply provides a working voltage to the unit A gain board, the signal generator transmits a power-on waveform to the unity gain board, and the unity gain board generates the power-on signal according to the power-on waveform. The output/input pin abnormality detection system according to claim 1, wherein the module to be tested includes a processor and a control board, and the processor is connected to the control board. The output/input pin abnormality detection system according to claim 1, wherein the abnormality detection module includes an oscilloscope and a temperature sensor, and the oscilloscope generates a detection result corresponding to one of the pins under test, The temperature sensor transmits a temperature information to the oscilloscope. The output/input pin abnormality detection system described in claim 1, wherein the setting value includes the time scale, voltage scale, time axis offset, and trigger mode of the abnormal detection module for the switching control module The total number of test pins, test pin switching table, test pin switching sequence, and scan mode are assigned to the power management module's channel settings, voltage and current settings, feedback and gain settings, and input signals. An output and input pin abnormality detection method is suitable for an output and input pin abnormality detection system. The output and input pin abnormality detection system includes a central control module, a power management module, a module to be tested, and a switching control module. Group, an abnormality detection module and an output display module. The method for detecting abnormality of the output and input pins includes the following steps: generating a setting value; selecting one of the power management modules for low-speed/high-speed power-on according to the setting value A module or an ultra-high-speed power-on module generates a power-on signal corresponding to a voltage slope. The ultra-high-speed power-on module includes a power supply, a signal generator, and a unity gain board. The output and input The method for detecting abnormal pins further includes the following steps: providing a working voltage to the unity gain board; transmitting a power-on waveform to the unity gain board; and Generate the power-on signal according to the power-on waveform; switch one of the pins of a chip under test set by the side module to be tested according to the setting value; detect one of the pins that pass the power-on signal and record an abnormality Status; and corresponding to the abnormal state, an abnormal state information is generated and sent to the output display module for display. The output/input pin abnormality detection method according to claim 6, wherein the module to be tested includes a processor and a control board, and the processor is connected to the control board. The output/input pin abnormality detection method according to claim 6, wherein the abnormality detection module includes an oscilloscope and a temperature sensor, and the output/input pin abnormality detection method further includes the following steps: corresponding to the tested One of the pins generates a detection result; and sends a temperature information to the oscilloscope. The output/input pin abnormality detection method described in claim 6, wherein the setting value includes the time scale, voltage scale, time axis offset, and trigger mode of the abnormal detection module, and is provided to the switching control module The total number of test pins, test pin switching table, test pin switching sequence, and scan mode are assigned to the power management module's channel settings, voltage and current settings, feedback and gain settings, and input signals.

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