TWI647830B - Image sensor package and method for manufacturing the same - Google Patents

Abstract

The present invention is an image sensor package and a method of manufacturing the same, the image sensor package system comprising a plurality of image sensing wafers, a plurality of cymbals extending through the back surface of the image sensing wafers and electrically connected to the external pads thereof a perforation, a plurality of spacers disposed around the image sensing wafers, a transparent cover plate covering the spacers, and a plurality of rewiring covering the back surface of the image sensing wafer and the bottom surface of the spacer a layer, an insulating layer covering the redistribution layers, and a plurality of metal pillars penetrating and exposed to the insulating layer; wherein each of the redistribution layers is electrically connected to the turns of the back surface of the image sensing wafer; The metal posts can be electrically connected to the external pads of the image sensing wafers through the redistribution layers and the via holes to achieve miniaturization, thin thickness, fine pitch of the pins, and high pin density. advantage.

Description

Image sensor package and method of manufacturing same

The invention relates to an image sensor package and a manufacturing method thereof, in particular to a manufacturing method for packaging a plurality of image sensing chips in a package and the package structure.

FIG. 17 shows an image sensor package of the prior art, which includes a single image sensing chip 90, and an active surface of the image sensing chip 90 is provided with an image sensing area 91 and an electrode end 92. The through-hole (TSV; Through-Silicon Via) 93 and the required integrated circuit are connected to the bore perforation 93 by the electrode end 92, and the solder ball 94 is placed in a ball-forming manner to connect with the bore perforation 93. The solder ball 94 is electrically connected to the external substrate to provide power and transmit image sensing signals. However, the solder balls 94 have a certain size, and the solder balls 94 also have a certain ball pitch to avoid short circuits, thereby limiting the number of pins (I/O) that can be configured by the image sensor. That is, the number of solder balls is limited. Therefore, the prior art image sensor package is disadvantageous for increasing the number of I/Os of the image sensor.

Moreover, in the current trend, it is preferred to simultaneously provide a plurality of image sensing chips on a single electronic device to increase the image sensing function, and in the prior art image sensor package, each package body There is only a single image sensing chip in the middle, so it is necessary to combine a plurality of prior art image sensing packages to achieve the desired function, and not only the wiring of the external substrate must be combined with a plurality of prior art image sensing packages. The circuit also increases the occupied volume, which is not conducive to the current thinning and thinning of the electronic device.

In view of this, the present invention is developed for the disadvantages of the prior art which are disadvantageous for increasing the number of pins and simultaneously using a plurality of image sensing wafers.

In order to achieve the object of the present invention, the technical means adopted by the present invention is to create an image sensor package comprising: a plurality of image sensing wafers, each of the image sensing wafers comprising an active surface and a back surface; a plurality of cymbal perforations; wherein the active bread comprises an image sensing area and a plurality of external pads located at the periphery of the image sensing area, each of the cymbal perforations corresponding to one of the external pads, and the corresponding external pad Electrically connecting; a plurality of spacers are respectively disposed on the periphery of the image sensing wafers, wherein the spacers between the adjacent two image sensing wafers are at least partially located in the adjacent two images Sensing between the perforations of the wafer; a transparent cover covering the top surface of the spacers and maintaining a distance from the image sensing area of each of the image sensing wafers; a plurality of redistribution layers Forming on the back surface of the image sensing wafer and the bottom surface of the spacer, each of the redistribution layers corresponding to one of the image sensing wafers and corresponding to each of the corresponding sensing holes of the image sensing wafer Electrical connection , Based redistribution layer covering the plurality; and a plurality of metal pillars, based throughout and exposed from the insulating layer, and each connected to the metal post electrically redistribution layer corresponds.

As can be seen from the above description, the image sensor package of the present invention integrates a plurality of image sensing wafers into a single package by a boring process and a rewiring layer process to achieve miniaturization, thinness, and pin. The advantages of fine pitch and high pin density, and the size or function of the plurality of image sensing wafers in the image sensor package may be the same or different.

In order to achieve another object of the present invention, the technical means adopted by the present invention is a method for manufacturing an image sensor package, which comprises the steps of: (a) providing a carrier; and (b) providing a carrier. Temporarily fixing a plurality of spaced-apart image sensing wafers and a plurality of spacers respectively formed on the periphery of the image sensing wafers; wherein each of the image sensing wafers includes an active surface and a back surface, The active bread comprises an image sensing area and a plurality of external pads positioned on the periphery of the image sensing area; (c) fixing a first surface plate of a transparent cover plate to the top surface of the spacers; (d) Removing the carrier to expose the back surface of the image sensing wafer and the bottom surface of the spacer; (e) facing the second surface of the transparent cover and temporarily fixing it to a transfer carrier; (f) Forming a plurality of cymbal perforations on the back surface of the image sensing wafers, each of the cymbal perforations corresponding to one of the external pads, and electrically connected to the corresponding external pads; (g) simultaneously forming a plurality of redistribution layers The image sensing the back side of the wafer and the bottom surface of the spacer, each of the rewiring Corresponding to one of the image sensing wafers and electrically connected to the corresponding ones of the corresponding image sensing wafers; (h) covering an insulating layer on the redistribution layers, and making the weights a portion of the wiring layer is exposed; (i) forming a plurality of metal pillars respectively formed on exposed portions of the redistribution layers; (j) removing the transfer carrier and placing the plurality of metal pillars downward And adhering to a tape; and (k) cutting a plurality of image sensor packages; wherein each of the image sensor package systems comprises a plurality of image sensing wafers.

As can be seen from the above description, the method for manufacturing the image sensor package of the present invention is to form a transparent perforated cover on the front surface of the plurality of image sensing wafers, and then form a through hole on the back surface of the back surface and connected to the front external pad. Therefore, the re-wiring layer formed later can be electrically connected, and the plurality of image sensing wafers can be integrated into a single package without using a pre-formed substrate to achieve a small size. The size, thickness, and fine pin density of the pin sensor package may be the same or different.

1‧‧‧Image sensor package

10‧‧‧Image sensing chip

101‧‧‧Active surface

102‧‧‧Back

11‧‧‧Image Sensing Area

12‧‧‧External mat

13‧‧‧矽 piercing

20‧‧‧ spacers

201‧‧‧ top surface

202‧‧‧ bottom

21‧‧‧liquid glue

30‧‧‧Transparent cover

31‧‧‧ first surface

32‧‧‧second surface

40‧‧‧Rewiring layer

50‧‧‧Insulation

60‧‧‧ metal column

70‧‧‧ Carrier Board

71‧‧‧Adhesive layer

72‧‧‧wall

73‧‧‧Transfer carrier board

74‧‧‧Adhesive layer

80‧‧‧ Tape

90‧‧‧Image sensing chip

91‧‧‧Image Sensing Area

92‧‧‧electrode end

93‧‧‧矽 piercing

94‧‧‧ solder balls

Figure 1 is a cross-sectional view of an image sensor package of the present invention.

2 to FIG. 16 are cross-sectional views of the image sensor package of the present invention in various process steps.

Figure 17 is a cross-sectional view of a prior art image sensor package.

The technical means adopted by the present invention for achieving the intended purpose of the invention are further illustrated in the following description of the embodiments of the invention, wherein the drawings have been simplified for illustrative purposes only, and by describing between the elements and components of the invention The relationship is to illustrate the structure or method invention of the present invention, and therefore, the elements shown in the drawings are not presented in actual number, actual shape, actual size, and actual scale, and the size or size ratio has been enlarged or simplified, thereby providing better Note that the actual quantity, actual shape, or actual size ratio has been selectively designed and configured, and the detailed component layout may be more complicated.

Referring to FIG. 1 , the image sensor package 1 of the present invention comprises a plurality of image sensing wafers 10 , a plurality of spacers 20 , a transparent cover plate 30 , and a plurality of redistribution layers (RDL, redistribution layer). 40, an insulating layer 50, and a plurality of metal pillars 60.

The image sensing wafers 10 are disposed at intervals. Each of the image sensing wafers 10 includes an active side 101, a back side 102, an image sensing area 11, a plurality of external pads 12, and a plurality of The back surface 102 is opposite to the active surface 101, and the image sensing area 11 and the external pad 12 are disposed on the active surface 101, and each of the through holes 13 is formed by a through hole (TSV) (Through-Silicon Via). Corresponding to the external pad 12 is electrically connected to one of the external pads 12 . Each image sensing wafer 10 can be an image sensing wafer of the same size or different size, the same function, or a different function.

The plurality of spacers 20 are disposed on the periphery of each of the image sensing wafers 10 to separate the image sensing wafers 10 and surround the image sensing wafers 10 therein. In the embodiment, the spacers 20 are further inwardly disposed. The outer pad 12 covering the periphery of the active surface 101 of the image sensing chip 10 is extended, so that the top surface 201 protrudes from the image sensing area 11. In one embodiment, the spacers 20 between the adjacent two image sensing wafers 10 are at least partially located between the turns 13 of the adjacent two image sensing wafers 10.

The transparent cover 30 covers the top surface 201 of the spacers 20 and is oppositely disposed on each of the image sensing regions 11 to seal the image sensing regions 11 to the transparent cover 30 and the spacers. Between pieces 20. In this embodiment, the transparent cover 30 can be a glass plate.

The redistribution layer 40 is simultaneously formed on the back surface 102 of the image sensing wafer 10 and the bottom surface 202 of the spacer 20 to be coplanar, and is electrically connected to the through hole 13 to transmit the corresponding image. The turns 13 of the sensing wafer 10 are electrically connected to the external pads 12 .

The foregoing insulating layer 50 covers the redistribution layers 40.

The metal pillars 60 are penetrated and exposed to the insulating layer 50, and the metal pillars 60 are electrically connected to the corresponding redistribution layer 40. In an embodiment, the insulating layer 50 is a passivation layer. The metal post 60 is a copper post, but is not limited thereto.

The above is the structure of the image sensor package 1 of the present invention. The method for manufacturing the image sensor package 1 will be further described below, that is, as shown in FIG. 2 to FIG. 16 , and includes the following steps (a) to (k): In the step (a) shown in FIGS. 2 and 3, a carrier 70 is provided, and an adhesive layer 71 is formed on the carrier 70.

As shown in FIG. 4 and FIG. 5, the adhesive layer 71 on the carrier 70 temporarily adheres to the plurality of spaced-apart image sensing wafers 10, and forms a bank at the periphery of the adhesive layer 71. 72; as shown in FIG. 6, a liquid glue 21 is injected into the bank wall and covers the image sensing wafers 10. Next, as shown in FIG. 7, after the liquid glue 21 is solidified, it is covered again. The image sensing area 11 of the image sensing chip 10 is partially removed, so that the image sensing area 11 is exposed, and the unremoved portion is the spacer 20 of the periphery of each of the image sensing wafers 10.

As shown in FIG. 8 , a first surface 31 of a transparent cover 30 is fixed to the top surface 201 of the spacers 20 and the image sensing area of each of the image sensing wafers 10 . 11 keep a certain distance.

As shown in FIG. 9 and FIG. 10, the bank 72 and the carrier 70 are sequentially removed to expose the back surface 102 of the image sensing wafer 10 and the bottom surface 202 of the spacers 20.

As shown in step (e) of FIG. 11, the second surface 32 of the transparent cover 30 is downwardly fixed and temporarily fixed to a transfer carrier 73. In this embodiment, the transparent cover 30 is second. The surface 32 is adhered to the transfer carrier 73 through an adhesive layer 74.

As shown in step (f) of FIG. 12, a plurality of turns 13 are formed on the back surface 102 of the image sensing wafer 10. Each of the turns 13 corresponds to one of the external pads 12, and corresponds to the external connection. The pad 12 is electrically connected; wherein the process of the ruthenium perforation 13 includes Via etching, forming an oxide layer (such as a ruthenium dioxide layer; SiO2), forming a diffusion barrier layer, and forming a seed layer. (Seed Layer) and electroplating copper (Cu) and other steps.

As shown in step (g) of FIG. 13, a plurality of redistribution layers 40 are simultaneously formed on the back surface 102 of the image sensing wafers 10 and the bottom surface 202 of the spacers 20, and each of the redistribution layers 40 corresponds to one of them. The image sensing chip 10 is electrically connected to the corresponding through hole 13 of the image sensing die 10; thus, each of the redistribution layer 40 can pass through the corresponding through hole of the image sensing wafer 10. 13 is electrically connected to the external pad 12.

As shown in step (h) of FIG. 14, an insulating layer 50 is overlaid on the redistribution layers 40, and portions of the redistribution layers 40 are exposed; in this embodiment, each of the redistribution layers 40 is Partially exposed, and the exposed portions are the external pin positions of the image sensor package 1 shown in FIG.

As shown in step (i) of FIG. 14, a plurality of metal pillars 60 are formed, which are respectively formed on the exposed portions of the redistribution layers 40. In this embodiment, the metal pillars 60 are formed in the Each of the exposed portions of the redistribution layer 40; wherein the metal pillars 60 are formed by a Cu-Pillar process.

As shown in step (j) of FIG. 15, the transfer carrier 73 is removed and the plurality of metal posts 60 are directed downward and adhered to a tape 80.

As shown in step (k) of FIG. 16, a plurality of image sensor packages 1 are cut out; wherein each of the image sensors 1 includes at least two image sensing wafers 10, and thus a large amount of image sense can be produced. Detector package 1.

In summary, the present invention can integrate image sensing wafers of the same or different sizes, functions, or different into a single image sensor package, especially in combination with a boring process, a rewiring layer process, and a metal pillar-to-substrate connection. The package size can be miniaturized, the size is thinned, the pitch of the pins is fine, and the height of the pins is high.

The above is only the embodiment of the present invention, and is not intended to limit the scope of the present invention. The present invention has been disclosed by the embodiments, but is not intended to limit the invention, and any one of ordinary skill in the art, In the scope of the technical solutions of the present invention, equivalent modifications may be made to the equivalents of the embodiments of the present invention without departing from the technical scope of the present invention. Any simple modifications, equivalent changes and modifications made to the above embodiments are still within the scope of the technical solutions of the present invention.

Claims (10)

An image sensor package includes: a plurality of image sensing wafers, each of the image sensing wafers including an active surface, a back surface, and a plurality of pupil perforations; wherein the active bread comprises an image sensing area and a plurality of bits Each of the external pads of the periphery of the image sensing area corresponds to one of the external pads, and is electrically connected to the corresponding external pad; a plurality of spacers are respectively disposed on the image sensing chips Surrounding, wherein the spacer between the adjacent two image sensing wafers is at least partially located between the adjacent two image sensing wafers; a transparent cover is attached to The top surface of the spacers is kept at a distance from the image sensing area of each of the image sensing wafers; a plurality of redistribution layers are formed on the back surface of the image sensing wafers and the bottom surface of the spacers, Each of the redistribution layers corresponds to one of the image sensing wafers and is electrically connected to each of the corresponding vias of the image sensing wafer; an insulating layer covering the redistribution layers; and a plurality of a metal column that runs through and is exposed to the Edge layer, and each connected to the metal post electrically redistribution layer corresponds. The image sensor package of claim 1, wherein the spacer further extends inwardly to cover an outer pad on the active surface, and a top surface of the spacer is convex from the active surface. The image sensor package of claim 1 or 2, wherein the size of the image sensing wafers is different. The image sensor package of claim 1 or 2, wherein the functions of the image sensing wafers are different. The image sensor package of claim 1 or 2, wherein each of the metal pillars is a copper pillar. The image sensor package of claim 1 or 2, wherein the insulating layer is a passivation protective layer. The image sensor package of claim 1 or 2, wherein the transparent cover is a glass plate. A method for manufacturing an image sensor package includes the steps of: (a) providing a carrier board; (b) temporarily fixing a plurality of spaced-apart image sensing wafers and a plurality of spacers on the carrier board, The spacers are respectively formed on the periphery of the image sensing wafers; wherein each of the image sensing wafers comprises an active surface and a back surface, the active bread comprises an image sensing area and a plurality of positions on the periphery of the image sensing area An external pad; (c) fixing a first surface plate of a transparent cover to the top surface of the spacer; (d) removing the carrier to make the back of the image sensing wafer and the spacer thereof The bottom surface is exposed; (e) the second surface of the transparent cover is facing downward and temporarily fixed to a transfer carrier; (f) forming a plurality of pupil perforations on the back surface of the image sensing wafers, each of the perforations Corresponding to one of the external pads, and electrically connected to the corresponding external pad; (g) simultaneously forming a plurality of redistribution layers on the back surface of the image sensing wafer and the bottom surface of the spacer, each of the rewiring The layer corresponds to one of the image sensing wafers and corresponds to the image sensing Each of the turns of the sheet is electrically connected; (h) an insulating layer is overlaid on the redistribution layers, and portions of the redistribution layers are exposed; (i) a plurality of metal pillars are formed, the metal pillars Forming exposed portions of the redistribution layers respectively; (j) removing the transfer carrier and placing the plurality of metal pillars downward and adhering to a tape; and (k) cutting a plurality of image sensors a package; each of the image sensor package systems includes a plurality of image sensing wafers. The method of manufacturing an image sensor package according to claim 8, wherein: the carrier layer of the step (a) forms an adhesive layer; The above step (b) comprises the steps of: (b1) forming a bank at the periphery of the adhesive layer; (b2) injecting a liquid glue into the wall and covering the image sensing wafers; and (b3) waiting for the After the liquid glue is solidified, the portions of the image sensing area of the image sensing chip are removed, so that the image sensing areas are exposed, and the unremoved portions are the spacers of the periphery of the image sensing chips. And forming another adhesive layer on the transfer carrier of the above step (e) to temporarily fix the transparent cover. The method of manufacturing an image sensor package according to claim 8 or 9, wherein in the step (i), a copper bump is formed on the exposed portion of the redistribution layer using a copper bump process.