TWI647798B - Electronic package and its manufacturing method - Google Patents

Abstract

An electronic package includes: a first circuit structure; an electronic component and a conductive pillar provided on the first circuit structure; a conductor provided on the electronic component; and a package covering the electronic component, the conductor and the conductive pillar A cladding layer; and a second circuit structure formed on the cladding layer to protrude the protective film on the electronic component through the conductor, thereby increasing the tolerance range of the grinding process and reducing the cost. The invention further provides a method for manufacturing the electronic package.

Description

   Electronic package and manufacturing method thereof   

The invention relates to a semiconductor packaging technology, in particular to a stacked electronic package and a method for manufacturing the same.

With the evolution of semiconductor packaging technology, semiconductor devices have developed different packaging types. In order to improve electrical functions and save packaging space, different three-dimensional packaging technologies have been developed, such as fan-out packaging stacking. (Fan Out Package on package, referred to as FO PoP), etc., in order to match the greatly increased number of input / output ports on various chips, and then integrate the integrated circuits of different functions into a single package structure. This packaging method can take advantage of system packaging ( SiP) Heterogeneous integration features can integrate electronic components with different functions, such as memory, central processing unit, graphics processor, image application processor, etc. through stack design to achieve system integration, suitable for light and thin electronic products.

FIG. 1 is a schematic cross-sectional view of a conventional semiconductor package 1 for PoP. As shown in FIG. 1, the semiconductor package 1 includes a packaging substrate 10 having at least one circuit layer 101 and a semiconductor element 11 coupled to the circuit layer 101.

Specifically, the semiconductor element 11 has an opposite active surface 11a and a non-active surface 11b. The active surface 11a has a plurality of electrode pads 110, and there are solder bumps 12, a passivation layer 120, and the protective film 111. The bumps 12 protrude from the passivation layer 120, the protective film 111 covers the solder bumps 12, and the non-active surface 11 b is disposed on the packaging substrate 10 through an adhesive layer 13.

Furthermore, a packaging gel 15 is formed on the packaging substrate 10 to cover the protective film 111 and the semiconductor element 11, and a plurality of conductive vias 14 are formed in the packaging gel 15 so that the conductive vias 14 The end surface is exposed from the packaging gel 15 for subsequent bonding of an electronic device such as a semiconductor chip, a silicon interposer, or a packaging structure by a solder ball (not shown).

In addition, by a leveling process (such as the entire plane Y in FIG. 1), a part of the encapsulant 15, the conductive vias 14, the solder bump 12 and the protective film 111 are removed, so that the solder bump 12 and the protective film 111 The protective film 111 is exposed from the packaging gel 15 for subsequent electrical connection to the solder bump 12 through a circuit (not shown).

However, in the conventional manufacturing method of the semiconductor package 1, the protective film 111 covers the solder bumps 12, so during the leveling process, in addition to grinding the packaging gel 15, a part of the material of the protective film 111 needs to be polished to expose The solder bumps 12 increase the polishing interface, which causes problems such as over-grinding and poor workability.

Furthermore, in the conventional semiconductor package 1, the exposed end surface of the conductive via 14 is used as the external connection point. Therefore, when the number of external connection points needs to be increased, the distance between the conductive vias 14 needs to be reduced. Bridges are easily generated between solder balls on the end surfaces of the conductive vias 14.

Therefore, how to overcome the various shortcomings of the conventional technology is really a technical problem that various circles are desperately trying to solve.

In view of the lack of the conventional technology, the present invention provides an electronic package including: a first circuit structure having a first side and a second side opposite to each other, and an electrical connection is formed on the first side. The conductive pillar of the circuit structure; the electronic component is provided on the first side of the first circuit structure, and the electronic component is coupled to and electrically connected to a plurality of conductive bodies; the cladding layer is formed on the first circuit structure On the first side, the cover layer covers the electronic component, the conductor, and the conductive post, and the end surface of the conductor and the end of the conductive post are exposed to the cover layer; and the second circuit The structure is formed on the cladding layer and is electrically connected to an end surface of the conductive pillar and an end surface of the conductive body.

The invention further provides a method for manufacturing an electronic package, which includes: providing a first circuit structure, the first circuit structure having a first side and a second side opposite to each other; and electrically connecting the first side to the first side. The conductive pillar of the circuit structure is provided with an electronic component on the first side, wherein the electronic component is connected with and electrically connected to a plurality of conductive bodies; a covering layer is formed on the first side of the first circuit structure, and Making the covering layer cover the electronic component, the conductor and the conductive pillar, and exposing the end surface of the conductor and the end surface of the conductive pillar to the covering layer; and forming a second circuit structure on the covering layer And the second circuit structure is electrically connected to an end surface of the conductive pillar and an end surface of the conductive body.

In the aforementioned electronic package and its manufacturing method, the electronic component has a protective film, and the conductive body protrudes from the protective film.

In the aforementioned electronic package and its manufacturing method, the electronic component has opposite active surfaces and non-active surfaces, and the active surfaces are combined and electrically connected to the electrical conductors.

In the aforementioned electronic package and its manufacturing method, the electronic component has a circuit layer to combine and electrically connect the conductive bodies.

In the aforementioned electronic package and its manufacturing method, the surface of the cladding layer is flush with the end surface of the conductive pillar.

In the aforementioned electronic package and its manufacturing method, the surface of the cladding layer is flush with the end surface of the electrical conductor.

In the aforementioned electronic package and its manufacturing method, the method further includes forming a plurality of conductive elements on the second side of the first circuit structure.

In the aforementioned electronic package and its manufacturing method, the method further includes forming a plurality of conductive elements on the second circuit structure.

It can be known from the above that the electronic package and its manufacturing method of the present invention mainly protrude the protective film through the conductive body, so as to increase the tolerance range of the polishing process and reduce the cost.

Furthermore, by using the contact pads of the first and second circuit structures as external points, it is beneficial to control the distance between the contact pads to meet the requirements of fine pitch, and to avoid bridging between the conductive elements. .

In addition, by forming the first and second circuit structures above and below the electronic component without using a conventional packaging substrate, the thickness of the electronic package can be reduced and the production cost can be reduced.

1‧‧‧ semiconductor package

10‧‧‧ package substrate

101, 31‧‧‧ Line layer

11‧‧‧Semiconductor

11a, 21a‧‧‧ surface

11b, 21b ‧‧‧ non-active surface

110,210‧‧‧electrode pads

111,211‧‧‧protective film

12‧‧‧solder bump

120‧‧‧ passivation layer

13‧‧‧ Adhesive layer

14‧‧‧ conductive via

15‧‧‧ encapsulated colloid

2‧‧‧electronic package

20‧‧‧First Line Structure

20a‧‧‧first side

20b‧‧‧Second side

200‧‧‧First insulation layer

201‧‧‧ Redistribution layer of the first line

21‧‧‧Electronic components

22‧‧‧Conductor

23‧‧‧ conductive post

24,91‧‧‧Combination layer

25‧‧‧ cladding

26‧‧‧Second Line Structure

260,260’‧Second insulation layer

261,261’‧‧‧‧ Redistribution layer of the second line

27, 29‧‧‧ conductive elements

270‧‧‧ metal layer under the bump

28‧‧‧Insulation protective layer

30‧‧‧ Insulation

4‧‧‧ semiconductor wafer

9‧‧‧ bearing plate

90‧‧‧ release layer

Figure 1 is a schematic cross-sectional view of a conventional semiconductor package; and Figures 2A to 2D are schematic cross-sectional views of an electronic package and a method for manufacturing the same according to the present invention, wherein Figure 2D 'is another implementation of Figure 2D example.

The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

It should be noted that the structures, proportions, sizes, etc. shown in the drawings in this specification are only used to match the content disclosed in the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. The limited conditions are not technically significant. Any modification of the structure, change of the proportional relationship, or adjustment of the size should still fall within the scope of this invention without affecting the effects and goals that can be achieved by the present invention. The technical content disclosed by the invention can be covered. At the same time, the terms such as "upper", "first", "second", and "one" cited in this specification are only for the convenience of description, and are not intended to limit the scope of the present invention. Changes or adjustments in their relative relationships shall be considered to be the scope of the present invention without substantial changes in the technical content.

2A to 2D are schematic cross-sectional views of a method for manufacturing the electronic package 2 according to the present invention.

As shown in FIG. 2A, a first circuit structure 20 is provided on the carrier board 9. The first circuit structure 20 has a first side 20a and a second side 20b opposite to each other. The second side 20b is bonded to the carrier plate 9. Next, a plurality of conductive pillars 23 electrically connected to the first circuit structure 20 are formed on the first side 20a, and an electronic component 21 is disposed on the first side 20a of the first circuit structure 20, wherein the electronic component 21 The upper body is connected and electrically connected to a plurality of electrical conductors 22, and the electrical conductors 22 are in the shape of a ball such as a conductive line, a solder ball, or a column shape of a metal material such as a copper pillar, a solder bump, or a wire bonding machine. A stud, but it is not limited to this.

In this embodiment, the first circuit structure 20 includes at least a first insulating layer 200 and a first redistribution layer (RDL) 201 provided on the first insulating layer 200. For example, the material forming the first circuit redistribution layer 201 is copper, and the material forming the first insulating layer 200 is, for example, polybenzoxazole (PBO), polyimide (Polyimide, for short) PI), prepreg (PP), and other dielectric materials.

Furthermore, the carrier plate 9 is, for example, a circular plate body made of semiconductor material (such as silicon or glass), and a release layer 90 and a bonding layer 91 are sequentially formed on the coating layer for the first circuit structure. 20 is provided on the bonding layer 91.

In addition, the conductive pillar 23 is disposed on the first circuit redistribution layer 201 and is electrically connected to the first circuit redistribution layer 201, and the material forming the conductive pillar 23 is a metal material such as copper or a solder material.

In addition, the electronic element 21 is an active element, a passive element, or a combination of both, and the active element is, for example, a semiconductor wafer, and the passive element is, for example, a resistor, a capacitor, and an inductor. For example, the electronic component 21 is a semiconductor wafer having opposite active surfaces 21a and non-active surfaces 21b. The electronic component 21 is fixed to the first circuit structure 20 with a non-active surface 21b through a bonding layer 24. On the first side 20a, the active surface 21a has a protective film 211, such as a passivation material, and a plurality of electrode pads 210 exposing the protective film 211. The conductive body 22 is formed on the electrode pad 210 and protrudes therefrom. Protective film 211.

As shown in FIG. 2B, a cladding layer 25 is formed on the first side 20 a of the first circuit structure 20, so that the cladding layer 25 covers the electronic component 21, the conductive bodies 22 and the conductive layers. The pillar 23 is exposed to the cladding layer 25 by an end surface of the conductive pillar 23 and the end surface of the conductive body 22 through a leveling process, so that the surface of the cladding layer 25 is flush with the end surface of the conductive pillar 23 and the An end surface of the conductive body 22.

In this embodiment, the covering layer 25 is an insulating material, such as an epoxy resin encapsulation gel, which can be formed on the first side of the first circuit structure 20 by lamination or molding. 20a.

Moreover, the leveling process removes a part of the material of the conductive pillar 23, a part of the material of the conductive body 22 and a part of the material of the cladding layer 25 by grinding.

As shown in FIG. 2C, a second circuit structure 26 is formed on the cladding layer 25, and the second circuit structure 26 is electrically connected to the conductive pillars 23 and the conductive body 22.

In this embodiment, the second circuit structure 26 includes a plurality of second insulation layers 260, 260 ', and a plurality of second circuit redistribution layers (RDL) 261, 261' provided on the second insulation layers 260, 260 ', and the outermost layer The second insulating layer 260 'can be used as a solder mask layer, so that the outermost second circuit redistribution layer 261' is exposed to the solder mask layer. Alternatively, the second circuit structure 26 may include only a single second insulating layer 260 and a single second circuit redistribution layer 261.

Furthermore, the material for forming the second circuit redistribution layer 261, 261 'is copper, and the material for forming the second insulation layer 260, 260' is, for example, polyparadiazole benzene (PBO), polyimide (Polyimide, abbreviated as PI), dielectric material of prepreg (PP).

In addition, a plurality of conductive elements 27, such as solder balls, are formed on the outermost second circuit redistribution layer 261 'for subsequent connection of an electronic device such as a package structure or other structure (such as another package or chip) (Fig. slightly). For example, an under-bump metallurgy (UBM) 270 may be formed on the outermost second circuit redistribution layer 261 'to facilitate the bonding of the conductive element 27.

As shown in FIG. 2D, the carrier plate 9 and the release layer 90 and the bonding layer 91 thereon are removed. After that, a plurality of conductive elements 29 such as solder balls can be formed on the second side 20 b of the first circuit structure 20 for subsequent mounting of electronic devices such as a package structure or another package or a semiconductor wafer 4.

In this embodiment, an insulation protection layer 28 such as a solder mask layer is formed on the second side 20b of the first circuit structure 20, and a plurality of openings are formed in the insulation protection layer 28 to make the first circuit The redistribution layer 201 is exposed from the openings, and is used to combine the conductive elements 29.

As shown in FIG. 2D ′, in the electronic package 2 ′ of another embodiment, at the process of FIG. 2A, at least one insulating layer 30 such as a passivation layer is formed on the active surface 21 a of the electronic component 21. And the circuit layer 31 formed on the insulation layer 30 and electrically connected to the electrode pad 210, and the electronic component 21 is combined with the circuit layer 31 and electrically connected to the conductors 22, and the protective film 211 is formed on On the outermost insulating layer 30, the conductive body 22 protrudes from the protective film 211.

Therefore, the manufacturing method of the electronic package 2, 2 'of the present invention is to protrude the protective film 211 by the conductive body 22, so that when the process is leveled, only the metal material (the conductive body 22) needs to be removed (ground) And part of the conductive pillar 23) and the packaging material (the cladding layer 25), without removing (grinding) part of the material of the protective film 211, so that the grinding interface can be reduced, and the tolerance range of the grinding process can be increased, and Reduce the cost. If the conductive body 22 is covered with a protective film as in the conventional technology, a part of the material of the protective film needs to be polished, and thus the polishing interface will be increased, and problems such as over-grinding and poor workability will occur.

Furthermore, the contact pads of the first and second circuit structures 20 and 26 (that is, the first and second circuit redistribution layers 201 and 261 'are exposed from the insulation protection layer 28 and the second insulation layer 260') serve as external connection points. It is beneficial to control the distance between each of the contact pads to meet the requirement of fine pitch, and to avoid bridging between the conductive elements 27, 29.

In addition, a circuit structure (ie, the first and second circuit structures 20, 26) is formed on the upper and lower sides of the electronic component 21, so that a conventional packaging substrate is not needed, so the thickness of the electronic package 2 can be reduced. And reduce production costs (that is, free of conventional packaging substrates).

The present invention also provides an electronic package 2 including: a first circuit structure 20, an electronic component 21, a cladding layer 25, and a second circuit structure 26.

The first circuit structure 20 has a first side 20a and a second side 20b opposite to each other. A plurality of conductive pillars 23 are formed on the first side 20a, and the conductive pillars 23 are electrically connected to the first circuit structure 20.

The electronic component 21 is disposed on the first side 20 a of the first circuit structure 20, and the electronic component 21 is coupled to and electrically connected to the plurality of electrical conductors 22.

The covering layer 25 is formed on the first side 20 a of the first circuit structure 20 so that the covering layer 25 covers the electronic component 21, the conductor 22 and the conductive pillars 23, and An end surface of the conductive pillar 23 and an end surface of the conductive body 22 are exposed from the cladding layer 25.

The second circuit structure 26 is formed on the cladding layer 25, and the second circuit structure 26 is electrically connected to the conductive pillar 23 and the conductive body 22.

In one embodiment, the electronic component 21 is covered with a protective film 211, and the conductive body 22 protrudes from the protective film 211.

In one embodiment, the electronic component 21 has an opposite active surface 21 a and a non-active surface 21 b, and the active surface 21 a is combined with and electrically connected to the conductive bodies 22.

In one embodiment, the surface of the cladding layer 25 is flush with the end surface of the conductive pillar 23 and the end surface of the conductive body 22.

In one embodiment, the electronic component 21 has a circuit layer 31 to bond and electrically connect the conductive bodies 22.

In one embodiment, the electronic package 2 includes a plurality of conductive elements 29 formed on the second side 20 b of the first circuit structure 20.

In one embodiment, the electronic package 2 includes a plurality of conductive elements 27 formed on the second circuit structure 26.

In summary, the electronic package and its manufacturing method of the present invention protrude the protective film through the conductor to reduce the grinding interface, increase the tolerance range of the grinding process and reduce the cost, and through the first and the first The design of the two-line structure not only makes the size of the package smaller, but also increases the number of external points, and when applied to fine-pitch products, bridges between the conductive elements can be avoided.

The above embodiments are used to exemplify the principle of the present invention and its effects, but not to limit the present invention. Anyone skilled in the art can modify the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application described later.

Claims (15)

An electronic package includes: a first circuit structure having a first side and a second side opposite to each other, and a conductive pillar electrically connected to the first circuit structure is formed on the first side; and an electronic component is provided. On the first side of the first circuit structure, the electronic component is provided with a passivation layer and a protective film provided on the passivation layer, and the electronic component is bonded and electrically connected with a plurality of protrusions of the passivation layer and A conductive body of the protective film; a cladding layer is formed on the first side of the first circuit structure, so that the cladding layer covers the electronic component, the conductive body and the conductive pillar, and the conductive body The end surface of the conductive pillar and the end surface of the conductive pillar are exposed to the cladding layer; and the second circuit structure is formed on the cladding layer and is electrically connected to the end surface of the conductive pillar exposed to the cladding layer and the conductor Of the end. The electronic package according to item 1 of the scope of patent application, wherein the electronic component has an opposite active surface and a non-active surface, and the active surface is combined with and electrically connected to the conductive bodies. The electronic package according to item 1 of the scope of patent application, wherein the electronic component has a circuit layer to combine and electrically connect the electrical conductors. According to the electronic package of claim 1, wherein the surface of the coating layer is flush with the end surface of the conductive pillar. According to the electronic package of claim 1, wherein the surface of the coating layer is flush with the end surface of the electrical conductor. The electronic package according to item 1 of the patent application scope, further comprising a plurality of conductive elements formed on the second side of the first circuit structure. The electronic package as described in item 1 of the scope of patent application, further comprising a plurality of conductive elements formed on the second circuit structure. An electronic package manufacturing method includes: providing a first circuit structure, the first circuit structure having a first side and a second side opposite to each other; and forming a conductive body electrically connected to the first circuit structure on the first side. A pillar, and an electronic component is disposed on a first side of the first circuit structure, wherein the electronic component has a passivation layer and a protective film provided on the passivation layer, and the electronic component is electrically bonded and electrically connected. Connecting a plurality of conductive bodies protruding from the passivation layer and the protective film; forming a covering layer on the first side of the first circuit structure, so that the covering layer covers the electronic component, the conductor and the conductive pillar And the end surface of the conductive body and the end surface of the conductive pillar are exposed to the covering layer; and a second circuit structure is formed on the covering layer, and the second circuit structure is electrically connected to the covering and exposed to the covering. An end surface of the conductive pillar of the layer and an end surface of the conductive body. According to the manufacturing method of the electronic package described in item 8 of the scope of the patent application, wherein the electronic component has an opposite active surface and a non-active surface, and the active surface is combined and electrically connected to the conductive bodies. According to the manufacturing method of the electronic package described in item 8 of the scope of the patent application, wherein the electronic component has a circuit layer to combine and electrically connect the conductive bodies. According to the manufacturing method of the electronic package described in item 8 of the scope of patent application, wherein the surface of the cladding layer is flush with the end surface of the conductive pillar. According to the method for manufacturing an electronic package described in item 8 of the scope of the patent application, wherein the surface of the cladding layer is flush with the end surface of the electrical conductor. According to the manufacturing method of the electronic package described in item 8 of the patent application scope, the method further includes forming a plurality of conductive elements on the second side of the first circuit structure. According to the manufacturing method of the electronic package described in item 8 of the patent application scope, the method further includes forming a plurality of conductive elements on the second circuit structure. According to the manufacturing method of the electronic package described in item 8 of the scope of patent application, the method further includes removing a part of the material of the conductive pillar, a part of the material of the conductive body and a part of the material of the coating layer by grinding to make the conductive material. The end surface of the body and the end surface of the conductive pillar are exposed to the coating layer.