[go: up one dir, main page]

TWI640151B - Negative voltage gate driven smart power module - Google Patents

Negative voltage gate driven smart power module Download PDF

Info

Publication number
TWI640151B
TWI640151B TW106132238A TW106132238A TWI640151B TW I640151 B TWI640151 B TW I640151B TW 106132238 A TW106132238 A TW 106132238A TW 106132238 A TW106132238 A TW 106132238A TW I640151 B TWI640151 B TW I640151B
Authority
TW
Taiwan
Prior art keywords
unit
wide
electrically connected
semiconductor power
driving unit
Prior art date
Application number
TW106132238A
Other languages
Chinese (zh)
Other versions
TW201916552A (en
Inventor
洪建中
許甫任
顏誠廷
李傳英
Original Assignee
瀚薪科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 瀚薪科技股份有限公司 filed Critical 瀚薪科技股份有限公司
Priority to TW106132238A priority Critical patent/TWI640151B/en
Application granted granted Critical
Publication of TWI640151B publication Critical patent/TWI640151B/en
Publication of TW201916552A publication Critical patent/TW201916552A/en

Links

Landscapes

  • Power Conversion In General (AREA)

Abstract

本發明揭示一種可負壓閘極驅動的智慧功率模組,係將一寬能隙半導體功率單元、一調整單元、以及一驅動單元整合使該驅動單元的一電壓準位可藉由該調整單元而調整,據此,該寬能隙半導體功率單元在驅動狀態下分別具有一正壓與負壓交替的驅動電壓準位。 The invention discloses a smart power module capable of driving a negative voltage gate, which integrates a wide-gap semiconductor power unit, an adjusting unit and a driving unit, so that a voltage level of the driving unit can be adjusted by the adjusting unit According to the adjustment, the wide-gap semiconductor power unit has a driving voltage level alternately between positive and negative voltages in the driving state.

Description

可負壓閘極驅動的智慧功率模組 Negative voltage gate driven smart power module

本發明為有關一種用於能源轉換的功率模組,尤指一種可負壓閘極驅動的智慧功率模組。 The invention relates to a power module for energy conversion, in particular to a smart power module capable of driving a negative voltage gate.

智慧功率模組(Intelligent Power Module,IPM)是一種功率開關元件,將電晶體及其驅動電路加以整合,具有高耐壓、高輸入阻抗、高開關頻率、低驅動功率等等優點,且在智慧功率模組中具有欠電壓、過電流、短路及過熱等故障檢測電路,故能大幅提高系統的可靠性。目前智慧功率模組廣泛地應用在變頻家電、逆變電源、工業控制等領域,具有可觀的經濟效益。 Intelligent Power Module (IPM) is a power switching component that integrates a transistor and its driver circuit. It has the advantages of high withstand voltage, high input impedance, high switching frequency, low driving power, etc. The power module has fault detection circuits such as undervoltage, overcurrent, short circuit and overheating, which can greatly improve the reliability of the system. At present, smart power modules are widely used in frequency conversion appliances, inverter power supplies, industrial control and other fields, with considerable economic benefits.

有鑑於此,許多廠商對於其結構或電路設計上加以改良,從強化元件本身的整合度、減少走線、或者降低組裝複雜性等,無非期盼能藉由效能的提升、尺寸的減薄以符合消費者需求。 In view of this, many manufacturers have improved their structure or circuit design, from strengthening the integration of the components themselves, reducing the wiring, or reducing the complexity of assembly, etc., and hope that the performance can be improved and the size can be reduced. Meet the needs of consumers.

舉例來說,譬如美國專利號US9,530,724B2揭示的PQFN半導體封裝中將一驅動電路與一引線框架耦合,並將複數垂直傳導功率裝置耦合至該引線框架,其中並包括複數個用來提供電性連接的接合線,其中至少一接合線從該複數垂直傳導功率裝置的其中之一的一頂面連至該引線框架的一部分,使得該連線框架的一部分電性連接複數垂直傳導功率裝置的底面的電極,據此,可藉由低成本的引線框架以在PQFN封裝中提供有效的電路互聯。 For example, in a PQFN semiconductor package disclosed in U.S. Patent No. 9,530,724 B2, a driver circuit is coupled to a lead frame and a plurality of vertical conduction power devices are coupled to the lead frame, and a plurality of a bonding wire, wherein at least one bonding wire is connected from a top surface of one of the plurality of vertical conduction power devices to a portion of the lead frame such that a portion of the wire frame is electrically connected to the plurality of vertical conduction power devices The electrodes on the bottom side, according to this, provide an efficient circuit interconnection in the PQFN package by a low cost lead frame.

此外,美國專利號US9,252,028B2揭示的功率半導體模組整合閘極驅動晶片及功率模組,包括一第一框架以及一第二框架,該第一框架具有彼此相對的一第一表面以及一第二表面,且在該第一表面上設有一絕緣閘雙極電晶體(IGBT)及一飛輪二極體(freewheeling diode,FWD);該第二框架則具有彼此相對的第三表面以及第四表面並包括控制電路、一導線以及一絕緣體部,該控制電路設置於該第三表面上。透過該導線連接該功率半導體元件以及該控制電路,再以該絕緣體部將該功率半導體元件、該第一框架、該控制電路、該第二框架、以及該導線進行封裝,使得與第一框架的一表面垂直的方向上,第一框架的該表面與第二框架的第三表面位於相同的高度,經此結構使導線穩定性提升,從而抑制該導線的斷線或短路,獲得可靠性更好的功率半導體模組。 In addition, the power semiconductor module disclosed in US Pat. No. 9,252,028 B2 incorporates a gate driving chip and a power module, including a first frame and a second frame, the first frame having a first surface opposite to each other and a a second surface, and an insulating gate bipolar transistor (IGBT) and a freewheeling diode (FWD) are disposed on the first surface; the second frame has a third surface and a fourth surface opposite to each other The surface includes a control circuit, a wire, and an insulator portion, and the control circuit is disposed on the third surface. Connecting the power semiconductor component and the control circuit through the wire, and packaging the power semiconductor component, the first frame, the control circuit, the second frame, and the wire with the insulator portion, so as to be aligned with the first frame In a direction perpendicular to the surface, the surface of the first frame is at the same height as the third surface of the second frame, and the structure improves the stability of the wire, thereby suppressing the wire breakage or short circuit of the wire, thereby obtaining better reliability. Power semiconductor module.

本發明的主要目的,在於解決習知的智慧功率模組,特別是在該模組中使用碳化矽寬能隙半導體功率單元時,因碳化矽寬能隙半導體功率單元介面存有缺陷,致使該模組產生正偏壓閾值(positive bias threshold)及負偏壓閾值(negative bias threshold)不穩定的缺點。 The main object of the present invention is to solve the conventional smart power module, especially when a silicon carbide wide-gap semiconductor power unit is used in the module, because the silicon carbide wide-gap semiconductor power unit interface has defects, resulting in The module has the disadvantage of being unstable with a positive bias threshold and a negative bias threshold.

本發明的另一目的,在於解決習知技術中使用碳化矽寬能隙半導體功率單元時必須開發專用的閘極驅動器(gate driver)以搭配該寬能隙半導體功率單元使用,推升該智慧功率模組的製造成本的問題。 Another object of the present invention is to solve the problem in the prior art that when a silicon carbide wide bandgap semiconductor power unit is used, a dedicated gate driver must be developed to match the wide bandgap semiconductor power unit to boost the smart power. The problem of manufacturing cost of the module.

為達到上述目的,本發明提供一種可負壓閘極驅動的智慧功率模組,其包括:一上橋電路,包括一第一驅動單元、以及一與該第一驅動單元電性連接的第一寬能隙半導體功率單元,該第一寬能隙半導體功率單元具有一第一汲極端、一第一閘極端、以及一第一源極端;一下橋電路,包 括一第二驅動單元、以及一與該第二驅動單元電性連接的第二寬能隙半導體功率單元,該第二寬能隙半導體功率單元具有一與該第一寬能隙半導體功率單元的該第一源極端電性連接的第二汲極端、一第二閘極端以及一第二源極端;一第一調整單元,該第一調整單元包括一電性連接該第一驅動單元的第一電阻與一電性連接該第一電阻的第一齊納二極體,該第一齊納二極體係分別與該第一寬能隙半導體功率單元的該第一源極端和該第二寬能隙半導體功率單元的該第二汲極端之間的一第一輸出節點、以及與該第一驅動單元的一第一高側電性連接;以及一第二調整單元,該第二調整單元包括一電性連接該第二驅動單元的第二電阻與一第二齊納二極體,且該第二齊納二極體係分別與該第二寬能隙半導體功率單元的該第二源極端、以及與該第二驅動單元的一第一低側電性連接。 In order to achieve the above object, the present invention provides a smart power module capable of driving a negative voltage gate, comprising: an upper bridge circuit, including a first driving unit, and a first electrically connected to the first driving unit a wide-gap semiconductor power unit having a first 汲 terminal, a first thyristor, and a first source terminal; a second driving unit, and a second wide-gap semiconductor power unit electrically connected to the second driving unit, the second wide-gap semiconductor power unit having a first wide-gap semiconductor power unit The first source terminal is electrically connected to the second drain terminal, the second gate terminal and the second source terminal; a first adjusting unit, the first adjusting unit includes a first electrically connected first driving unit a first Zener diode electrically coupled to the first resistor, the first Zener diode system and the first source terminal and the second wide energy of the first wide bandgap semiconductor power unit a first output node between the second drain terminal of the slot semiconductor power unit and a first high side of the first driving unit; and a second adjusting unit, the second adjusting unit includes a Electrically connecting the second resistor of the second driving unit and a second Zener diode, and the second Zener diode system and the second source terminal of the second wide-gap semiconductor power unit, respectively With the second drive unit It is electrically connected to the low side.

本發明一實施例中,該第一調整單元係電性連接至該第一驅動晶片之一高側地端和一高側電源端,且第二調整單元係電性連接至該第二驅動晶片之一低側地端和一低側電源端。更具體地,該第一齊納二極體之負極電性連接該第一輸出節點、且該第一齊納二極體之正極電性連接該高側地端;該第二齊納二極體之負極電性連接一與該第二寬能隙半導體功率單元的該第二源極端電性連接的第一接地端、且該第二齊納二極體之正極電性連接該低側地端。據此,該第一驅動單元以及該第二驅動單元的一電壓準位分別藉由該第一調整單元以及該第二調整單元提供一位移電壓而調整,令該第一寬能隙半導體功率單元以及該第二寬能隙半導體功率單元在驅動狀態下分別具有一正壓與負壓交替的閘極驅動電壓準位,故本發明相較於習知技術所能達到的功效在於: In an embodiment of the invention, the first adjusting unit is electrically connected to one of the high side ground end and the high side power end of the first driving chip, and the second adjusting unit is electrically connected to the second driving chip. One of the low side ground and one low side power end. More specifically, the cathode of the first Zener diode is electrically connected to the first output node, and the anode of the first Zener diode is electrically connected to the high side ground; the second Zener diode The anode of the body is electrically connected to a first ground end electrically connected to the second source terminal of the second wide-gap semiconductor power unit, and the anode of the second Zener diode is electrically connected to the low side ground end. Accordingly, the voltage levels of the first driving unit and the second driving unit are respectively adjusted by the first adjusting unit and the second adjusting unit to provide a displacement voltage, so that the first wide-gap semiconductor power unit is adjusted. And the second wide-gap semiconductor power unit has a gate driving voltage level of alternating positive and negative voltages in a driving state, so that the effect of the present invention compared to the prior art is:

(1)本發明的該智慧功率模組係為一種可負壓閘極驅動的智慧功率模組,故能克服習知的智慧功率模組,特別是在該模組中使用碳化矽 寬能隙半導體功率單元時,因碳化矽寬能隙半導體功率單元介面存有缺陷,致使該模組產生正偏壓閾值(positive bias threshold)及負偏壓閾值(negative bias threshold)不穩定的缺點,進而增加該智慧功率模組的可靠度。 (1) The smart power module of the present invention is a smart power module that can be driven by a negative voltage gate, so that the smart power module can be overcome, especially in the module. In the case of a wide-gap semiconductor power unit, there is a defect in the interface of the silicon carbide wide-gap semiconductor power unit, which causes the module to have a disadvantage of a positive bias threshold and a negative bias threshold. , thereby increasing the reliability of the smart power module.

(2)本發明的智慧功率模組搭配一般的絕緣閘雙極電晶體驅動器(IGBT driver)即可使用,而不需搭配專用的閘極驅動器(gate driver),將可大幅降低該智慧功率模組的製造成本,有利產業應用。 (2) The smart power module of the present invention can be used together with a general insulated gate bipolar transistor driver (IGBT driver), without the need for a dedicated gate driver, which can greatly reduce the smart power mode. The manufacturing cost of the group is beneficial to industrial applications.

(3)本發明的智慧功率模組因元件採用內連接方式整合在一單一封裝結構之中,故對於該智慧功率模組外部而言具有引腳兼容性(pin-to-pin compatible),使其得以廣泛地取代其他習知的智慧功率模組產品而被使用。 (3) The smart power module of the present invention is pin-to-pin compatible for external use of the smart power module because the components are integrated into a single package structure by means of internal connections. It has been widely used to replace other conventional smart power module products.

1‧‧‧可負壓閘極驅動的智慧功率模組 1‧‧‧Smart power module with negative voltage gate drive

10‧‧‧上橋電路 10‧‧‧Upper bridge circuit

101a‧‧‧第一驅動單元 101a‧‧‧First drive unit

101b‧‧‧第三驅動單元 101b‧‧‧third drive unit

101c‧‧‧第五驅動單元 101c‧‧‧ fifth drive unit

1011a、1011b、1011c‧‧‧高側電源端 1011a, 1011b, 1011c‧‧‧ high side power supply

1012a、1012b、1012c‧‧‧高側地端 1012a, 1012b, 1012c‧‧‧ high side ground

1013a‧‧‧高側輸出控制端 1013a‧‧‧High-side output control terminal

102a‧‧‧第一寬能隙半導體功率單元 102a‧‧‧First wide-gap semiconductor power unit

102b‧‧‧第三寬能隙半導體功率單元 102b‧‧‧ third wide-gap semiconductor power unit

102c‧‧‧第五寬能隙半導體功率單元 102c‧‧‧5th wide-gap semiconductor power unit

1021a‧‧‧第一源極端 1021a‧‧‧First source extreme

1021b‧‧‧第三源極端 1021b‧‧‧ Third source extreme

1021c‧‧‧第五源極端 1021c‧‧‧ Fifth source extreme

1022a‧‧‧第一汲極端 1022a‧‧‧First Extreme

1022b‧‧‧第三汲極端 1022b‧‧‧third extreme

1022c‧‧‧第五汲極端 1022c‧‧‧ fifth extreme

1023a‧‧‧第一閘極端 1023a‧‧‧The first gate extreme

1023b‧‧‧第三閘極端 1023b‧‧‧third gate extreme

1023c‧‧‧第五閘極端 1023c‧‧‧ Fifth Gate Extreme

103a‧‧‧第一調整單元 103a‧‧‧First adjustment unit

103b‧‧‧第三調整單元 103b‧‧‧ third adjustment unit

103c‧‧‧第五調整單元 103c‧‧‧Fiscal adjustment unit

1031a‧‧‧第一電阻 1031a‧‧‧First resistance

1031b‧‧‧第三電阻 1031b‧‧‧ Third resistor

1031c‧‧‧第五電阻 1031c‧‧‧ fifth resistor

1032a‧‧‧第一齊納二極體 1032a‧‧‧First Zener diode

1032b‧‧‧第三齊納二極體 1032b‧‧‧ Third Zener diode

1032c‧‧‧第五齊納二極體 1032c‧‧‧ Fifth Zener diode

104a‧‧‧第一輸出節點 104a‧‧‧first output node

104b‧‧‧第二輸出節點 104b‧‧‧second output node

104c‧‧‧第三輸出節點 104c‧‧‧ third output node

105a‧‧‧碳化矽飛輪二極體 105a‧‧‧Carbide Flywheel Diode

105b‧‧‧內建二極體 105b‧‧‧ Built-in diode

20‧‧‧下橋電路 20‧‧‧Bridge Circuit

201a‧‧‧第二驅動單元 201a‧‧‧Second drive unit

2011a、2011b、2011c‧‧‧低側電源端 2011a, 2011b, 2011c‧‧‧ low side power supply

2012a、2012b、2012c‧‧‧低側地端 2012a, 2012b, 2012c‧‧‧ low side ground

2013a‧‧‧低側輸出控制端 2013a‧‧‧Low-side output control terminal

201b‧‧‧第四驅動單元 201b‧‧‧fourth drive unit

201c‧‧‧第六驅動單元 201c‧‧‧ sixth drive unit

202a‧‧‧第二寬能隙半導體功率單元 202a‧‧‧Second wide-gap semiconductor power unit

202b‧‧‧第四寬能隙半導體功率單元 202b‧‧‧4th wide-gap semiconductor power unit

202c‧‧‧第六寬能隙半導體功率單元 202c‧‧‧6th wide-gap semiconductor power unit

2021a‧‧‧第二源極端 2021a‧‧‧Second source extreme

2021b‧‧‧第四源極端 2021b‧‧‧ fourth source extreme

2021c‧‧‧第六源極端 2021c‧‧‧ sixth source extreme

2022a‧‧‧第二汲極端 2022a‧‧‧second extreme

2022b‧‧‧第四汲極端 2022b‧‧‧Fourth Extreme

2022c‧‧‧第六汲極端 2022c‧‧‧ sixth pole extreme

2023a‧‧‧第二閘極端 2023a‧‧‧second gate extreme

2023b‧‧‧第四閘極端 2023b‧‧‧fourth gate extreme

2023c‧‧‧第六閘極端 2023c‧‧‧ sixth gate extreme

203a‧‧‧第二調整單元 203a‧‧‧Second adjustment unit

203b‧‧‧第四調整單元 203b‧‧‧fourth adjustment unit

203c‧‧‧第六調整單元 203c‧‧‧ sixth adjustment unit

2031a‧‧‧第二電阻 2031a‧‧‧second resistance

2031b‧‧‧第四電阻 2031b‧‧‧fourth resistor

2031c‧‧‧第六電阻 2031c‧‧‧ sixth resistor

2032a‧‧‧第二齊納二極體 2032a‧‧‧Second Zener diode

2032b‧‧‧第四齊納二極體 2032b‧‧‧4th Zener diode

2032c‧‧‧第六齊納二極體 2032c‧‧‧ Sixth Zener diode

205a‧‧‧第一接地端 205a‧‧‧first ground

205b‧‧‧第二接地端 205b‧‧‧second ground

205c‧‧‧第三接地端 205c‧‧‧ third ground

30‧‧‧直流母線正極 30‧‧‧DC bus positive

『圖1A』,為本發明一實施例的可負壓閘極驅動的智慧功率模組示意圖。 FIG. 1A is a schematic diagram of a smart power module capable of driving a negative voltage gate according to an embodiment of the invention.

『圖1B』為『圖1A』中第一調整單元的放大示意圖。 FIG. 1B is an enlarged schematic view of the first adjustment unit in FIG. 1A.

『圖1C』為『圖1A』中第二調整單元的放大示意圖。 FIG. 1C is an enlarged schematic view of the second adjustment unit in FIG. 1A.

『圖2A』,為本發明另一實施例的可負壓閘極驅動的智慧功率模組示意圖。 FIG. 2A is a schematic diagram of a smart power module capable of driving a negative voltage gate according to another embodiment of the present invention.

『圖2B』為『圖2A』中第三調整單元的放大示意圖。 FIG. 2B is an enlarged schematic view of the third adjustment unit in FIG. 2A.

『圖2C』為『圖2A』中第四調整單元的放大示意圖。 2C is an enlarged schematic view of the fourth adjustment unit in FIG. 2A.

『圖3A』,為本發明又一實施例的可負壓閘極驅動的智慧功率模組示意圖。 FIG. 3A is a schematic diagram of a smart power module capable of driving a negative voltage gate according to still another embodiment of the present invention.

『圖3B』為『圖3A』中第五調整單元的放大示意圖。 FIG. 3B is an enlarged schematic view of the fifth adjustment unit in FIG. 3A.

『圖3C』為『圖3A』中第六調整單元的放大示意圖。 FIG. 3C is an enlarged schematic view of the sixth adjustment unit in FIG. 3A.

『圖4』,為本發明一實施例中第一寬能隙半導體功率單元的其他態樣。 FIG. 4 is another aspect of a first wide bandgap semiconductor power cell in accordance with an embodiment of the present invention.

『圖5A』為在驅動狀態下,驅動電壓準位無正壓與負壓交替對於閾值穩定性的影響的實驗結果。 "Fig. 5A" is an experimental result of the influence of the positive and negative pressure alternating on the threshold stability of the driving voltage level in the driving state.

『圖5B』為在驅動狀態下,驅動電壓準位有正壓與負壓交替對於閾值穩定性的影響的實驗結果。 FIG. 5B is an experimental result in which the driving voltage level has an influence of the positive voltage and the negative voltage alternately on the threshold stability in the driving state.

有關本發明的詳細說明及技術內容,現就配合圖式說明如下:『圖1A』為本發明一實施例的可負壓閘極驅動的智慧功率模組1示意圖,主要包括一上橋電路10以及一下橋電路20。 The detailed description and technical content of the present invention will now be described with reference to the following drawings: FIG. 1A is a schematic diagram of a smart power module 1 capable of driving a negative voltage gate according to an embodiment of the present invention, which mainly includes an upper bridge circuit 10 And the next bridge circuit 20.

該上橋電路10包括一第一驅動單元101a以及一第一寬能隙半導體功率單元102a,該第一寬能隙半導體功率單元102a具有一第一源極端1021a、一第一汲極端1022a、以及一第一閘極端1023a,且該第一寬能隙半導體功率單元102a透過該第一閘極端1023a電性連接該第一驅動單元101a的一高側輸出控制端1013a,使得該第一驅動單元101a得以輸出高低的控制訊號至該第一閘極端1023a。 The upper bridge circuit 10 includes a first driving unit 101a and a first wide-gap semiconductor power unit 102a. The first wide-bandgap semiconductor power unit 102a has a first source terminal 1021a, a first threshold terminal 1022a, and a first gate terminal 1023a, and the first wide band gap semiconductor power unit 102a is electrically connected to a high side output control terminal 1013a of the first driving unit 101a through the first gate terminal 1023a, so that the first driving unit 101a The high and low control signals are output to the first gate terminal 1023a.

該下橋電路20則包括一第二驅動單元201a以及一第二寬能隙半導體功率單元202a,該第二寬能隙半導體功率單元202a與該第二驅動單元201a電性連接,並且具有一與該第一寬能隙半導體功率單元102a的該第一源極端1021a電性連接的第二汲極端2022a、一第二閘極端2023a以及一第二源極端2021a,其中該第二閘極端連接該第二驅動單元201a的一低側輸出控制端2013a。 The lower bridge circuit 20 includes a second driving unit 201a and a second wide-gap semiconductor power unit 202a. The second wide-gap semiconductor power unit 202a is electrically connected to the second driving unit 201a, and has a a second drain terminal 2022a, a second gate terminal 2023a, and a second source terminal 2021a electrically coupled to the first source terminal 1021a of the first wide-gap semiconductor power unit 102a, wherein the second gate terminal is connected to the first A low side output control terminal 2013a of the second driving unit 201a.

於該第一驅動單元101a與該第一寬能隙半導體功率單元102a之間設置一第一調整單元103a。該第一調整單元103a分別與該第一寬能隙半導體功率單元102a的該第一源極端1021a以及該第二寬能隙半導體功率單元202a的該第二汲極端2022a之間的一第一輸出節點104a、以及與該第一驅動單元101a的一第一高側電性連接。進一步來說,該第一高側包括一高側電 源端1011a以及一高側地端1012a,請續參閱『圖1B』,該第一調整單元103a包括一第一電阻1031a與一第一齊納二極體1032a,該第一齊納二極體1032a之正極電性連接該第一驅動單元101a之該高側地端1012a,負極則與該第一輸出節點104a電性連接;而該第一電阻1031a之一端電性連接該第一驅動單元101a之該高側電源端1011a,另一端則與該第一輸出節點104a電性連接,藉此將該高側地端1012a與該第一輸出節點104a之間電位,藉由該第一齊納二極體1032a的崩潰電壓而有了一位移的電壓,本發明可選擇不同規格的齊納二極體作為該第一齊納二極體1032a使用,該位移的電壓可以達到約5V~10V的範圍,故在閘極驅動上可使閘極對源級電壓(Vgs)有了負壓驅動的效果。 A first adjusting unit 103a is disposed between the first driving unit 101a and the first wide gap semiconductor power unit 102a. a first output between the first adjustment unit 103a and the first source terminal 1021a of the first wide-gap semiconductor power unit 102a and the second drain terminal 2022a of the second wide-gap semiconductor power unit 202a The node 104a is electrically connected to a first high side of the first driving unit 101a. Further, the first high side includes a high side power The source 1011a and the high-side terminal 1012a, please refer to FIG. 1B. The first adjusting unit 103a includes a first resistor 1031a and a first Zener diode 1032a. The first Zener diode The anode of the first driving unit 101a is electrically connected to the high side ground 1012a of the first driving unit 101a, and the negative electrode is electrically connected to the first output node 104a; and one end of the first resistor 1031a is electrically connected to the first driving unit 101a. The high-side power supply terminal 1011a is electrically connected to the first output node 104a, whereby the potential between the high-side ground terminal 1012a and the first output node 104a is obtained by the first Zener The breakdown voltage of the pole body 1032a has a displacement voltage. The present invention can select different specifications of the Zener diode as the first Zener diode 1032a, and the displacement voltage can reach a range of about 5V~10V. Therefore, the gate drive can have a negative voltage drive effect on the source voltage (Vgs).

回到『圖1A』,同樣地,於該第二驅動單元201a與該第二寬能隙半導體功率單元202a之間亦設置一第二調整單元203a。該第二調整單元203a分別與該第二寬能隙半導體功率單元202a中一電性連接其第二源極端2021a的第一接地端205a、以及與該第二驅動單元201a的一第一低測電性連接,以使本發明的該智慧功率模組得以在負壓驅動,其原理如前文所述,在此不再贅述。 Returning to FIG. 1A, a second adjusting unit 203a is also disposed between the second driving unit 201a and the second wide-gap semiconductor power unit 202a. The second adjusting unit 203a is electrically connected to the first ground end 205a of the second source terminal 2021a and the first low level of the second driving unit 201a. Electrically connected, so that the smart power module of the present invention can be driven under negative pressure, and the principle thereof is as described above, and details are not described herein again.

該第一低側包括一低側電源端2011a以及一低側地端2012a,請續參閱『圖1C』,該第二調整單元203a包括一第二電阻2031a與一第二齊納二極體2032a,且該第二齊納二極體2032a之正極電性連接該第二驅動單元之該低側地端2012a,負極則與該第一接地端205a電性連接;而該第二電阻2031a之一端電性連接該第二驅動單元201a之該低側電源端2011a,另一端則與該第一接地端205a電性連接。 The first low side includes a low side power terminal 2011a and a low side ground end 2012a. Please continue to refer to FIG. 1C. The second adjusting unit 203a includes a second resistor 2031a and a second Zener diode 2032a. The anode of the second Zener diode 2032a is electrically connected to the low side ground end 2012a of the second driving unit, and the negative electrode is electrically connected to the first ground end 205a; and one end of the second resistor 2031a The low side power terminal 2011a of the second driving unit 201a is electrically connected to the other end, and the other end is electrically connected to the first ground end 205a.

於本發明一實施例中,該可負壓閘極驅動的智慧功率模組1中的該第一驅動單元101a、該第一寬能隙半導體功率單元102a、該第一調整單元 103a、該第二驅動單元201a、該第二寬能隙半導體功率單元202a、以及該第二調整單元203a較佳地整合在一單一封裝結構之中而形成於一基板上;然而在其他實施例中,亦可視需求將上述元件個別封裝。 In the embodiment of the present invention, the first driving unit 101a, the first wide-gap semiconductor power unit 102a, and the first adjusting unit in the smart power module 1 of the negative-voltage gate driving The second driving unit 201a, the second wide-gap semiconductor power unit 202a, and the second adjusting unit 203a are preferably integrated in a single package structure and formed on a substrate; however, in other embodiments The above components may also be individually packaged as needed.

本實施例中,該第一驅動單元101a與該第二驅動單元201a係分別形成於兩晶片上,然而,於本發明其他實施例中,亦可將該第一驅動單元101a與該第二驅動單元201a整合於一單一驅動晶片之中,本發明對此並無特別限制。 In this embodiment, the first driving unit 101a and the second driving unit 201a are respectively formed on two wafers. However, in other embodiments of the present invention, the first driving unit 101a and the second driving unit may also be used. The unit 201a is integrated in a single driving chip, and the present invention is not particularly limited thereto.

請續參考『圖2A』,係本發明另一實施例的可負壓閘極驅動的智慧功率模組1示意圖。此實施例中,除了『圖1A』所述的元件之外,該上橋電路10更包括一第三驅動單元101b;一第三寬能隙半導體功率單元102b、以及一第三調整單元103b。而該下橋電路20更包括一第四驅動單元201b、一第四寬能隙半導體功率單元202b、以及一第四調整單元203b。 Please refer to FIG. 2A , which is a schematic diagram of a smart power module 1 capable of driving a negative voltage gate according to another embodiment of the present invention. In this embodiment, in addition to the components described in FIG. 1A, the upper bridge circuit 10 further includes a third driving unit 101b; a third wide gap semiconductor power unit 102b; and a third adjusting unit 103b. The lower bridge circuit 20 further includes a fourth driving unit 201b, a fourth wide gap semiconductor power unit 202b, and a fourth adjusting unit 203b.

本實施例中,該第三寬能隙半導體功率單元102b具有一第三源極端1021b、一第三汲極端1022b、以及一連接該第三驅動單元101b的一高側輸出控制端的第三閘極端1023b;該第四寬能隙半導體功率單元202b也具有一第四源極端2021b、一第四汲極端2022b、以及一連接該第四驅動單元201b的一低側輸出控制端的第四閘極端2023b,且該第四汲極端2022b與該第三寬能隙半導體功率單元102b的該第三源極端1021b電性連接。 In this embodiment, the third wide-gap semiconductor power unit 102b has a third source terminal 1021b, a third drain terminal 1022b, and a third gate terminal connected to a high-side output control terminal of the third driving unit 101b. The fourth wide-gap semiconductor power unit 202b also has a fourth source terminal 2021b, a fourth drain terminal 2022b, and a fourth gate terminal 2023b connected to a low-side output control terminal of the fourth driving unit 201b. The fourth drain terminal 2022b is electrically connected to the third source terminal 1021b of the third wide gap semiconductor power unit 102b.

本實施例中,該第三調整單元103b係分別與該第三寬能隙半導體功率單元102b的該第三源極端1021b以及該第四寬能隙半導體功率單元202b的該第四汲極端2022b之間的一第二輸出節點104b、以及與該第三驅動單元101b的一第二高側電性連接;而該第四調整單元203b則分別與該第四寬能隙半導體功率單元202b的該第四源極端2021b、以及與該第四驅動單元201b的一第二低側電性連接。 In this embodiment, the third adjusting unit 103b is respectively associated with the third source terminal 1021b of the third wide-gap semiconductor power unit 102b and the fourth drain terminal 2022b of the fourth wide-gap semiconductor power unit 202b. a second output node 104b is electrically connected to a second high side of the third driving unit 101b; and the fourth adjusting unit 203b is respectively associated with the fourth wide gap semiconductor power unit 202b The four source terminal 2021b is electrically connected to a second low side of the fourth driving unit 201b.

本實施例中,該第一寬能隙半導體功率單元102a的該第一汲極端1022a與該第三寬能隙半導體功率單元102b的該第三汲極端1022b均電性連接一直流母線正極30。 In this embodiment, the first drain terminal 1022a of the first wide-gap semiconductor power unit 102a and the third drain terminal 1022b of the third wide-gap semiconductor power unit 102b are electrically connected to the bus bar positive electrode 30.

請續參閱『圖2B』,該第三驅動單元101b的該第二高側包括一高側電源端1011b以及一高側地端1012b。該第三調整單元103b的一第三齊納二極體1032b之正極電性連接該高側地端1012b,負極則與該第二輸出節點104b電性連接;而該第三調整單元103b的一第三電阻1031b之一端則電性連接該高側電源端1011b,另一端則與該第二輸出節點104b電性連接。 Continuing to refer to FIG. 2B, the second high side of the third driving unit 101b includes a high side power terminal 1011b and a high side ground terminal 1012b. The positive pole of a third Zener diode 1032b of the third adjusting unit 103b is electrically connected to the high side ground end 1012b, and the negative pole is electrically connected to the second output node 104b; and one of the third adjusting unit 103b One end of the third resistor 1031b is electrically connected to the high side power terminal 1011b, and the other end is electrically connected to the second output node 104b.

請續參閱『圖2C』,該第四驅動單元201b的該第二低側包括一低側電源端2011b以及一低側地端2012b。該第四調整單元203b的一第四齊納二極體2032b之正極電性連接該低側地端2012b,負極則與該第四寬能隙半導體功率單元202b中一電性連接其第四源極端2021b的第二接地端205b電性連接;而該第四調整單元203b的一第四電阻2031b之一端則電性連接該第四驅動單元201b之該低側電源端2011b,另一端則與該第二接地端205b電性連接。 Please refer to FIG. 2C. The second low side of the fourth driving unit 201b includes a low side power terminal 2011b and a low side ground end 2012b. The anode of a fourth Zener diode 2032b of the fourth adjusting unit 203b is electrically connected to the low side ground end 2012b, and the anode is electrically connected to the fourth source of the fourth wide gap semiconductor power unit 202b. The second ground end 205b of the terminal 2021b is electrically connected; and one end of a fourth resistor 2031b of the fourth adjusting unit 203b is electrically connected to the low side power terminal 2011b of the fourth driving unit 201b, and the other end is connected thereto. The second ground end 205b is electrically connected.

同樣地,本實施例中,該第一驅動單元101a、該第二驅動單元201a、該第三驅動單元101b、以及該第四驅動單元201b係分別形成於不同的晶片上,然而,於本發明其他實施例中,亦可將該第一驅動單元101a與該第三驅動單元101b整合於一單一驅動晶片、並將該第二驅動單元201a與該第四驅動單元201b整合於另一單一驅動晶片之中,或將該第一驅動單元101a、該第二驅動單元201a、該第三驅動單元101b、以及該第四驅動單元201b整合於同一驅動晶片,本發明對此並無特別限制。 Similarly, in this embodiment, the first driving unit 101a, the second driving unit 201a, the third driving unit 101b, and the fourth driving unit 201b are respectively formed on different wafers, however, in the present invention In other embodiments, the first driving unit 101a and the third driving unit 101b may be integrated into a single driving chip, and the second driving unit 201a and the fourth driving unit 201b may be integrated into another single driving chip. The first driving unit 101a, the second driving unit 201a, the third driving unit 101b, and the fourth driving unit 201b are integrated into the same driving wafer, and the present invention is not particularly limited.

於本發明又一實施例之可負壓閘極驅動的智慧功率模組1,如『圖3A』所示,係為一三相橋拓樸之智慧功率模組。除了『圖2A』之元件外, 本實施例中該上橋電路10更包括一第五驅動單元101c、一第五寬能隙半導體功率單元102c、以及一第五調整單元103c。而該下橋電路20更包括一第六驅動單元201c、一第六寬能隙半導體功率單元202c、以及一第六調整單元203c。 The smart power module 1 capable of driving the negative voltage gate in another embodiment of the present invention, as shown in FIG. 3A, is a smart power module of a three-phase bridge topology. Except for the components of Figure 2A, In this embodiment, the upper bridge circuit 10 further includes a fifth driving unit 101c, a fifth wide gap semiconductor power unit 102c, and a fifth adjusting unit 103c. The lower bridge circuit 20 further includes a sixth driving unit 201c, a sixth wide gap semiconductor power unit 202c, and a sixth adjusting unit 203c.

本實施例中,該第五寬能隙半導體功率單元102c具有一第五源極端1021c、一第五汲極端1022c、以及一連接該第五驅動單元101c的一高側輸出控制端的第五閘極端1023c;該第六寬能隙半導體功率單元202c也具有一第六源極端2021c、一第六汲極端2022c、以及一連接該第六驅動單元201c的一低側輸出控制端的第六閘極端2023c,且該第六汲極端2022c與該第五寬能隙半導體功率單元102c的該第五源極端1021c電性連接。 In this embodiment, the fifth wide-gap semiconductor power unit 102c has a fifth source terminal 1021c, a fifth terminal 1022c, and a fifth gate terminal connected to a high-side output control terminal of the fifth driving unit 101c. The sixth wide-gap semiconductor power unit 202c also has a sixth source terminal 2021c, a sixth terminal 2022c, and a sixth gate terminal 2023c connected to a low-side output control terminal of the sixth driving unit 201c. The sixth drain terminal 2022c is electrically connected to the fifth source terminal 1021c of the fifth wide gap semiconductor power unit 102c.

本實施例中,該第五調整單元103c係分別與該第五寬能隙半導體功率單元102c的該第五源極端1021c和該第六寬能隙半導體功率單元202c的該第六汲極端2022c之間的一第三輸出節點104c、以及與該第五驅動單元101c的一第三高側電性連接;而該第六調整單元203c則分別與該第六寬能隙半導體功率單元202c中一電性連接該第六源極端2021c的第三接地端205c、以及與該第六驅動單元201c的一第三低側電性連接。 In this embodiment, the fifth adjusting unit 103c is respectively connected to the fifth source terminal 1021c of the fifth wide-gap semiconductor power unit 102c and the sixth terminal electrode 2022c of the sixth wide-gap semiconductor power unit 202c. a third output node 104c is electrically connected to a third high side of the fifth driving unit 101c; and the sixth adjusting unit 203c is respectively electrically connected to the sixth wide gap semiconductor power unit 202c. The third ground end 205c of the sixth source terminal 2021c is electrically connected to a third low side of the sixth driving unit 201c.

請搭配『圖2A』及『圖3A』,本實施例中,該第一寬能隙半導體功率單元102a的該第一汲極端1022a、該第三寬能隙半導體功率單元102b的該第三汲極端1022b、以及該第五寬能隙半導體功率單元102c的該第五汲極端1022c均電性連接該直流母線正極30。 Please refer to FIG. 2A and FIG. 3A. In this embodiment, the first 汲 terminal 1022a of the first wide-gap semiconductor power unit 102a and the third 汲 of the third wide-gap semiconductor power unit 102b. The terminal 1022b and the fifth drain terminal 1022c of the fifth wide-gap semiconductor power unit 102c are electrically connected to the DC bus positive terminal 30.

請續參閱『圖3B』,該第五驅動單元101c的該第三高側包括一高側電源端1011c以及一高側地端1012c。該第五調整單元103c的一第五齊納二極體1032c之正極電性連接該高側地端1012c,負極則與該第三輸出節點104c電性連接;而該第五調整單元103c的一第五電阻1031c之一端電性連接 該第五驅動單元101c之該高側電源端1011c,另一端則與該第三輸出節點104c電性連接。 Continuing to refer to FIG. 3B, the third high side of the fifth driving unit 101c includes a high side power terminal 1011c and a high side ground terminal 1012c. The anode of a fifth Zener diode 1032c of the fifth adjusting unit 103c is electrically connected to the high side ground end 1012c, and the negative pole is electrically connected to the third output node 104c; and one of the fifth adjusting unit 103c One end of the fifth resistor 1031c is electrically connected The high side power terminal 1011c of the fifth driving unit 101c is electrically connected to the third output node 104c.

請續參閱『圖3C』,該第五驅動單元101c的該第三低側包括一低側電源端2011c以及一低側地端2012c。該第六調整單元203c的一第六齊納二極體2032c之正極電性連接該第六驅動單元之該低側地端2012c,負極則與該第三接地端205c電性連接;而該第六調整單元203c的一第六電阻2031c之一端電性連接該低側電源端2011c,另一端則與該第三接地端205c電性連接。 Please refer to FIG. 3C. The third low side of the fifth driving unit 101c includes a low side power terminal 2011c and a low side ground end 2012c. The anode of a sixth Zener diode 2032c of the sixth adjusting unit 203c is electrically connected to the low side ground end 2012c of the sixth driving unit, and the negative pole is electrically connected to the third ground end 205c; One end of a sixth resistor 2031c of the adjusting unit 203c is electrically connected to the low side power terminal 2011c, and the other end is electrically connected to the third ground terminal 205c.

同樣地,請參考『圖1A』、『圖2A』、以及『圖3A』,本實施例中,該第一驅動單元101a、該第二驅動單元201a、該第三驅動單元101b、該第四驅動單元201b、該第五驅動單元101c、該第六驅動單元201c係分別形成於不同的晶片上,然而,於本發明其他實施例中,亦可將該第一驅動單元101a與該第二驅動單元201a整合於一單一驅動晶片、將該第三驅動單元101b與該第四驅動單元201b整合於另一單一驅動晶片、且該第五驅動單元101c與該第六驅動單元201c整合於又一單一驅動晶片之中,或將該第一驅動單元101a、該第二驅動單元201a、該第三驅動單元101b、該第四驅動單元201b、該第五驅動單元101c、以及該第六驅動單元201c整合於同一驅動晶片,本發明對此並無特別限制。 Similarly, please refer to FIG. 1A, FIG. 2A, and FIG. 3A. In this embodiment, the first driving unit 101a, the second driving unit 201a, the third driving unit 101b, and the fourth The driving unit 201b, the fifth driving unit 101c, and the sixth driving unit 201c are respectively formed on different wafers. However, in other embodiments of the present invention, the first driving unit 101a and the second driving may be The unit 201a is integrated into a single driving chip, the third driving unit 101b and the fourth driving unit 201b are integrated into another single driving chip, and the fifth driving unit 101c and the sixth driving unit 201c are integrated into another single unit. Integrating the first driving unit 101a, the second driving unit 201a, the third driving unit 101b, the fourth driving unit 201b, the fifth driving unit 101c, and the sixth driving unit 201c The present invention is not particularly limited in the same drive wafer.

本發明中,該些寬能隙半導體功率單元102a、102b、102c、202a、202b、以及202c可彼此相同或不同地選自一金屬氧化物半導體場效應電晶體(MOSFET)、一接面場效應電晶體(JFET)、一高電子遷移率電晶體(HEMT)、或一絕緣閘雙極電晶體(IGBT)。於本實施例中該些寬能隙半導體功率單元102a、102b、102c、202a、202b、以及202c均為該碳化矽金屬氧 化物半導體場效應電晶體(SiC MOSFET),以組成一全碳化矽智慧功率模組,不僅可有效降低切換損耗,發熱量也較小。 In the present invention, the wide bandgap semiconductor power cells 102a, 102b, 102c, 202a, 202b, and 202c may be identical to each other or differently selected from a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect. A transistor (JFET), a high electron mobility transistor (HEMT), or an insulated gate bipolar transistor (IGBT). In the embodiment, the wide-bandgap semiconductor power units 102a, 102b, 102c, 202a, 202b, and 202c are all the tantalum metal oxides. The compound semiconductor field effect transistor (SiC MOSFET) is used to form an all-carbonized 矽 smart power module, which not only can effectively reduce the switching loss, but also generates less heat.

本發明一實施例中,為了達到更低的功率損耗,該碳化矽金屬氧化物半導體場效應電晶體可更包括一與該碳化矽金屬氧化物半導體場效應電晶體並聯連接之碳化矽飛輪二極體105a(freewheeling diode,FWD),如『圖4』。該碳化矽飛輪二極體105a之導通電壓,相較於碳化矽金屬氧化物半導體場效應電晶體之內建二極體(built-in body diode)105b(請參考『圖1』)有更低的導通電壓,可在該可負壓閘極驅動的智慧功率模組1操作的時候導通由感性負載回流的電流,可擁有更低的功率損耗。 In an embodiment of the invention, in order to achieve lower power loss, the tantalum carbide metal oxide semiconductor field effect transistor may further include a tantalum carbide flywheel diode connected in parallel with the tantalum carbide metal oxide semiconductor field effect transistor. Body 105a (freewheeling diode, FWD), as shown in Figure 4. The turn-on voltage of the tantalum carbide flywheel diode 105a is lower than that of the built-in body diode 105b of the tantalum carbide metal oxide semiconductor field effect transistor (refer to FIG. 1). The turn-on voltage can turn on the current flowing back by the inductive load when the smart power module 1 driven by the negative voltage gate is operated, and can have lower power loss.

據此,該些驅動單元101a、101b、101c、201a、201b、201c的一電壓準位分別藉由該些調整單元103a、103b、103c、203a、203b、203c提供一位移電壓而調整,令該些寬能隙半導體功率單元102a、102b、102c、202a、202b、202c在驅動狀態下分別具有一介於20V至-10V之間之正壓與負壓交替的驅動電壓準位。 Accordingly, a voltage level of the driving units 101a, 101b, 101c, 201a, 201b, and 201c is adjusted by providing a displacement voltage by the adjusting units 103a, 103b, 103c, 203a, 203b, and 203c, respectively. The wide-gap semiconductor power cells 102a, 102b, 102c, 202a, 202b, and 202c each have a driving voltage level of a positive voltage and a negative voltage between 20V and -10V in a driving state.

請續參考『圖5A』及『圖5B』係分別代表在驅動狀態下,驅動電壓準位無正壓與負壓交替以及有正壓與負壓交替對於閾值穩定性的影響的實驗結果。『圖5A』的驅動電壓準位介於0V至20V之間,在操作過程中臨界電壓(threshold voltage,Vth)不穩定;而當驅動電壓準位介於-5V至20V之間的時候,操作過程中臨界電壓(threshold voltage,Vth)穩定,故能增加該智慧功率模組的可靠度。 Please continue to refer to "Fig. 5A" and "Fig. 5B" respectively. The experimental results show that the driving voltage level has no positive and negative pressure alternately and the positive and negative pressure alternately affect the threshold stability in the driving state. The driving voltage level of Figure 5A is between 0V and 20V. The threshold voltage (Vth) is unstable during operation. When the driving voltage level is between -5V and 20V, the operation is performed. The threshold voltage (Vth) is stable during the process, so the reliability of the smart power module can be increased.

是以,相較於習知技術而言,本發明的智慧功率模組具有以下特點: Therefore, compared with the prior art, the smart power module of the present invention has the following features:

(1)本發明的智慧功率模組係為一種可負壓閘極驅動的智慧功率模組,故能克服習知用於能源轉換的功率模組,特別是碳化矽寬能隙半 導體功率單元,因其介面存在缺陷致使其正偏壓後的閾值(positive bias threshold)及負偏壓後的閾值(negative bias threshold)不穩定的缺點,從而增加該智慧功率模組的可靠度。 (1) The smart power module of the present invention is a smart power module that can be driven by a negative voltage gate, so that the power module for energy conversion can be overcome, especially the carbonized 矽 wide energy gap half. The conductor power unit has the disadvantage that its positive bias threshold and the negative bias threshold are unstable due to defects in the interface, thereby increasing the reliability of the smart power module.

(2)本發明的智慧功率模組搭配一般的絕緣閘雙極電晶體驅動器(IGBT driver)即可使用。由於不需搭配專用的閘極驅動器(gate driver),可大幅降低該智慧功率模組的製造成本,有利產業應用。 (2) The smart power module of the present invention can be used with a general insulated gate bipolar transistor driver (IGBT driver). Since it does not need to be equipped with a dedicated gate driver, the manufacturing cost of the smart power module can be greatly reduced, which is advantageous for industrial applications.

(3)本發明的智慧功率模組因元件採用內連接方式整合在一單一封裝結構之中,故對於該智慧功率模組外部而言具有引腳兼容性(pin-to-pin compatible),使其得以廣泛地取代其他的智慧功率模組產品而被使用。 (3) The smart power module of the present invention is pin-to-pin compatible for external use of the smart power module because the components are integrated into a single package structure by means of internal connections. It has been widely used to replace other smart power module products.

以上已將本發明做一詳細說明,惟以上所述者,僅為本發明的一較佳實施例而已,當不能限定本發明實施的範圍。即凡依本發明申請範圍所作的均等變化與修飾等,皆應仍屬本發明的專利涵蓋範圍內。 The present invention has been described in detail above, but the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the scope of the invention. That is, the equivalent changes and modifications made by the scope of the present application should remain within the scope of the patent of the present invention.

Claims (12)

一種可負壓閘極驅動的智慧功率模組,包括:一上橋電路,包括一第一驅動單元、以及一與該第一驅動單元電性連接的第一寬能隙半導體功率單元,該第一寬能隙半導體功率單元具有一第一汲極端、一第一閘極端、以及一第一源極端;一下橋電路,包括一第二驅動單元、以及一與該第二驅動單元電性連接的第二寬能隙半導體功率單元,該第二寬能隙半導體功率單元具有一與該第一寬能隙半導體功率單元的該第一源極端電性連接的第二汲極端、一第二閘極端、以及一第二源極端;一第一調整單元,該第一調整單元包括一電性連接該第一驅動單元的第一電阻與一電性連接該第一電阻的第一齊納二極體,該第一齊納二極體係分別與該第一寬能隙半導體功率單元的該第一源極端和該第二寬能隙半導體功率單元的該第二汲極端之間的一第一輸出節點、以及與該第一驅動單元的一第一高側電性連接;以及一第二調整單元,該第二調整單元包括一電性連接該第二驅動單元的第二電阻與一第二齊納二極體,且該第二齊納二極體係分別與該第二寬能隙半導體功率單元的該第二源極端、以及與該第二驅動單元的一第一低側電性連接;其中,該第一驅動單元以及該第二驅動單元的一電壓準位分別藉由該第一調整單元以及該第二調整單元提供一位移電壓而調整,令該第一寬能隙半導體功率單元以及該第二寬能隙半導體功率單元在驅動狀態下分別具有一正壓與負壓交替的驅動電壓準位。 A smart power module capable of driving a negative voltage gate, comprising: an upper bridge circuit, comprising a first driving unit, and a first wide gap semiconductor power unit electrically connected to the first driving unit, the first A wide-gap semiconductor power unit has a first drain terminal, a first gate terminal, and a first source terminal; the lower bridge circuit includes a second driving unit and a second driving unit electrically connected to the second driving unit a second wide-gap semiconductor power unit having a second 汲 terminal and a second gate terminal electrically connected to the first source terminal of the first wide-gap semiconductor power unit And a second source terminal; the first adjusting unit includes a first resistor electrically connected to the first driving unit and a first Zener diode electrically connected to the first resistor a first output node between the first Zener diode system and the first source terminal of the first wide bandgap semiconductor power unit and the second drain terminal of the second wide bandgap semiconductor power unit And with a first high-side electrical connection of the first driving unit; and a second adjusting unit, the second adjusting unit includes a second resistor electrically connected to the second driving unit and a second Zener diode. And the second Zener diode system is electrically connected to the second source terminal of the second wide-gap semiconductor power unit and a first low side of the second driving unit, wherein the first driving The voltage level of the cell and the second driving unit are respectively adjusted by the first adjusting unit and the second adjusting unit to provide a displacement voltage, so that the first wide-gap semiconductor power unit and the second wide gap The semiconductor power unit has a driving voltage level alternately between positive and negative voltages in the driving state. 如申請專利範圍第1項所述之智慧功率模組,其中,該第一寬能隙半導體功率單元以及該第二寬能隙半導體功率單元係分別獨立地選自由金屬氧化 物半導體場效應電晶體(MOSFET)、接面場效應電晶體(JFET)、高電子遷移率電晶體(HEMT)、絕緣閘雙極電晶體(IGBT)、及其組合所組成之群組。 The smart power module of claim 1, wherein the first wide-gap semiconductor power unit and the second wide-gap semiconductor power unit are each independently selected from a metal oxide A group of semiconductor field effect transistor (MOSFET), junction field effect transistor (JFET), high electron mobility transistor (HEMT), insulated gate bipolar transistor (IGBT), and combinations thereof. 如申請專利範圍第1項所述之智慧功率模組,其中,該第一驅動單元與該第二驅動單元係整合於一單一驅動單元之中。 The smart power module of claim 1, wherein the first driving unit and the second driving unit are integrated into a single driving unit. 如申請專利範圍第1項所述之智慧功率模組,其中,該第一調整單元係電性連接至該第一驅動單元之一高側地端和一高側電源端,且第二調整單元係電性連接至該第二驅動單元之一低側地端和一低側電源端。 The smart power module of claim 1, wherein the first adjusting unit is electrically connected to one of the high side ground and the high side power end of the first driving unit, and the second adjusting unit The system is electrically connected to one of the low side ground end and the low side power end of the second driving unit. 如申請專利範圍第4項所述之智慧功率模組,其中,該第二寬能隙半導體功率單元包括一電性連接該第二源極端的第一接地端,該第一齊納二極體之負極電性連接該第一輸出節點、且該第一齊納二極體之正極電性電性連接該高側地端;該第二齊納二極體之負極電性連接該第一接地端、且該第二齊納二極體之正極電性連接該低側地端。 The smart power module of claim 4, wherein the second wide-gap semiconductor power unit comprises a first ground terminal electrically connected to the second source terminal, the first Zener diode The anode is electrically connected to the first output node, and the anode of the first Zener diode is electrically connected to the high side ground; the cathode of the second Zener diode is electrically connected to the first ground And a positive electrode of the second Zener diode is electrically connected to the low side ground. 如申請專利範圍第1項所述之智慧功率模組,該上橋電路更包括:一第三驅動單元;一與該第三驅動單元電性連接的第三寬能隙半導體功率單元,該第三寬能隙半導體功率單元具有一第三源極端以及一與該第三源極端電性連接的第三汲極端;以及一分別與該第三寬能隙半導體功率單元的該第三源極端以及該第三驅動單元電性連接的第三調整單元,該第三調整單元包括一電性連接該第三驅動單元的第三電阻與一電性連接該第三電阻的第三齊納二極體;且該下橋電路更包括:一第四驅動單元;一與該第四驅動單元電性連接的第四寬能隙半導體功率單元,該第四寬能隙半導體功率單元具有一第四源極端以及一分別與該第四源極端以及該第三寬能隙半導體功率單元的該第三源極端電性連接的第四汲極端;以及一分別與該第四寬能隙半導體功率單元的該第四源極端以及該第四驅動單 元電性連接的第四調整單元,該第四調整單元包括一電性連接該第四驅動單元的第四電阻與一電性連接該第四電阻的第四齊納二極體;其中,該第一寬能隙半導體功率單元的該第一汲極端與該第三寬能隙半導體功率單元的該第三汲極端均電性連接一直流母線正極。 The smart power module of claim 1, wherein the upper bridge circuit further comprises: a third driving unit; and a third wide gap semiconductor power unit electrically connected to the third driving unit, the first The triple wide bandgap semiconductor power unit has a third source terminal and a third drain terminal electrically coupled to the third source terminal; and a third source terminal of the third wide bandgap semiconductor power unit and a third adjusting unit electrically connected to the third driving unit, the third adjusting unit includes a third resistor electrically connected to the third driving unit and a third Zener diode electrically connected to the third resistor And the lower bridge circuit further includes: a fourth driving unit; a fourth wide-gap semiconductor power unit electrically connected to the fourth driving unit, the fourth wide-gap semiconductor power unit having a fourth source terminal And a fourth drain terminal electrically coupled to the fourth source terminal and the third source terminal of the third wide bandgap semiconductor power unit; and a first and the fourth wide bandgap semiconductor power unit Four sources Extreme and the fourth drive list a fourth adjusting unit electrically connected to the fourth adjusting unit, comprising: a fourth resistor electrically connected to the fourth driving unit and a fourth Zener diode electrically connected to the fourth resistor; wherein The first drain terminal of the first wide bandgap semiconductor power unit and the third drain terminal of the third wide gap semiconductor power unit are electrically connected to the bus bar anode. 如申請專利範圍第6項所述之智慧功率模組,該上橋電路更包括:一第五驅動單元;一與該第五驅動單元電性連接的第五寬能隙半導體功率單元,該第五寬能隙半導體功率單元具有一第五源極端以及一與該第五源極端電性連接的第五汲極端;以及一分別與該第五寬能隙半導體功率單元的該第五源極端以及該第五驅動單元電性連接的第五調整單元,該第五調整單元包括一電性連接該第五驅動單元的第五電阻與一電性連接該第五電阻的第五齊納二極體;且該下橋電路更包括:一第六驅動單元;一與該第六驅動單元電性連接的第六寬能隙半導體功率單元,該第六寬能隙半導體功率單元具有一第六源極端以及一分別與該第六源極端以及該第五寬能隙半導體功率單元的該第五源極端電性連接的第六汲極端;以及一分別與該第六寬能隙半導體功率單元的該第六源極端以及該第六驅動單元電性連接的第六調整單元,該第六調整單元包括一電性連接該第六驅動單元的第六電阻與一電性連接該第六電阻的第六齊納二極體;其中,該第三寬能隙半導體功率單元的該第三汲極端與該第五寬能隙半導體功率單元的該第五汲極端均電性連接該直流母線正極。 The smart power module of claim 6, wherein the upper bridge circuit further comprises: a fifth driving unit; and a fifth wide gap semiconductor power unit electrically connected to the fifth driving unit, the first The five wide bandgap semiconductor power unit has a fifth source terminal and a fifth drain terminal electrically connected to the fifth source terminal; and a fifth source terminal of the fifth wide bandgap semiconductor power unit and a fifth adjusting unit electrically connected to the fifth driving unit, the fifth adjusting unit includes a fifth resistor electrically connected to the fifth driving unit and a fifth Zener diode electrically connected to the fifth resistor And the second bridge circuit further includes: a sixth driving unit; a sixth wide-gap semiconductor power unit electrically connected to the sixth driving unit, the sixth wide-gap semiconductor power unit having a sixth source terminal And a sixth drain terminal electrically coupled to the sixth source terminal and the fifth source terminal of the fifth wide bandgap semiconductor power unit, respectively; and a first and the sixth wide bandgap semiconductor power unit Six sources And a sixth adjusting unit electrically connected to the sixth driving unit, the sixth adjusting unit includes a sixth resistor electrically connected to the sixth driving unit and a sixth Zener two electrically connected to the sixth resistor The third body of the third wide-gap semiconductor power unit and the fifth terminal of the fifth wide-gap semiconductor power unit are electrically connected to the DC bus positive terminal. 如申請專利範圍第1項所述之智慧功率模組,其中,該第一寬能隙半導體功率單元以及該第二寬能隙半導體功率單元均為一碳化矽金屬氧化物半導體場效應電晶體(SiC MOSFET)。 The smart power module of claim 1, wherein the first wide-gap semiconductor power unit and the second wide-gap semiconductor power unit are each a niobium metal oxide semiconductor field effect transistor ( SiC MOSFET). 如申請專利範圍第8項所述之智慧功率模組,其中,該碳化矽金屬氧化物半導體場效應電晶體更包括一與該碳化矽金屬氧化物半導體場效應電晶體並聯連接之飛輪二極體(freewheeling diode,FWD)。 The smart power module of claim 8, wherein the tantalum carbide metal oxide semiconductor field effect transistor further comprises a flywheel diode connected in parallel with the tantalum carbide metal oxide semiconductor field effect transistor. (freewheeling diode, FWD). 如申請專利範圍第1項所述之智慧功率模組,其中,該第一驅動單元、該第一寬能隙半導體功率單元、該第一調整單元、該第二驅動單元、該第二寬能隙半導體功率單元、以及該第二調整單元係整合在一單一封裝結構之中。 The smart power module of claim 1, wherein the first driving unit, the first wide-gap semiconductor power unit, the first adjusting unit, the second driving unit, and the second wide energy The slot semiconductor power unit and the second adjustment unit are integrated into a single package structure. 如申請專利範圍第1項所述之智慧功率模組,其中,該第一寬能隙半導體功率單元係以該第一閘極端連接該第一驅動單元;且該第二寬能隙半導體功率單元係以該第二閘極端連接該第二驅動單元。 The smart power module of claim 1, wherein the first wide-gap semiconductor power unit is connected to the first driving unit by the first gate terminal; and the second wide-gap semiconductor power unit The second driving unit is connected to the second gate terminal. 如申請專利範圍第1項所述之智慧功率模組,其中,該正壓與負壓交替的驅動電壓準位係介於20V至-10V之間。 The smart power module of claim 1, wherein the driving voltage level alternated between the positive pressure and the negative voltage is between 20V and -10V.
TW106132238A 2017-09-20 2017-09-20 Negative voltage gate driven smart power module TWI640151B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW106132238A TWI640151B (en) 2017-09-20 2017-09-20 Negative voltage gate driven smart power module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW106132238A TWI640151B (en) 2017-09-20 2017-09-20 Negative voltage gate driven smart power module

Publications (2)

Publication Number Publication Date
TWI640151B true TWI640151B (en) 2018-11-01
TW201916552A TW201916552A (en) 2019-04-16

Family

ID=65034482

Family Applications (1)

Application Number Title Priority Date Filing Date
TW106132238A TWI640151B (en) 2017-09-20 2017-09-20 Negative voltage gate driven smart power module

Country Status (1)

Country Link
TW (1) TWI640151B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI692187B (en) * 2018-12-24 2020-04-21 財團法人工業技術研究院 Driving apparatus

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200814522A (en) * 2006-09-07 2008-03-16 Beyond Innovation Tech Co Ltd Switching device, signal generator and driving system utilizing the same
TW201310906A (en) * 2011-08-19 2013-03-01 Yaskawa Denki Seisakusho Kk Gate drive circuit and power converter
US20140307495A1 (en) * 2013-04-15 2014-10-16 Denso Corporation Driver for target switching element and control system for machine using the same
US20150235932A1 (en) * 2010-12-13 2015-08-20 International Rectifier Corporation Compact Power Quad Flat No-Lead (PQFN) Package
US20150318189A1 (en) * 2012-11-15 2015-11-05 Mitsubishi Electric Corporation Power semiconductor module and method of manufacturing the same
US20160269007A1 (en) * 2013-10-31 2016-09-15 Toyota Jidosha Kabushiki Kaisha Semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200814522A (en) * 2006-09-07 2008-03-16 Beyond Innovation Tech Co Ltd Switching device, signal generator and driving system utilizing the same
US20150235932A1 (en) * 2010-12-13 2015-08-20 International Rectifier Corporation Compact Power Quad Flat No-Lead (PQFN) Package
TW201310906A (en) * 2011-08-19 2013-03-01 Yaskawa Denki Seisakusho Kk Gate drive circuit and power converter
US20150318189A1 (en) * 2012-11-15 2015-11-05 Mitsubishi Electric Corporation Power semiconductor module and method of manufacturing the same
US20140307495A1 (en) * 2013-04-15 2014-10-16 Denso Corporation Driver for target switching element and control system for machine using the same
US20160269007A1 (en) * 2013-10-31 2016-09-15 Toyota Jidosha Kabushiki Kaisha Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI692187B (en) * 2018-12-24 2020-04-21 財團法人工業技術研究院 Driving apparatus

Also Published As

Publication number Publication date
TW201916552A (en) 2019-04-16

Similar Documents

Publication Publication Date Title
US10749520B2 (en) Power circuit and power module using MISFET having control circuit disposed between gate and source
US10123443B2 (en) Semiconductor device
US9818686B2 (en) Semiconductor modules and methods of forming the same
US10784214B2 (en) Semiconductor module, electric automobile and power control unit
US8791662B2 (en) Power semiconductor module, electric-power conversion apparatus, and railway vehicle
JP5267616B2 (en) Drive control device
US6657874B2 (en) Semiconductor converter circuit and circuit module
US6249024B1 (en) Power module with repositioned positive and reduced inductance and capacitance
CN104011861B (en) The monolithic unit of integrated circuit and especially monolithic converting unit
CN106911250A (en) Electric power coversion system, power model and semiconductor devices
US11303203B2 (en) Semiconductor device
US10474178B2 (en) Power module and air conditioner
TWI640151B (en) Negative voltage gate driven smart power module
US10439606B2 (en) Semiconductor module
CN106298737B (en) Power module packaging structure and manufacturing method thereof
CN109600025B (en) Intelligent power module capable of being driven by negative-pressure grid electrode
WO2020078082A1 (en) Different-edge-connecting power electrode assembly and power module
US10396774B2 (en) Intelligent power module operable to be driven by negative gate voltage
US11398418B2 (en) Semiconductor module
US20240372475A1 (en) Power conversion circuit, power module, converter, and inverter
CN118538696A (en) Semiconductor device with a semiconductor device having a plurality of semiconductor chips
JP2014007189A (en) Semiconductor power module
CN110417257A (en) BUCK Sofe Switch module, BUCK circuit, "-" type and T font tri-level circuit