TWI633532B - Method and apparatus of grayscale image generation in monochrome display - Google Patents

Abstract

A method for driving a gray scale image display signal in a monochrome display panel, which allows monochromatic use without changing the resolution of a 1-bit digital analog converter (DAC) on a data line (SEG) The PMOLED display driver generates a grayscale pattern. The method also removes the additional frame buffer display memory required by conventional methods; it is achieved by exchanging display memory spaces that display image pixel color (grayscale) depth at the expense of display resolution. The method further allows only grayscale pattern data to be written to the frame buffer at a time without additional control from the host controller. In addition, the method also allows the dynamic application of the number of selectable grayscale scan lines to display a full grayscale image or a mixture of monochrome and grayscale images in a single display panel.

Description

Method for driving gray scale image display signal in monochrome display panel

The present invention relates to a technique for driving a light emitting diode (LED) including an organic light emitting diode (OLED) and a monochrome display to achieve a grayscale image effect.

Prior Art In existing monochrome passive matrix OLED (PMOLED) display applications, grayscale patterns or images need to be displayed for at least a short period of time to obtain a better visual effect, for example, displaying a trademark during device startup. It is not clear whether any existing display driver has a built-in mechanism that provides the above functionality. However, commercially available stand-alone grayscale image display drivers or modules provide this functionality in monochrome PMOLED displays. Typically, grayscale image display drives have full-size embedded memory and have more hardware than monochrome drives. When the grayscale image is stored in the memory, the grayscale image display driver can generate grayscale images by itself without additional external control. On the other hand, the monochrome image display driver or module works by writing image data to be displayed for each frame to the display driver and changing the picture playback rate control (FRC) to generate grayscale images. This involves complex control between the host controller and the display driver, for example: signal synchronization timing is required to prevent tearing effects.

Various embodiments are provided in accordance with the present invention in which one method allows for the generation of a monochrome PMOLED display driver without the need to change the resolution of a 1-bit digital analog converter (DAC) on a data line (SEG) Grayscale pattern. This method removes the extra frame buffer display memory required by conventional methods; it is achieved by exchanging the display memory space that displays the depth of the image's pixel color (grayscale) at the expense of display resolution. This method also allows grayscale pattern data to be written to the frame buffer at once without additional control from the host controller. In addition, the method allows for the dynamic application of the number of selectable grayscale scan lines to enable display of a full grayscale image or a mixture of monochrome and grayscale images in a single display panel. The present invention can also be used to improve grayscale image display drivers such that conventional grayscale image display drivers with n-bit DACs can be enhanced to produce more than ²ⁿ grayscales.

Advantages of a method and apparatus for generating grayscale images in displays and the like will be described below. Modifications, including additions and/or substitutions, may be made without departing from the scope and spirit of the invention. In order to avoid obscuring the present invention, specific details may be omitted, but the teachings of the present disclosure are intended to allow those skilled in the art to practice the teachings without undue experimentation.

Referring to Figures 1a and 1b, the operation of the PMOLED is illustrated. In the PMOLED display panel, the pixel has electrical characteristics of the diode, and when the voltage on the pixel is greater than the threshold voltage, the diode is turned on. The brightness of the pixels is also related to the amount of current flowing through the pixels, although the two are not linear. However, the brightness of a pixel is almost linearly proportional to its duty cycle, and the duty cycle corresponds to the duration in which the pixel is turned on. A common driving method for a PMOLED display panel involves precharging a pixel to its threshold voltage through a data line (SEG) at the beginning of each line of scanning; thereafter, driving current to the SEG to turn on the pixels.

To more clearly illustrate the invention, the embodiments described herein assume that parasitic resistance and parasitic capacitance in a PMOLED display panel are negligible. Therefore, it can be considered that the precharging of the pixels is completed in a time close to 0, and the luminance of the pixels in the primary line scanning is linearly proportional to the ON time of the pixels. In the rest of this article, the term "monochrome" means that the DAC on each data line SEG has a 1-bit resolution, and the pixels can only be in the OFF or ON state (although the brightness of the pixels is still The duration (eg, pulse width) or current amplitude of the drive signal waveform on the data line SEG is ON (high level). The term "gray scale" represented by a DAC SEG each having more than one resolution; therefore, can be obtained using an n-bit DAC 2 ⁿ grayscale levels, while the data line is driven by a driving signal SEG waveform pattern is 2 ^n, may be A brightness of 2 ⁿ is exhibited in each scan line.

Refer to Figures 2a and 2b. In the conventional monochrome driving method, the scanning line (COM) triggers the scanning line (COM) one by one in different time slots of one frame (for example, triggering COM(j) in the time slot j); thus, the state of the pixel on the data line SEG During the time slot j depends on the state of the data line SEG. For example, if SEG(i) is driven by an ON (high) waveform during time slot j, the pixel (i, j) is ON (on, for example, displayed in white) with a brightness of 100%; if SEG(i) +1) When the slot j+1 is driven by the OFF (low level) waveform, the pixel (i+1, j+1) is the OFF (off, for example, black) state of the luminance 0%.

Refer to Figures 3a and 3b. In a conventional gray-scale driving method, the scanning line COM is triggered one by one in different time slots of one frame (for example, COM(j) is triggered in the time slot j); thus, the state and brightness of the pixels on the data line SEG are in the time slot j. The period depends on the state and duty cycle of the data line SEG. For example, if SEG(i) is driven by an ON waveform with a duty cycle of 100% during time slot j, the pixel (i, j) is an ON state with a luminance of 100%; if SEG(i+1) is at time slot j During the period, driven by an ON waveform with a duty cycle of 50%, the pixel (i+1, j) is an ON state with a luminance of 50%; if SEG(i) is subjected to a duty ratio of 25% during the slot j+1 When the waveform is driven, the pixel (i, j+1) is an ON state with a brightness of 25%; and if SEG(i+1) is driven by the OFF waveform during the time slot j+1, the pixel (i+1, j) +1) is an OFF state with 0% brightness. In this case, each DAC on the data line SEG can be considered to have 2-bit resolution. The percentage of brightness reflects the depth of different gray levels, for example, 100% brightness is displayed in white, 0% brightness is displayed in black, and brightness is displayed as depth of different gray levels between 0% and 100%.

The method and apparatus provided by the present invention enable a monochrome display driver having a 1-bit DAC capable of driving a data line SEG to perform gray scale image display without requiring additional memory; thus, the display driver integrated body is not affected The chip size of the circuit (IC). The method and apparatus are also applicable to conventional gray scale display drivers, which have a good effect on increasing color depth. The concept of the present invention is that the T-bit memory used represents the gray level of each pixel in the same memory space for displaying material at the expense of display resolution. Therefore, in order to use the gray level of the T bit for each pixel, the resolution reduction factor T must be displayed according to the following formula: the new display resolution = M × (N / T), where M is the original display resolution The maximum number of rows, N is the maximum number of columns in the original display resolution.

The concept of the invention consists in triggering each scan line COM(j) in a plurality of time slots (T time slots) within each frame, where 0 ≤ j ≤ N-1, where N is the total number of scan lines (or The maximum number of columns of the original display resolution), T ≤ N. And each pixel (i, j) is driven by a plurality of driving signal waveform cycles on the data line SEG(i) in one frame, where 0≤i≤M-1, where M is the total number of data lines (or original display resolution) The maximum number of lines). Since the SEG(i) has different ON and OFF states during different time slots, which are controlled by the frame buffer, the pixels (i, j) can achieve different levels of brightness. In addition, if the waveform of the driving signal on the SEG is the same in each time slot, the number of gray levels available is T+1; and if the waveform of the driving signal on the SEG changes in a specific order in different time slots, The number of gray levels obtained is 2 ^T .

Refer to Figures 4a and 4b. According to a first embodiment of the present invention, a gray-scale image generating method for realizing 2-bit level 3 is provided. In the present embodiment, each scan line COM(j) is triggered during timeslots 2j and 2j+1. The state and brightness of the pixels (i, j) during the time slots 2j and 2j+1 depend on the ON/OFF state of the data line SEG(i). For example, if SEG(i) is driven by the OFF waveform during slot 2j and then by the ON waveform during slot 2j+1, the pixel (i, j) is the ON state with 100% brightness; if SEG(i+ 1) When the ON waveform is received during the time slot 2j and then driven by the OFF waveform during the time slot 2j+1, the pixel (i+1, j) is still in the ON state of 100% brightness; if SEG(i) is in time When the gap 2j+2 is subjected to the OFF waveform and then is driven by the OFF waveform during the slot 2j+3, the pixel (i, j+1) is the OFF state of the luminance 0%; and if the SEG(i+1) is When the gap 2j+2 period is subjected to the ON waveform and then is driven by the ON waveform during the time slot 2j+3, the pixel (i+1, j+1) is an ON state with a luminance of 200%.

Refer to Figures 5a and 5b. According to the second embodiment extended by the first embodiment, by triggering each scanning line COM(j) during a plurality of arbitrary time slots, the generation of 2-bit level 3 gray-scale images can also be realized. For example, the scan line COM(j-1) is triggered during time slot j-1, then triggered again at time slot p; the scan line COM(j) is triggered during time slot j, and then triggered again during time slot q; The scan line COM(j+1) is triggered during time slot j+1 and then triggered again during time slot r, rather than during successive time slots 2j and 2j+1. In the first and second embodiments, the luminance (or gray level) of the pixel is still determined by the total duration, or is determined by the total number of time slots of the ON waveform on the SEG driven to the pixel for a predetermined period of time. .

Refer to Figures 6a and 6b. According to a third embodiment, in order to achieve a greater number of gray levels, each scan line COM(j) will be triggered in a greater number of time slots than in the first two embodiments. For example, to achieve a 4-bit 5-level gray level, the scan line COM(j) can be triggered during time slots 4j, 4j+1, 4j+2, and 4j+3. Thus, the state and brightness of the pixels (i, j) depend on the ON/OFF state of the data line SEG(i) during the time slots 4j, 4j+1, 4j+2, and 4j+3. For example, if SEG(i) is driven by the OFF waveform during time slot 4j, it is driven by the OFF waveform during time slot 4j+1, then by the OFF waveform during time slot 4j+2, and then at time slot 4j+3. When the period is driven by the ON waveform, the pixel (i, j) is an ON state with a brightness of 100%; if SEG(i+1) is driven by the OFF waveform during the time slot 4j, the OFF waveform is received during the time slot 4j+1. The drive is then driven by the ON waveform during time slot 4j+2, and then driven by the ON waveform during time slot 4j+3, then the pixel (i+1, j) is an ON state with a brightness of 200%; if SEG(i ) is driven by the OFF waveform during time slot 4j+4, then by the ON waveform during time slot 4j+5, then by the ON waveform during time slot 4j+6, and then by the ON waveform during time slot 4j+7 When driving, the pixel (i, j+1) is an ON state with a luminance of 300%; and if SEG(i+1) is driven by an ON waveform during the time slot 4j+4, it is turned ON during the time slot 4j+5. The waveform drive is then driven by the ON waveform during time slot 4j+6, and then driven by the ON waveform in time slot 4j+7, then the pixel (i+1, j+1) is in an ON state with a brightness of 400%.

Refer to Figures 7a and 7b. According to the fourth embodiment, there is provided a method for realizing a 2-bit 4-level gray-scale image generation method. In this embodiment, each scan line COM(j) is triggered during timeslots 2j and 2j+1. Different from the first embodiment, the ON state driving signal waveform driven to the data line SEG during the odd (or even) time slot has a duty ratio of 50% or has a reduced current value corresponding to 50% pixel brightness. level. This can be considered a "half-ON" (rather than a "full-ON") state. Therefore, during an odd (or even) time slot, the data line SEG can be driven by the signal waveform of the OFF state or the signal waveform of the "half-ON" state, and the signal waveform of the OFF state during the other time slots or " The signal waveform of the all-ON state drives the data line SEG. For example, if SEG(i) is driven by the OFF waveform during time slot 2j and then by the "half-ON" waveform during time slot 2j+1, the pixel (i, j) is an ON state with a luminance of 50%; If SEG(i+1) is driven by the "full-ON" waveform during time slot 2j and then driven by the OFF waveform during time slot 2j+1, the pixel (i+1, j) is ON with 100% brightness. State; if SEG(i) is driven by the OFF waveform during time slot 2j+2 and then driven by another OFF waveform during time slot 2j+3, the pixel (i, j+1) is OFF of 0% of luminance State; if SEG(i+1) is driven by the "full-ON" waveform during time slot 2j+2, then by the "half-ON" waveform during time slot 2j+3, then the pixel (i+1) , j+1) is ON and has 150% brightness.

Refer to Figures 8a and 8b. According to the fifth embodiment, a method for generating a 4-bit 16-level gray-scale image is provided. In the fifth embodiment, during the time slot 4j+k, k=0, 1, 2, 3, 4, 5, 6, and 7, the ON state driving signal waveforms driven to the data line SEG have 100% respectively. Duty cycle or unreduced current level corresponding to 100% pixel brightness ("full-ON"), 50% duty cycle or reduced current level corresponding to 50% pixel brightness ("half- ON"), 25% duty cycle or reduced current level corresponding to 25% pixel brightness ("1/4-ON"), 12.5% duty cycle or corresponding to 12.5% pixel brightness Reduced current level ("1/8-ON") with 100% duty cycle or unreduced current level corresponding to 100% pixel brightness ("full-ON"), 50% duty Ratio or current level corresponding to a reduced 50% pixel brightness ("half-ON"), 25% duty cycle or reduced current level corresponding to 25% pixel brightness ("1/4-ON" "), a duty cycle of 12.5% or a reduced current level ("1/8-ON") corresponding to 12.5% pixel brightness. This provides 16 possible pixel brightness levels ranging from 0% to 187.5% with an increment of 12.5%. For example, if SEG(i) is driven by the OFF waveform during time slot 4j, it is driven by the OFF waveform during time slot 4j+1, then by the OFF waveform during time slot 4j+2, and then at time slot 4j+3. The period is driven by the "1/8-ON" waveform, and the pixel (i, j) is an ON state with a brightness of 12.5%; if SEG(i+1) is driven by the OFF waveform during the time slot 4j, then in the time slot 4j The +1 period is driven by the OFF waveform, then by the "1/4-ON" waveform during time slot 4j+2, and then by the "1/8-ON" waveform during time slot 4j+3, then the pixel ( i+1, j) is an ON state with a brightness of 37.5%; if SEG(i) is driven by the OFF waveform during time slot 4j+4, and then driven by the "half-ON" waveform during time slot 4j+5, then The time slot 4j+6 is driven by the "1/4-ON" waveform, and then driven by "1/8-ON" during the time slot 4j+7, then the pixel (i, j+1) is 87.5% of the luminance. ON state; if SEG(i+1) is driven by the "full-ON" waveform during time slot 4j+4, then by the "half-ON" waveform during time slot 4j+5, then in time slot 4j+ The 6 period is driven by the "1/4-ON" waveform, and then driven by the "1/8-ON" waveform during the time slot 4j+7, then the pixel (i+1, j+1) is the luminance 187. 5% ON state.

Refer to Figure 9. In any of the foregoing embodiments, the grayscale image may not need to occupy the entire screen of the PMOLED display panel. Part of the screen can be dedicated to grayscale image display, and the rest can be used for monochrome image display. Assuming that no additional display memory is used, since the grayscale image color depth (gray class) information requires a certain memory space, it is necessary to reserve a part of the space in the display memory for the grayscale image pixel color depth information. This part of the reserved display memory space cannot be used for image display, so there is a non-display area in the PMOLED display panel. Further assume that the resolution of the PMOLED display panel is M rows × N columns; if the gray scale image (GS region) display uses the K column therein, and the gray scale image is generated using T time slots (T bits), then (K * (T – 1)) The column belongs to the non-display area, and the (N – (K * T)) column can be used for monochrome image display.

Refer to Figure 10. The reserved space portion of the display memory for memorizing the grayscale image pixel color depth information may be separated into a plurality of portions corresponding to a plurality of regions selectively distributed throughout the PMOLED display panel. Therefore, the viewer can see the complete PMOLED display panel with both monochrome image and grayscale image displayed, instead of the reduced PMOLED display panel with obvious non-display area, which causes the space to shrink due to display memory. The body is used to memorize the reserved space portion of the grayscale image pixel color depth.

The invention can also be used to improve gray scale image display drivers. Recall that the grayscale image display driver is based on the principle that each data line SEG is driven by one of 2 ⁿ drive signal waveform patterns representing 2 ⁿ brightness in each scan line. In an exemplary embodiment corresponding to Figures 11a and 11b, the original unmodified grayscale image display driver has a 2-bit DAC, thus capable of producing 0%, 33.3%, 66.6%, and 100% brightness of four A picture of the gray class. Applying the technique of the present invention to the gray scale image display driver, each scan line COM(j) is triggered in a plurality of time slots (T time slots) within each frame (in the present exemplary embodiment, T = 2). This allows the different possible gray levels of pixels to now depend on the sum of the different SEG drive signal waveform patterns during multiple COM triggered time slots within each frame. Thus the maximum number of gray levels is equal to: (Y - 1) * T + 1, where Y is the number of original gray levels that can be generated, and T is the number of time slots that a scan line COM can be triggered in each frame. In the exemplary embodiment, Y is equal to 4 and T is equal to 2, so a total of seven gray levels at 0%, 33.3%, 66.6%, 100%, 133.3%, 166.6%, and 200% brightness can be generated.

See Figures 12a and 12b. In another embodiment in which the present invention is applied to a gray scale image display driver, each scan line COM(j) is triggered in two time slots within each frame. One of the time slots (odd or even) is dedicated to allow each data line SEG to be driven by one of 2 ⁿ drive signal waveform patterns representing 2 ⁿ brightness that can be produced by the original unmodified gray scale image display driver. Y is used to represent the number of gray levels that can be produced originally. The possible pixel gray levels corresponding to these odd or even time slots are: 0%, 1/(Y-1) * 100%, 2/(Y-1) * 100% ..., (Y-1) / (Y-1) * 100% brightness. Another slot (even or odd) is dedicated to allowing each one of the data lines SEG current level by a duty cycle having a shortened or reduced (by a factor of the amplitude Y) of the 2 ⁿ drive signals driving waveform pattern. Y is used to represent the number of gray levels that can be generated originally. The possible pixel gray levels corresponding to these odd or even time slots are: 0%, 1/(Y-1)/Y * 100%, 2/(Y-1 ) /Y * 100%,...,(Y-1)/(Y-1)/Y * 100% brightness. This makes the different possible gray levels of pixels now depend on the sum of the different SEG drive signal waveform patterns during multiple COM trigger slots in each frame, and the maximum number of gray levels is equal to: Y ^T , where Y is generated The original gray level number, and T is the number of time slots that a scan line COM can be triggered in each frame. In the present exemplary embodiment, the original gray level Y that can be generated is equal to 4, and T is equal to 2, and the maximum number of gray levels that can be generated is 16, which are: 0%, 8.33%, 16.66%, 25%, 33.33%, 41.66%, 50%, 58.33%, 66.66%, 75%, 83.33%, 91.66%, 100%, 108.33%, 116.66% and 125% brightness.

While embodiments of the multi-phase constant current topology described above are applied to OLED light sources, those of ordinary skill in the art will appreciate that the same inventive concepts can be applied to applications such as those employing LED light sources.

Embodiments disclosed herein may be implemented using general purpose or special purpose computing devices, computer processors, or electronic circuits, including but not limited to digital signal processors (DSPs), dedicated integrated circuits (ASICs), field programmable gate arrays ( FPGA) and other programmable logic devices configured or programmed in accordance with the teachings of the present application. Based on the teachings of the present application, one of ordinary skill in the software or electronics arts can readily implement computer or software code running in a general purpose or special purpose computing device, computer processor, or programmable logic device.

In some embodiments, the invention includes a computer memory medium in which memory, such as computer instructions or software code, can be used to program a computer or microprocessor to perform any of the processes of the present invention. Memory media includes, but is not limited to, ROM, RAM, flash memory devices, or any type of media or device suitable for memorizing instructions, code, and/or material.

The present invention has been described in detail with reference to the preferred embodiments of the present invention, which is not intended to limit the invention, and various modifications and changes can be made without departing from the spirit and scope of the invention. The scope of the invention is intended to be within the scope of the invention, and the scope of the invention is defined by the scope of the appended patent application.

Embodiments of the invention are described in more detail below with reference to the drawings in which:

1a is a pixel circuit diagram of a conventional PMOLED display panel; FIG. 1b is a timing diagram corresponding to a data signal and a scan line of a conventional PMOLED display panel according to a driving signal of a typical signal driving method;

2a is an exemplary timing diagram of a driving signal according to a conventional monochrome image-only signal generating method on a data line and a scanning line of a conventional PMOLED display panel; and FIG. 2b is a drawing corresponding to a driving signal shown in FIG. 2a. State diagram of prime

Figure 3a is an exemplary timing diagram of a driving signal according to a conventional gray-scale image generation signal driving method on a data line and a scanning line of a conventional PMOLED display panel; Figure 3b is a pixel corresponding to the driving signal shown in Figure 3a. State diagram;

4A is an exemplary timing diagram of a driving signal of a gray scale image generation signal driving method according to a first embodiment of the present invention on a data line and a scanning line of a conventional PMOLED display panel; FIG. 4b is a driving diagram of FIG. 4a a state diagram of the pixel corresponding to the signal;

5A is an exemplary timing diagram of a driving signal of a gray scale image generation signal driving method according to a second embodiment of the present invention on a data line and a scanning line of a conventional PMOLED display panel; FIG. 5b is a driving diagram shown in FIG. 5a a state diagram of the pixel corresponding to the signal;

6a is an exemplary timing diagram of a driving signal of a gray-scale image generation signal driving method according to a third embodiment of the present invention on a data line and a scanning line of a conventional PMOLED display panel; FIG. 6b is a driving diagram shown in FIG. 6a a state diagram of the pixel corresponding to the signal;

FIG. 7a is an exemplary timing diagram of driving signals of a gray scale image generation signal driving method according to a fourth embodiment of the present invention on a data line and a scanning line of a conventional PMOLED display panel; FIG. 7b is a driving diagram of FIG. 7a a state diagram of the pixel corresponding to the signal;

8A is an exemplary timing diagram of a driving signal of a gray scale image generation signal driving method according to a fifth embodiment of the present invention on a data line and a scanning line of a conventional PMOLED display panel; FIG. 8b is a driving diagram shown in FIG. 8a a state diagram of the pixel corresponding to the signal;

FIG. 9 is a schematic diagram showing mixed display of monochrome and grayscale images in a single display panel according to various embodiments of the present invention; FIG.

FIG. 10 is another schematic diagram of mixing and displaying monochrome and grayscale images in a single display panel according to various embodiments of the present invention; FIG.

11A is an exemplary timing diagram of driving signals of a grayscale image generation signal driving scheme applied to a 2-bit grayscale image display driver on a data line and a scanning line of a conventional PMOLED display panel according to an embodiment of the present invention; And FIG. 11b shows the state of the pixel corresponding to the driving signal shown in FIG. 11a;

FIG. 12a is an exemplary timing diagram of driving signals of a gray-scale image generation signal driving scheme applied to a 2-bit gray-scale image display driver according to another embodiment of the present invention on a data line and a scanning line of a conventional PMOLED display panel. And Fig. 12b shows the state of the pixel corresponding to the drive signal shown in Fig. 12a.

Claims (16)

A method for driving a grayscale image display signal in a monochrome display panel, comprising: triggering each scan line in T time slots in each frame, wherein only one scan line is triggered in any one time slot, Where T is the number of time slots in which the scan line can be triggered in each frame; each data line is driven by a high or low level drive signal waveform period during each time slot within each frame, wherein All of the high level drive signal waveform periods have the same signal waveform duty cycle and current amplitude; wherein the luminance of the pixels is the time slot of the corresponding high level drive signal waveform period connected to the data line of the pixel The total number is determined; and wherein the grayscale imagery grayscale information is stored in the display memory space, and the grayscale imagery grayscale information is shared with the image display material to share the display memory space. The method of claim 1, wherein the display memory space is fixed for the original display resolution of the monochrome display panel, such that the display resolution is lowered to conform to the grayscale image pixel gray. The class information, the gray scale image pixel gray level information memory is in a part of the space reserved by the display memory space for the gray scale image pixel gray level information. The method of claim 2, wherein the display memory space is reserved for the grayscale image pixel grayscale information and is separated into a plurality of regions distributed over the entire display panel. Multiple parts. The method of claim 1, wherein each scan line is in each frame Triggered in the inner T consecutive time slots. The method of claim 1, wherein each scan line is triggered in non-contiguous T time slots within each frame. A method for driving a grayscale image display signal in a monochrome display panel, comprising: triggering each scan line in T time slots in each frame, wherein only one scan line is triggered in any one time slot, Where T is the number of time slots in which the scan line can be triggered in each frame; each data line is driven by a high or low level drive signal waveform period during each time slot within each frame, wherein The high-level drive signal waveform periods in different time slots are changed in a specific order in terms of signal waveform duty or current amplitude; wherein the luminance of the pixels is driven by a corresponding high level connected to the data line of the pixel The total number of time slots of the signal waveform period is determined; and wherein the gray scale image pixel gray level information is stored in the display memory space, and the gray scale image pixel gray level information and the image display material share the display memory space. The method of claim 6, wherein the display memory space is fixed for the original display resolution of the monochrome display panel, such that the display resolution is lowered to conform to the grayscale image pixel gray. The class information, the gray scale image pixel gray level information memory is in a part of the space reserved by the display memory space for the gray scale image pixel gray level information. The method of claim 7, wherein the portion of the display memory space reserved for the grayscale image pixel grayscale information is separated into corresponding regions distributed over the entire display panel. Multiple parts. The method of claim 6, wherein each scan line is triggered in T consecutive time slots within each frame. The method of claim 6, wherein each scan line is triggered in non-contiguous T time slots within each frame. A method for driving a grayscale image display signal in a display panel, comprising: triggering each scan line in T time slots in each frame, wherein only one scan line is triggered in any one time slot, wherein T is greater than 1; driving each data line by one of Y different drive signal waveforms during each time slot within each frame, wherein each of the Y different drive signal waveforms corresponds to a possible pixel gray level, Where Y is the number of original gray levels that can be generated; wherein the brightness of the pixels is determined by the sum of the drive signal waveforms driving the drive signal connected to the data line connected to the pixel during the triggered scan line time slot; Wherein, the Y different driving signal waveforms may have current levels that decrease corresponding to different percentages of pixel brightness. The method of claim 11, wherein each scan line is triggered in T consecutive time slots within each frame. The method of claim 11, wherein each scan line is triggered in non-contiguous T time slots within each frame. A method for driving a grayscale image display signal in a display panel, comprising: triggering each scan line in two time slots in each frame, wherein only one scan line is triggered in any one time slot; Each of the data lines is driven by one of Y different drive signal waveforms during a first time slot within each frame, wherein each of the Y different drive signal waveforms corresponds to a possible pixel gray level, where Y Is the number of original gray levels that can be generated; driving each data line by one of Y different drive signal waveforms whose amplitude is divided by the factor Y during the second time slot within each frame; wherein the brightness of the pixel is The sum of the drive signal waveform drives driven on the data line connected to the pixel during the triggered scan line time slot is determined. The method of claim 14, wherein each scan line is triggered in T consecutive time slots within each frame, where T is the number of time slots in which the scan line can be triggered within each frame. The method of claim 14, wherein each scan line is triggered in a non-contiguous T time slots within each frame, wherein T is a time slot in which the scan line can be triggered within each frame number.