TWI588968B - Display panel and method of manufacturing same - Google Patents

Description

Display panel and method of manufacturing same

The present invention relates to a display panel and a method of fabricating the same, and more particularly to a transistor array substrate structure and a method of fabricating the same.

Electronic products with display panels, including smart phones, tablets, notebooks, monitors, and televisions, whether for work or study or personal entertainment. Many related products are already indispensable for modern people. Among them, the liquid crystal display panel which is simple, light, portable, and low-priced is most widely used. The liquid crystal display panel also provides a variety of options including size, shape, resolution, and the like.

The copper process is a commonly used process technology for large-size display panels, and a semiconductor (such as indium gallium zinc oxide, IGZO) is used as an active layer of a thin film transistor (such as IGZO TFT) in the substrate of the display panel due to high field effect movement. The feasibility of the rate and large-area process is greatly advantageous for large-size display devices. At present, when copper is used as the metal wire, due to its poor adhesion to the underlying insulating film, an intermediate metal layer (such as molybdenum) is added between the copper and the insulating layer to increase the adhesion between the metal and the insulating layer. On the other hand, the intervening metal layer can act as a diffusion barrier to prevent copper ions from entering the active layer and affecting component reliability. The combination of common metal wires and intermediate metal layers is: copper/molybdenum (Cu/Mo), copper/titanium (Cu/Ti), and copper/molybdenum titanium alloy (Cu/Mo:Ti). In the IGZO thin film transistor structure, when the active layer is an IGZO layer, when a metal such as molybdenum or titanium contacts IGZO, it is easy to grab oxygen in the IGZO to cause a change in conductivity of the active layer. Therefore, prior to the completion of the definition of the second metal layer (ie, the formation of the source drain) and the deposition of a protective layer such as yttrium oxide (SiOx) on the second metal layer, the current process uses a nitrogen oxide (N ₂ O) plasma pair. The surface of the active layer is surface treated to supplement oxygen, but this step is also prone to severe oxidation of the copper wire surface.

The invention relates to a display panel and a manufacturing method thereof. The structure of the transistor array substrate prevents the metal ions of the wire from entering the active layer and changes the electronic characteristics of the component, thereby affecting the reliability of the component, but avoiding the surface of the wire in the process. Oxidation occurs.

According to the present invention, a display panel includes a first substrate, a second substrate disposed opposite the first substrate, and a display medium layer disposed between the first substrate and the second substrate. The first substrate includes a plurality of staggered first wires, a plurality of second wires, and a plurality of transistors disposed on a substrate to define a plurality of pixel regions, and the first wires and the second wires are respectively in the first direction And extending in the second direction. The transistor of each pixel region includes: one gate electrode disposed on the substrate, one first insulating layer disposed on the gate electrode, one active layer disposed on the first insulating layer, and disposed on the active layer And electrically connecting one of the first electrode and the second electrode to the active layer. The active layer includes a channel region, and the channel region is located at the first electrode and Between the second electrodes. The first electrode is composed of a double-layer light-transmitting conductive material, and includes a first light-transmissive conductive material layer formed on the active layer and a second light-transmitting conductive material layer formed on the first light-transmitting conductive material layer, wherein The second wire connected to the electrode includes a third light-transmissive conductive material layer, a metal layer and a fourth light-transmitting conductive material layer, and the metal layer is disposed on the third light-transmitting conductive material layer and the fourth light-transmitting conductive material layer between. In one embodiment, the first light-transmissive conductive material layer and the second light-transmissive conductive material layer of the first electrode of each pixel region extend to the metal layer of the corresponding second wire and cover the metal layer to form respectively. a third light-transmissive conductive material layer and a fourth light-transmitting conductive material layer.

According to the present invention, a method of manufacturing a display panel includes forming a first substrate, providing a second substrate and pairing the first substrate, and providing a display dielectric layer between the first substrate and the second substrate. The forming the first substrate includes: forming a first metal layer on a substrate, patterning the first metal layer to form a plurality of first wires and a plurality of gate electrodes, the first wires extending in a first direction and connecting the phases Corresponding gate electrode; forming a first insulating layer covering the gate electrodes and the first wires; forming a plurality of active layers on the first insulating layer; forming a first transparent conductive material layer in the first Forming a plurality of metal layers on the first light-transmissive conductive material layer; forming a second light-transmitting conductive material layer on the metal layer and the first light-transmitting conductive material layer; patterning the first light-transmitting conductive layer The material layer and the second light-transmissive conductive material layer form a plurality of second wires on the substrate and extend in the second direction, the plurality of first electrodes and the plurality of second electrodes, wherein each of the second wires comprises a first through a first light-transmissive conductive layer formed by the photoconductive material layer, a metal layer, and a second light-transmitting guide a second light-transmissive conductive layer formed by the layer of electrical material, and the second wires are staggered with the first wires to define a plurality of pixel regions; wherein the first electrode and the second electrode are in each pixel region On the active layer, and the channel region is between the first electrode and the second electrode. The first electrode is composed of a first light-transmissive conductive material layer and a second light-transmitting conductive material layer.

In order to provide a better understanding of the above and other aspects of the present invention, the following detailed description of the embodiments and the accompanying drawings

S1‧‧‧ first substrate

10‧‧‧Substrate

12‧‧‧ gate electrode

13‧‧‧First insulation

14‧‧‧Active layer

A _CH ‧‧‧ passage area

141‧‧‧Top surface of the active layer

E1‧‧‧first electrode

E2‧‧‧second electrode

151‧‧‧First light-transmissive conductive material layer

152‧‧‧Second light-transmissive conductive material layer

15E‧‧‧Extension

16‧‧‧metal layer

160‧‧‧ underside of the metal layer

161, 162‧‧‧ side walls of metal layers

163‧‧‧Top surface of the metal layer

17‧‧‧ etching barrier

18‧‧‧Second insulation

19‧‧‧ Third insulation

19h‧‧‧ hole

PE‧‧‧ pixel electrode

SL‧‧‧ scan line

DL‧‧‧ data line

PX‧‧‧ pixel area

D _E ‧‧‧Extended width

17h ₁ ‧‧‧First opening

17h ₂ ‧‧‧second opening

D _C1 ‧‧‧first contact width

D _C2 ‧‧‧second contact width

S2‧‧‧second substrate

LC‧‧‧Liquid layer

D1‧‧‧ first direction

D2‧‧‧ second direction

FIG. 1A is a simplified plan view showing a substrate of a display panel in the first embodiment.

Fig. 1B is a partial enlarged view of the circled portion in Fig. 1A.

1C is a cross-sectional view showing the display panel of the first embodiment along a section line 1C-1C of FIG. 1B.

2A-2F is a schematic flow chart showing the fabrication of the transistor array substrate of the display panel of the first embodiment.

3 is a cross-sectional view showing another substrate of the display panel of the first embodiment of the present disclosure.

4 is a cross-sectional view showing a substrate of a display panel according to a second embodiment of the present invention.

FIG. 5 is a cross-sectional view showing another substrate of the display panel of the second embodiment of the present disclosure.

Embodiments of the present disclosure provide a display panel with a special structural design of a transistor array substrate, wherein a wire (for example, metallic copper) includes a side surface covered with a light-transmitting conductive material, and the thus obtained wire (for example, a data line) Copper oxidation can be avoided. Furthermore, the electrodes in the respective pixel regions, such as the source electrode and the drain electrode, are composed only of the light-transmitting conductive material, so that the diffusion of copper to the active layer can be prevented to cause a change in electronic characteristics. The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings. The embodiments of the present disclosure are applicable to display panels having different shapes of transistor array substrates, such as a back channel etched type transistor (BCE-type TFT) array substrate and an etch stop type transistor (Etch Stop-type TFT) array. A liquid crystal display panel such as a substrate. It should be noted that the structures and contents of the embodiments proposed in the embodiments are for illustrative purposes only. The disclosure does not show all possible embodiments, and the structure of the embodiments may be modified and modified to meet the needs of practical applications without departing from the spirit and scope of the disclosure. Therefore, other implementations not presented in the present disclosure may also be applicable. In addition, the drawings have been simplified to clearly illustrate the contents of the embodiments, and the dimensional ratios in the drawings are not drawn in proportion to actual products. Therefore, the description and illustration are for illustrative purposes only and are not intended to be limiting. In the embodiments, the same or similar reference numerals are used to designate the same or similar parts.

In addition, the terms used in the specification and the claims, such as "first", "second", "third" and the like, are used to modify the elements of the claim, which are not intended to represent any of the claim elements. The previous ordinal does not represent the order of a request element and another request element, or the order of the manufacturing method. The use of only one request element with a certain name can be clearly distinguished from another request element with the same name.

<First Embodiment>

The first embodiment is described with a display panel of a back channel etched type transistor array substrate. FIG. 1A is a simplified plan view showing a substrate of a display panel in the first embodiment. Fig. 1B is a partial enlarged view of the circled portion in Fig. 1A. 1C is a cross-sectional view showing the display panel of the first embodiment along a section line 1C-1C of FIG. 1B. Please also refer to Figure 1A-1C.

As shown in FIGS. 1A and 1B, the display panel of the embodiment includes an array substrate including a plurality of first wires such as scan lines SL and a plurality of second wires such as data lines DL interlaced to define a plurality of pictures of the array. The region PX, wherein the first wire (for example, the scanning line SL) extends in the first direction D1 (ie, the X direction), and the second wire such as the data line DL extends in the second direction D2 (ie, the Y direction). Each of the pixel regions PX includes at least one switching element such as a thin film transistor to independently control the associated pixel region PX.

As shown in FIG. 1C, the display panel of an embodiment includes a first substrate S1, a second substrate S2 disposed opposite to the first substrate S1, and a display medium disposed between the first substrate S1 and the second substrate S2. Floor. In the first embodiment, the first substrate S1 is, for example, a transistor array substrate, the second substrate S2 is, for example, a color filter substrate, and the display medium layer is, for example, a liquid crystal layer LC. The first embodiment is characterized in that the source electrode and the drain electrode are directly formed on the semiconductor layer (ie active layer) and are located on both sides of the channel region A _CH as an example of the structure of the first substrate S1.

As shown in FIG. 1C, one of the plurality of transistors disposed on a substrate 10 includes a gate electrode 12 (for example, metallic copper or other suitable metal material) disposed on the substrate 10, a first The insulating layer 13 is disposed on the gate electrode 12, an active layer 14 (ie semiconductor layer) is disposed on the first insulating layer 13 and the active layer 14 includes a channel region A _CH and a first electrode E1 (eg, a source electrode) And a second electrode E2 (for example, a drain electrode) is disposed on the active layer 14, and the channel region A _CH is located between the first electrode E1 and the second electrode E2. In one embodiment, the material of the active layer 14 comprises an oxide semiconductor (or metal oxide semiconductor), such as zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc oxide (indium gallium zinc oxide). Indium gallium zinc oxide, IGZO). In addition, the transistor further includes a second insulating layer 18 covering the first electrode E1 and the second electrode E2, and a third insulating layer 19 on the second insulating layer 18. It is to be noted that the second insulating layer 18 and the third insulating layer 19 may be composed of a single layer, a double layer, or a film layer of two or more layers. For example, in the embodiment, the second insulating layer 18 includes yttrium oxide. And two layers of tantalum nitride. In the pixel region, a pixel electrode PE (such as ITO) is electrically connected to the second electrode E2 through the holes 19h of the second insulating layer 18 and the third insulating layer 19, as shown in FIGS. 1B and 1C. Shown.

The disclosure is not limited to the detailed structure shown in FIGS. 1A-1C. For example, in the first embodiment, the first direction D1 is perpendicular to the second direction D2, but in other embodiments, the first direction D1 is also An angle may be formed with the second direction D2, which is, for example, between 75 and 90 degrees. Furthermore, the second substrate S2 also omits other components to clearly show the disclosure.

According to the disclosure, in the display area of the display panel, the first electrode E1 (eg, the source electrode) and the second electrode E2 (eg, the drain electrode) are composed of a light-transmitting conductive material; and are connected to one of the two electrodes. The wire, such as the data line DL, consists of a metal layer and two layers of light-transmissive conductive material. In the first embodiment, the first electrode E1 (eg, the source electrode) is composed of a double-layer transparent conductive material, including a first light-transmissive conductive material layer 151 formed over the active layer 14, and a second light-transmitting conductive material. The layer 152 is formed on the first light-transmitting conductive material layer 151. The second wire connected to the first electrode E1, such as the data line DL, includes a third light-transmissive conductive material layer, a metal layer 16 and a fourth light-transmitting conductive material layer, and the metal layer 16 is disposed on the third light-transmitting conductive layer. Between the material layer and the fourth light-transmissive conductive material layer; and in an embodiment, the first light-transmitting conductive material layer 151 and the second light-transmitting conductive material layer 152 of the first electrode E1 of each pixel region extend to Corresponding to the metal layer 16 of the second wire and covering the metal layer 16 to form a third light-transmissive conductive material layer and a fourth light-transmitting conductive material layer, respectively. As shown in FIG. 1C, the second wire, such as the data line DL, includes a metal layer 16 disposed between the first light-transmissive conductive material layer 151 and the second light-transmitting conductive material layer 152. Similarly, the second electrode E2 (ex-electrode electrode) is also composed of a first light-transmitting conductive material layer 151 formed over the active layer 14 and a second light-transmitting conductive material layer formed on the first light-transmitting conductive material layer 151. 152 composition. It should be noted that, although the first electrode E1 and the second electrode E2 of the embodiment both include the first light-transmitting conductive material layer 151 and the second light-transmitting conductive material layer 152, the first electrode E1 and the second electrode E2 are There is no physical connection between them.

As shown in FIG. 1C, the first electrode E1 of each pixel region is the first The light-transmissive conductive material layer 151 and the second light-transmitting conductive material layer 152 extend to the corresponding metal layer 16 and coat the metal layer 16 to form a second wire such as the data line DL. The metal layer 16 is formed on the first light-transmissive conductive material layer 151, and the bottom surface 160 including the metal layer 16 is in direct contact with the first light-transmitting conductive material layer 151; and the second light-transmitting conductive material layer 152 is formed on the metal layer. On the 16th, the side walls 161, 162 and the upper surface 163 of the metal layer 16 are directly contacted and covered.

In one embodiment, the first light-transmissive conductive material layer 151 and the second light-transmitting conductive material layer 152 are metal oxides, such as, but not limited to, IZO or ITO material layers, and the first light-transmitting conductive material layer The same or different light-transmitting conductive materials may be used for the 151 and the second light-transmitting conductive material layer 152. In one embodiment, the metal layer 16 is, for example, a metal copper layer, so that the source electrode and the drain electrode are composed of only a light-transmitting conductive material (ex: IZO) in each pixel region (that is, there is no metal on the active layer 14). Material layer), but the data line DL is composed of a light-transmissive conductive material coated with metallic copper (ex: IZO/Cu/IZO).

Moreover, at the data line DL, the metal layer 16 includes two opposite sidewalls 161 and 162 adjacent to and away from the active layer 14, respectively. The first light-transmissive conductive material layer 151 and the second light-transmissive conductive material layer 152 are combined at the side wall 162 of the metal layer 16 away from the active layer 14 to form an extension portion 15E having an extended width D _E . In one embodiment, the extension width D _{E is in} the range of about 0.1 μm to 4 μm. It is to be understood by those skilled in the art that the foregoing numerical values and ranges are set forth as examples and references, and may be appropriately selected depending on the specifications of the application. Therefore, the values and ranges are for reference purposes and are not intended to limit the disclosure.

2A-2F is a schematic flow chart showing the fabrication of the transistor array substrate of the display panel of the first embodiment. It is also possible to refer to Figure 1A-1C at the same time. The same elements in the 2A-2F and 1A-1C drawings are denoted by the same reference numerals for clarity. As shown in FIG. 2A, a substrate 10 is first provided, and a first metal layer is formed on the substrate 10 and the first metal layer is patterned to define a plurality of first wires parallel to each other, such as a scan line SL. And defining a gate electrode 12, wherein the scan line SL extends in the first direction D1 (X direction). This first metal layer can also be referred to as a gate metal wire. This wire can be copper metal or other metal material with low electrical resistance.

As shown in FIG. 2B, the first insulating layer 13 is formed on the substrate and covers the gate electrode 12, wherein the first insulating layer 13 is entirely plated and serves as a gate insulating layer. Next, an oxide semiconductor layer is plated and a development etching process is performed to form a plurality of active layers 14 on the first insulating layer 13. The material of the oxide semiconductor layer generally refers to a semiconductor material that is ionically bonded, such as zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), or other suitable materials.

Thereafter, a first light-transmissive conductive material layer 151 (such as IZO) is plated over the entire insulating layer and the active layer 14; and is plated with a metal (such as copper metal) and defines a metal trace region, including In addition to the channel region, the pixel region, and other metals that do not require the wire region, the traces of the plurality of metal layers 16 are formed, and the first light-transmissive conductive material layer 151 is entirely left as shown in FIG. 2C.

Then, the entire surface of the second light-transmissive conductive material layer 152 (such as IZO) is covered on the first light-transmissive conductive material layer 151, and the second light-transmissive conductive material layer 152 covers the metal layer 16 and is transparent to the first layer. The photoconductive material layer 151 and the second light-transmissive conductive material layer 152 are simultaneously patterned to define a metal wiring region including a source region, a drain region and a metal layer 16 of the thin film transistor, and a side surface 161 of the metal layer 16, 162 is also covered by the second light-transmissive conductive material layer 152 as shown in FIG. 2D. Moreover, in the defining step, the channel area A _CH in each pixel area is also exposed to the upper surface of the corresponding active layer 14. Therefore, the second wire of the foregoing (FIG. 1C), such as the data line DL, is covered with the first light-transmissive conductive material layer 151 and the second light-transmitting conductive material layer 152 (the material is, for example, IZO/Cu/IZO). composition. From the top view, the area of the transparent conductive layer (such as the second light-transmissive conductive material layer 152) is larger than the area of the metal layer 16 (ex: copper wire).

Thereafter, a second insulating layer 18 and a third insulating layer 19 are formed over the second light-transmissive conductive material layer 152 (as an insulating protective layer), and a contact hole is defined, for example, a hole 19h is formed through the third insulating layer 19 And a second insulating layer 18 to expose the upper surface of the second light-transmissive conductive material layer 152 of the second electrode E2, as shown in FIG. 2E.

A pixel electrode layer (material such as ITO) is plated in each pixel region to form a pixel electrode PE as shown in FIG. 2F, wherein the pixel electrode PE is transmitted through the hole 19h (for example, with the second light-transmitting conductive layer). The material layer 152 is in contact with) and electrically connected to the second electrode E2.

After the first substrate S1 is completed as described above, it is paired with the second substrate S2 (FIG. 1C), and a display dielectric layer (such as the liquid crystal layer LC shown in FIG. 1C) is provided on the first substrate S1 and the second substrate. Between S2, the production of the display panel is completed.

In addition, as shown in FIG. 1C, the first light-transmissive conductive material layer 151 of the first electrode E1 has a first contact width D _C1 with the upper surface 141 of the active layer 14 and the first light-transmitting conductive material of the second electrode E2. The layer 151 has a second contact width D _C2 with the upper surface 141 of the active layer 14, and the first contact width D _C1 may be the same as the second contact width D _C2 .

However, the disclosure is not limited to this, and the contact width on both sides may be varied to make it different. 3 is a cross-sectional view showing another substrate of the display panel of the first embodiment of the present disclosure. In another embodiment, the first contact width D _C1 is different from the second contact width D _C2 . The design is such that the gate/pixel electrode capacitance (Cg pixel) is large, the gate/drain capacitance (Cgd) is small, and the smaller gate/drain capacitance reduces the data line capacitance (Cdata).

<Second embodiment>

4 is a cross-sectional view showing a substrate of a display panel according to a second embodiment of the present invention. The second embodiment will be described with a display panel of an Etch Stop-type TFT array substrate. The same components in Fig. 4 and Fig. 1C are denoted by the same reference numerals for clarity of explanation. For details of the structure, material, and arrangement of the components of the second embodiment and the first embodiment, refer to the foregoing, and no further details are provided herein.

In the second embodiment, different from the first embodiment, the transistor of each pixel region further includes an etch barrier layer 17 between the active layer 14 and the first electrode E1 and the second electrode E2, and is etched and blocked. The layer 17 has a first opening 17h ₁ and a second opening 17h ₂ at the first electrode E1 and the second electrode E2, respectively. In the second embodiment, the first light-transmitting conductive material layer 151 is in contact with the active layer 14 via the first opening 17h ₁ and the second opening 17h ₂ . The width of the two openings determines the contact width of the first light-transmissive conductive material layer 151 and the upper surface 141 of the active layer 14. That is, the first light-transmissive conductive material layer 151 of the first electrode E1 and the upper surface 141 of the active layer 14 have a first contact width D _C1 (corresponding to the size of the first opening 17h ₁ ), and the first of the second electrode E2 The light-transmitting conductive material layer 151 and the upper surface 141 of the active layer 14 have a second contact width D _C2 (corresponding to the size of the second opening 17h ₂ ). In addition, the thickness of the active layer 14 corresponding to the first opening 17h ₁ and the second opening 17h ₂ is smaller than the thickness of the channel region A _CH .

As shown in FIG. 4, the first opening 17h ₁ may be identical to the second opening 17h ₂ ; that is, the first contact width D _C1 may be the same as the second contact width D _C2 . Of course, the disclosure is not limited to this, and the width of the openings on both sides may be changed to make them unequal. FIG. 5 is a cross-sectional view showing another substrate of the display panel of the second embodiment of the present disclosure. Similar to the aspect shown in FIG. 3 of the foregoing first embodiment, in the second embodiment, the first opening 17h _{1 is} different from the second opening 17h ₂ ; that is, the first contact width D _C1 and the second contact width D _{C2 is} different. As shown in FIG. 5, the first opening 17h _{1 is} smaller than the second opening 17h ₂ , so that the gate/pixel capacitance (Cg pixel) is larger and the gate/drain capacitance (Cgd) is smaller. A small gate/drain capacitor reduces the data line capacitance (Cdata).

The structure and process of the above-described illustrations (e.g., the fabrication of the bottom gate five reticle process and the resulting structure) are used to describe some of the embodiments of the present disclosure, and are not intended to limit the scope of the disclosure. Other embodiments of different structural aspects, such as switches of different forms such as TFTs and display panels, layers of double-layer transparent conductive material as S/D electrodes, whether the boundaries are flush or have a step, etc., to meet the process requirements, the two electrodes a contact width between the first light-transmitting conductive material layer and the active layer, and a contact hole for connecting the pixel electrodes It is within the scope of the present disclosure to change the position of the hole to meet the position or size of the opening at the corresponding electrode of the barrier layer. Generally, the knowledge holder knows that the relevant structure and process of applying the disclosure may be adjusted according to the product requirements of the actual application, but the adjustment may still conform to the operating specifications of the application product (for example, the charging capacity of the transistor and the capacitive load are still Meet the needs of general application products), and maintain the good electronic characteristics of the display panel.

According to the above, the structure of the transistor array substrate of the display panel of the present disclosure is such that the wires, for example, the metal copper layer are covered with a light-transmitting conductive material, for example, the metal layer 16 is vertically etched with the second light-transmitting conductive material layer 152 and the first transparent layer. The photoconductive material layer 151 is covered, and the second light-transmissive conductive material layer 152 further covers the side faces 161, 162 of the metal layer 16, so that the prepared wires such as the data line DL (ex: IZO/Cu/IZO) can be avoided. Oxidation of the copper surface caused by subsequent processes (eg, treatment of the surface of the active layer 14 with N2O plasma prior to deposition of the protective layer after electrode definition). Furthermore, in each pixel region, the first electrode E1 (ex: source electrode) and the second electrode E2 (ex: drain electrode) are composed only of a light-transmitting conductive material (ex: IZO) (ie, active) There is no metal material such as copper on the layer 14, so that copper diffusion to the active layer 14 (semiconductor material) is prevented to cause a change in electronic characteristics. Furthermore, the substrate manufacturing process proposed in the embodiment is simple and time-consuming, and is very suitable for mass production in production.

In conclusion, the present invention has been disclosed in the above embodiments, but it is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

S1‧‧‧ first substrate

10‧‧‧Substrate

12‧‧‧ gate electrode

13‧‧‧First insulation

14‧‧‧Active layer

A _CH ‧‧‧ passage area

141‧‧‧Top surface of the active layer

E1‧‧‧first electrode

E2‧‧‧second electrode

151‧‧‧First light-transmissive conductive material layer

152‧‧‧Second light-transmissive conductive material layer

15E‧‧‧Extension

16‧‧‧metal layer

160‧‧‧ underside of the metal layer

161, 162‧‧‧ side walls of metal layers

163‧‧‧Top surface of the metal layer

18‧‧‧Second insulation

19‧‧‧ Third insulation

19h‧‧‧ hole

PE‧‧‧ pixel electrode

D _E ‧‧‧Extended width

D _C1 ‧‧‧first contact width

D _C2 ‧‧‧second contact width

S2‧‧‧second substrate

LC‧‧‧Liquid layer

DL‧‧‧ data line

Claims (10)

A display panel includes: a first substrate, including a plurality of staggered first wires, a plurality of second wires, and a plurality of transistors disposed on a substrate to define a plurality of pixel regions, and the first The wire and the second wires respectively extend along a first direction and a second direction, and the transistor of each pixel region comprises: a gate electrode disposed on the substrate; a first insulating layer disposed at An active layer disposed on the first insulating layer and including a channel region; a first electrode and a second electrode are disposed on the active layer and electrically connected to the active layer, the first An electrode and the second electrode are located at two sides of the channel region, the first electrode includes a first light-transmissive conductive material layer formed over the active layer and a second light-transmissive conductive material layer formed on the first light-transmitting conductive layer On the material layer, the second conductive line connected to the first electrode comprises a third transparent conductive material layer, a metal layer and a fourth transparent conductive material layer, wherein the metal layer is disposed on the third light transmission layer a conductive material layer and the fourth light guide Between the material layer, a second substrate disposed opposite the first substrate; and a display medium layer disposed between the first substrate and the second substrate. The display panel of claim 1, wherein the first light-transmissive conductive material layer and the second light-transmissive conductive material layer of the first electrode of each of the pixel regions extend to the corresponding second The metal layer of the wire and covering the metal layer to respectively form the third light-transmissive conductive material layer and the fourth light-transmitting conductive material Floor. The display panel of claim 2, wherein the metal layer of the second wire is formed on the first light-transmissive conductive material layer, and the second light-transmissive conductive material layer is formed on a sidewall of the metal layer. And the upper surface. The display panel of claim 3, wherein the first light-transmissive conductive material layer and the second light-transmissive conductive material layer are combined at an edge of the metal layer away from the active layer to form an extension. The extension has an extension width of about 0.1 μm to 4 μm. The display panel of claim 1, wherein the second electrode is composed of a double-layer transparent conductive material, and the first light-transmissive conductive material layer is formed above the active layer and the second transparent conductive layer A material layer is formed on the first light-transmissive conductive material layer. The display panel of claim 1, wherein the first electrode has a first contact width with an upper surface of the active layer, and the second electrode has a second contact with the upper surface of the active layer. The width, the first contact width is different from the second contact width. The display panel of claim 6, wherein the first contact width is smaller than the second contact width. The display panel of claim 1, wherein the first light-transmissive conductive material layer and the second light-transmitting conductive material layer are metal oxides, and the active layer is a metal oxide semiconductor. The display panel of claim 1, wherein the transistor of each of the pixel regions further comprises an etch barrier between the active layer and the first electrode and the second electrode, and the etch barrier Layering the first electrode and the second electrode The poles have a first opening and a second opening, respectively, and the first electrode and the second electrode are in contact with the active layer via the first opening and the second opening. A method for manufacturing a display panel, comprising: forming a first substrate, comprising: forming a first metal layer on a substrate, patterning the first metal layer to form a plurality of first wires and a plurality of gate electrodes, The first wire extends along the first direction and is connected to the corresponding gate electrode; a first insulating layer is formed to cover the gate electrode and the first wires; and a plurality of active layers are formed on the first insulating layer Forming a first light-transmissive conductive material layer on the first insulating layer; forming a plurality of metal layers on the first light-transmitting conductive material layer; forming a second light-transmitting conductive material layer on the metal layers and the Forming the first light-transmissive conductive material layer and the second light-transmitting conductive material layer to form a plurality of second wires on the substrate and extending along a second direction, the plurality of An electrode and a plurality of second electrodes, wherein each of the second wires comprises a first light-transmissive conductive layer formed of the first light-transmissive conductive material layer, the metal layer, and a second light-transmissive conductive material layer a second light-transmissive conductive layer, and the The second wire is interlaced with the first wires to define a plurality of pixel regions; wherein, in each of the pixel regions, the first electrode and the second electrode are on the active layer, and a channel region is located at the pixel region Between the first electrode and the second electrode, wherein the first electrode is composed of the first light-transmissive conductive material layer and the second light-transmitting conductive material Forming a layer, providing a second substrate and pairing the first substrate; and providing a display dielectric layer between the first substrate and the second substrate.