TWI585998B - Ultraviolet light emitting device - Google Patents
Ultraviolet light emitting device Download PDFInfo
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- TWI585998B TWI585998B TW101147243A TW101147243A TWI585998B TW I585998 B TWI585998 B TW I585998B TW 101147243 A TW101147243 A TW 101147243A TW 101147243 A TW101147243 A TW 101147243A TW I585998 B TWI585998 B TW I585998B
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- Prior art keywords
- layer
- conductive semiconductor
- light emitting
- semiconductor layer
- ultraviolet light
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/814—Bodies having reflecting means, e.g. semiconductor Bragg reflectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/83—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Led Devices (AREA)
Description
本發明係主張關於2011年12月13日申請之韓國專利案號No.10-2011-0134019之優先權及2012年11月5日申請之韓國專利案號No.10-2012-0124003之優先權。藉以引用的方式併入本文用作參考。 The present invention claims priority from Korean Patent No. 10-2011-0134019, filed on Dec. 13, 2011, and Korean Patent No. 10-2012-0124003, filed on Nov. 5, 2012. . This is incorporated herein by reference.
本發明係關於一種發光裝置。 The present invention relates to a light emitting device.
發光二極體(LED)是一將電流轉換成光的發光半導體裝置。 A light emitting diode (LED) is a light emitting semiconductor device that converts current into light.
由於發光半導體裝置可得到高亮度的光,因此發光半導體裝置已被廣泛地使用作為一顯示器、車輛、或發光裝置的光源。 Since a light-emitting semiconductor device can obtain high-intensity light, a light-emitting semiconductor device has been widely used as a light source of a display, a vehicle, or a light-emitting device.
最近,一可輸出紫外光的紫外光發光裝置已被提議。 Recently, an ultraviolet light emitting device that can output ultraviolet light has been proposed.
儘管紫外光是由紫外光發光裝置輸出至外部,大部分的紫外光不是被輸出至外部,而是被吸收或消失在紫外光發光裝置中。因此,光的提取效率會降低。 Although the ultraviolet light is output to the outside by the ultraviolet light emitting device, most of the ultraviolet light is not output to the outside, but is absorbed or disappears in the ultraviolet light emitting device. Therefore, the extraction efficiency of light is lowered.
實施例提供一改良光提取效率的紫外光發光裝置。 Embodiments provide an ultraviolet light emitting device that improves light extraction efficiency.
根據實施例,提供一紫外光發光裝置包括:一基板;一發光結構於基板上,其中包含複數個複合半導體,每個半導體至少包括一第一導電半導體層、一活性層、和一第二導電半導體層;一第一電極層於第一導電半導體層上;和一第二電極層於第二導電半導體層上,其中第一電極層與活性層一側邊表面隔開,並沿活性層之周圍部分提供,其中第一和第二電極層至少一為反射層。 According to an embodiment, an ultraviolet light emitting device includes: a substrate; an light emitting structure on the substrate, comprising a plurality of composite semiconductors, each semiconductor including at least a first conductive semiconductor layer, an active layer, and a second conductive a semiconductor layer; a first electrode layer on the first conductive semiconductor layer; and a second electrode layer on the second conductive semiconductor layer, wherein the first electrode layer is separated from the side surface of the active layer, and along the active layer A peripheral portion is provided, wherein at least one of the first and second electrode layers is a reflective layer.
10‧‧‧紫外光發光裝置 10‧‧‧UV light emitting device
10A‧‧‧紫外光發光裝置 10A‧‧‧UV light emitting device
10B‧‧‧紫外光發光裝置 10B‧‧‧UV light emitting device
10D‧‧‧紫外光發光裝置 10D‧‧‧UV light emitting device
11‧‧‧基板 11‧‧‧Substrate
13‧‧‧緩衝層 13‧‧‧buffer layer
15‧‧‧第一導電半導體層 15‧‧‧First conductive semiconductor layer
17‧‧‧活化層 17‧‧‧Active layer
19‧‧‧第二導電半導體層 19‧‧‧Second conductive semiconductor layer
20‧‧‧發光結構 20‧‧‧Lighting structure
21‧‧‧第一電極層 21‧‧‧First electrode layer
23‧‧‧第二電極層 23‧‧‧Second electrode layer
25‧‧‧歐姆層 25‧‧‧Ohm layer
27‧‧‧第一電極 27‧‧‧First electrode
29‧‧‧第二電極 29‧‧‧second electrode
31‧‧‧保護層 31‧‧‧Protective layer
41‧‧‧第一區 41‧‧‧First District
43‧‧‧第二區 43‧‧‧Second District
200‧‧‧發光裝置組 200‧‧‧Lighting device group
310‧‧‧第一引線架 310‧‧‧First lead frame
320‧‧‧第二引線架 320‧‧‧Second lead frame
330‧‧‧主體 330‧‧‧ Subject
340‧‧‧模型組件 340‧‧‧Model components
350‧‧‧線路 350‧‧‧ lines
圖1是根據第一實施例的紫外光發光裝置之仰視圖。 1 is a bottom view of an ultraviolet light emitting device according to a first embodiment.
圖2是圖1的紫外光發光裝置之剖面圖。 Figure 2 is a cross-sectional view of the ultraviolet light emitting device of Figure 1.
圖3是圖1的紫外光發光裝置輸出紫外光。 3 is an ultraviolet light emitting device of FIG. 1 that outputs ultraviolet light.
圖4是根據第二實施例的紫外光發光裝置之仰視圖。 Fig. 4 is a bottom view of the ultraviolet light emitting device according to the second embodiment.
圖5是圖4的紫外光發光裝置之剖面圖。 Figure 5 is a cross-sectional view of the ultraviolet light emitting device of Figure 4;
圖6是根據第三實施例的紫外光發光裝置之仰視圖。 Figure 6 is a bottom plan view of an ultraviolet light emitting device according to a third embodiment.
圖7是圖6的紫外光發光裝置之剖面圖。 Figure 7 is a cross-sectional view of the ultraviolet light emitting device of Figure 6.
圖8是根據第四實施例的紫外光發光裝置之仰視圖。 Figure 8 is a bottom plan view of an ultraviolet light emitting device according to a fourth embodiment.
圖9是根據第五實施例的紫外光發光裝置之仰視圖。 Figure 9 is a bottom plan view of an ultraviolet light emitting device according to a fifth embodiment.
圖10是根據本實施例的發光裝置組之剖面圖。 Figure 10 is a cross-sectional view of a light-emitting device group according to the present embodiment.
以下實施例的敘述中,要先了解的是,當一層(或片)、區、樣式、或結構被提及在另一基板、層(或片)、區、墊、或樣式「之上」或「之下」時,他可以是「直接地」或「間接地」位在另一基板、層(或片)、區、墊、或樣式之上,或一或多個中間層也可被呈現。此一層的位置已依據圖形被敘述。 In the following description of the embodiments, it will be understood that when a layer (a), a region, a pattern, or a structure is referred to as "above" another substrate, layer (or sheet), region, pad, or pattern. Or "below", he may be "directly" or "indirectly" positioned on another substrate, layer (or slice), region, mat, or pattern, or one or more intermediate layers may also be Presented. The position of this layer has been described in terms of graphics.
以下,實施例將依據附圖敘述。為達方便或清楚的效果,圖中顯示每層的厚度和尺寸可能被放大、忽略或綱要性的畫出。除此之外,元件的尺寸並非完全反映一真實的尺寸。 Hereinafter, the embodiments will be described with reference to the drawings. For convenience or clarity, the thickness and size of each layer may be enlarged, ignored, or outlined. In addition, the dimensions of the components do not fully reflect a true size.
儘管以下敘述之紫外光發光裝置限定於倒裝型(flip-type)紫外光發光裝置,該裝置包含一提供於上部的基板和提供於下部的第一電極27和第二電極29,但實施例不限定於此。 Although the ultraviolet light emitting device described below is limited to a flip-type ultraviolet light emitting device, the device includes a substrate provided on the upper portion and a first electrode 27 and a second electrode 29 provided on the lower portion, but the embodiment It is not limited to this.
儘管在以下敘述中,紫外光發光裝置產生具240到360奈米波長的深紫外光,但實施例不限定於此。 Although the ultraviolet light emitting device generates deep ultraviolet light having a wavelength of 240 to 360 nm in the following description, the embodiment is not limited thereto.
圖1是根據第一實施例的紫外光發光裝置之仰視圖,而圖2是圖1的紫外光發光裝置之剖面圖。 1 is a bottom view of an ultraviolet light emitting device according to a first embodiment, and FIG. 2 is a cross-sectional view of the ultraviolet light emitting device of FIG. 1.
參閱圖1和2,根據第一實施例,一紫外光發光裝置10可包括一基板11、一第一導電半導體層15、一活化層17、一第二導電半導體層19、一第一電極層21和一第二電極層23、及一第一電極27和一第二電 極29。 Referring to FIGS. 1 and 2, an ultraviolet light emitting device 10 can include a substrate 11, a first conductive semiconductor layer 15, an active layer 17, a second conductive semiconductor layer 19, and a first electrode layer. 21 and a second electrode layer 23, and a first electrode 27 and a second Extremely 29.
根據第一實施例,紫外光發光裝置10可包含一倒裝型紫外光發光裝置,但實施例不限定於此。 According to the first embodiment, the ultraviolet light emitting device 10 may include a flip-chip type ultraviolet light emitting device, but the embodiment is not limited thereto.
一發光結構20可藉第一導電半導體層15、活化層17、第二導電半導體層19來形成。 A light emitting structure 20 can be formed by the first conductive semiconductor layer 15, the active layer 17, and the second conductive semiconductor layer 19.
發光結構20可包括複數的複合半導體層。在複合半導體層之間,一層做為活化層17產生光線,另一層做為第一導電半導體層15產生第一載體,換句話說即是被提供給活化層17的電子,還有另一層做為第二導電半導體層19產生第二載體。換句話說,是被提供給活化層17的電洞,但實施例不限定於此。光線可經由電子與電洞的重組產生於活化層17中。舉例來說,第一導電半導體層15可被提供於活化層17之上,而第二導電半導體層19可被提供於活化層17之下,但實施例不限定於此。 The light emitting structure 20 can include a plurality of composite semiconductor layers. Between the composite semiconductor layers, one layer acts as the active layer 17 to generate light, and the other layer as the first conductive semiconductor layer 15 produces the first carrier, in other words, the electrons supplied to the active layer 17, and another layer A second carrier is produced for the second conductive semiconductor layer 19. In other words, it is a hole provided to the active layer 17, but the embodiment is not limited thereto. Light can be generated in the active layer 17 via recombination of electrons and holes. For example, the first conductive semiconductor layer 15 may be provided over the active layer 17, and the second conductive semiconductor layer 19 may be provided under the active layer 17, but the embodiment is not limited thereto.
紫外光發光裝置10更進一步地包括一介於基板11和第一導電半導體層15之間的緩衝層13,以減少介於基板11和第一導電半導體層15之間的晶格失配,但實施例不限定於此。 The ultraviolet light emitting device 10 further includes a buffer layer 13 interposed between the substrate 11 and the first conductive semiconductor layer 15 to reduce lattice mismatch between the substrate 11 and the first conductive semiconductor layer 15, but is implemented The example is not limited to this.
緩衝層13防止像是裂縫、空洞、紋理(grains)、和折曲等瑕疵,使其不發生在形成於基板11上的第一導電半導體層15、活化層17、和第二導電半導體層19之中。 The buffer layer 13 prevents flaws such as cracks, voids, grains, and buckling from occurring, such that the first conductive semiconductor layer 15, the active layer 17, and the second conductive semiconductor layer 19 formed on the substrate 11 do not occur. Among them.
儘管未示於圖中,一未摻入摻質的半導體層可被另外插入緩衝層13和第一導電半導體層15之間,但本實施例不限定於此。 Although not shown in the drawing, a semiconductor layer not doped with a dopant may be additionally interposed between the buffer layer 13 and the first conductive semiconductor layer 15, but the embodiment is not limited thereto.
緩衝層13、第一導電半導體層15、活化層17、第二導電半導體層19都包含II-VI族的複合半導體材料,但本實施例不限定於此。 The buffer layer 13, the first conductive semiconductor layer 15, the active layer 17, and the second conductive semiconductor layer 19 all include a II-VI composite semiconductor material, but the embodiment is not limited thereto.
複合半導體材料可包含像是鋁(Al)、銦(In)、鎵(Ga)、和氮(N)等材料,但實施例不限定於此。 The composite semiconductor material may include materials such as aluminum (Al), indium (In), gallium (Ga), and nitrogen (N), but the embodiment is not limited thereto.
基板11可包含一表現較佳熱傳導和/或較佳透明度的材料,但實施例不限定於此。舉例來說,基板11包含選自由藍寶石(氧化鋁)、碳化矽、矽、砷化鎵、氮化鎵、氧化鋅、矽、磷化鎵、磷化銦和鍺所組成之群組其中至少之一,但實施例不限定於此。 The substrate 11 may comprise a material that exhibits better thermal conductivity and/or better transparency, although the embodiment is not limited thereto. For example, the substrate 11 comprises at least one selected from the group consisting of sapphire (aluminum oxide), tantalum carbide, niobium, gallium arsenide, gallium nitride, zinc oxide, antimony, gallium phosphide, indium phosphide, and antimony. However, the embodiment is not limited to this.
第一導電半導體層15可形成於基板11或緩衝層13之下方。 The first conductive semiconductor layer 15 may be formed under the substrate 11 or the buffer layer 13.
舉例來說,第一導電半導體層15可包含一含有N型摻質的 N型半導體層,但實施例不限定於此。第一導電半導體層15可包含一具有InxAlyGa1-x-yN(0x1,0y1,0x+y1)組成公式的半導體材料,舉例來說,選自由氮化銦鋁鎵、氮化鎵、氮化鋁鎵、氮化銦鎵、氮化鋁、氮化銦、和氮化鋁銦所組成之群組其中至少之一,但本實施例不限定於此。N型摻質可包含矽、鍺、或錫,但本實施例不限定於此。 For example, the first conductive semiconductor layer 15 may include an N-type semiconductor layer containing an N-type dopant, but the embodiment is not limited thereto. The first conductive semiconductor layer 15 may include one having In x Al y Ga 1-xy N(0 x 1,0 y 1,0 x+y 1) a semiconductor material constituting a formula, for example, selected from the group consisting of indium aluminum gallium nitride, gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum nitride, indium nitride, and aluminum indium nitride. At least one of the groups, but the embodiment is not limited thereto. The N-type dopant may contain ruthenium, osmium, or tin, but the embodiment is not limited thereto.
第一導電半導體層15可做為一導電層來供給電子給活化層19。第一導電半導體層15可做為一障壁層來阻止從第二導電半導體層19供給到活化層17的電洞被轉移到緩衝層13。 The first conductive semiconductor layer 15 can serve as a conductive layer to supply electrons to the active layer 19. The first conductive semiconductor layer 15 can serve as a barrier layer to prevent the holes supplied from the second conductive semiconductor layer 19 to the active layer 17 from being transferred to the buffer layer 13.
第一導電半導體層15摻入高濃度的摻質來做為一導電層,使電子能自由移動。 The first conductive semiconductor layer 15 is doped with a high concentration of dopant as a conductive layer to allow electrons to move freely.
第一導電半導體層15包含一具有相等於或大於活化層17的能階的複合半導體材料來做為一障壁層,以阻止活化層17的電洞被轉移到緩衝層13。 The first conductive semiconductor layer 15 includes a composite semiconductor material having an energy level equal to or greater than that of the active layer 17 as a barrier layer to prevent the holes of the active layer 17 from being transferred to the buffer layer 13.
活化層17可被形成於第一導電半導體層15之下。 The active layer 17 may be formed under the first conductive semiconductor layer 15.
舉例來說,活化層17重組第一導電半導體層15所提供的電子及第二導電半導體層19所提供的電洞,以發射紫外光。為產生紫外光,活化層17需具有至少一寬能階。舉例來說,儘管活化層17可產生具有波長240到360奈米的深紫外光,但實施例不限定於此。 For example, the active layer 17 recombines the electrons provided by the first conductive semiconductor layer 15 and the holes provided by the second conductive semiconductor layer 19 to emit ultraviolet light. In order to generate ultraviolet light, the active layer 17 needs to have at least one broad energy level. For example, although the active layer 17 can produce deep ultraviolet light having a wavelength of 240 to 360 nm, the embodiment is not limited thereto.
活化層17可包含一單量子井(SQW)結構、一多量子井(MQW)結構、一量子點結構、和一量子線結構的其中之一。 The active layer 17 may comprise one of a single quantum well (SQW) structure, a multiple quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure.
活化層17可具有一井層和一障壁層的堆疊結構,障壁層包含一半導體,其為III-VI族的複合物,複合物具有一產生紫外光的能階,但實施例不限定於此。 The active layer 17 may have a stack structure of a well layer and a barrier layer. The barrier layer comprises a semiconductor, which is a III-VI composite, and the composite has an energy level for generating ultraviolet light, but the embodiment is not limited thereto. .
舉例來說,活化層17可週期性地形成於一氮化銦鎵井層/氮化鎵障壁層、或一氮化銦鎵井層/氮化鋁鎵障壁層、和一氮化銦鎵井層/氮化銦鎵障壁層的堆疊結構中。障壁層的能階可高於井層的能階。第二導電半導體層19可形成於活化層17之下。 For example, the active layer 17 may be periodically formed on an indium gallium nitride well layer/gallium nitride barrier layer, or an indium gallium nitride well layer/aluminum gallium nitride barrier layer, and an indium gallium nitride well Layer/indium gallium nitride barrier layer stack structure. The energy level of the barrier layer can be higher than the energy level of the well layer. The second conductive semiconductor layer 19 may be formed under the active layer 17.
第二導電半導體層19可包含一含有P型摻質的P型半導體層,但實施例不限定於此。第二導電半導體層19可包含一具有InxAlyGa1-x-yN(0x1,0y1,0x+y1)組成公式的半導體材料,舉例來 說,選自由氮化銦鋁鎵、氮化鎵、氮化鋁鎵、氮化銦鎵、氮化鋁、氮化銦、和氮化鋁銦所組成之群組其中至少之一,然而實施例不限定於此。P型摻質可包含鎂、鋅、鈣、鍶、或鋇,但實施例不限定於此。 The second conductive semiconductor layer 19 may include a P-type semiconductor layer containing a P-type dopant, but the embodiment is not limited thereto. The second conductive semiconductor layer 19 may include one having InxAlyGa1-x-yN (0) x 1,0 y 1,0 x+y 1) a semiconductor material constituting a formula, for example, selected from the group consisting of indium aluminum gallium nitride, gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum nitride, indium nitride, and aluminum indium nitride. At least one of the groups, however, the embodiment is not limited thereto. The P-type dopant may include magnesium, zinc, calcium, strontium, or barium, but the examples are not limited thereto.
第二導電半導體層19可做為一導電層來供給電洞給活化層17。 The second conductive semiconductor layer 19 can serve as a conductive layer to supply holes to the active layer 17.
第二導電半導體層19被摻入高濃度的摻質來做為一導電層,使電洞能自由活動。 The second conductive semiconductor layer 19 is doped with a high concentration of dopant as a conductive layer to allow the hole to move freely.
為了阻止活化層17的電子被轉移到第二導電半導體層19,一第三導電半導體層可被插入活化層17和第二導電半導體層19之中,但實施例不限定於此。 In order to prevent electrons of the active layer 17 from being transferred to the second conductive semiconductor layer 19, a third conductive semiconductor layer may be inserted into the active layer 17 and the second conductive semiconductor layer 19, but the embodiment is not limited thereto.
更詳細來說,除了第三導電半導體層,一電子阻隔層可被插入活化層17和第二導電半導體層19之中、或活化層17與第三導電半導體層之中,來阻止活化層17的電子被轉移到第二導電半導體層19,但實施例不限定於此。 In more detail, in addition to the third conductive semiconductor layer, an electron blocking layer may be inserted into the active layer 17 and the second conductive semiconductor layer 19, or among the active layer 17 and the third conductive semiconductor layer, to block the active layer 17 The electrons are transferred to the second conductive semiconductor layer 19, but the embodiment is not limited thereto.
舉例來說,第三導電半導體層和電子阻隔層可包含氮化鋁鎵,但實施例不限定於此。舉例來說,電子阻隔層可具有至少高於第二導電半導體層或第三導電半導體層的能階,但實施例不限定於此。 For example, the third conductive semiconductor layer and the electron blocking layer may include aluminum gallium nitride, but the embodiment is not limited thereto. For example, the electron blocking layer may have an energy level higher than that of the second conductive semiconductor layer or the third conductive semiconductor layer, but the embodiment is not limited thereto.
舉例來說,當第三導電半導體層和電子阻隔層包含氮化鋁鎵時,電子阻隔層可具有較第三導電半導體層高的鋁含量,使電子阻隔層可具有較第三導電半導體層高的能階,但實施例不限定於此。 For example, when the third conductive semiconductor layer and the electron blocking layer comprise aluminum gallium nitride, the electron blocking layer may have a higher aluminum content than the third conductive semiconductor layer, so that the electron blocking layer may have a higher level than the third conductive semiconductor layer The energy level, but the embodiment is not limited to this.
活化層17和第二導電半導體層19的至少一或至少兩側邊表面向外突出,但本實施例不限定於此。 At least one or at least two side surfaces of the active layer 17 and the second conductive semiconductor layer 19 protrude outward, but the embodiment is not limited thereto.
然而第一導電半導體層15的側邊表面和活化層17的側邊表面和第二導電半導體層19之間的距離可不一致。換句話說,第一導電半導體層15的側邊表面和活化層17的側邊表面和第二導電半導體層19之間的距離可根據其位置而改變。 However, the distance between the side surface of the first conductive semiconductor layer 15 and the side surface of the active layer 17 and the second conductive semiconductor layer 19 may not coincide. In other words, the distance between the side surface of the first conductive semiconductor layer 15 and the side surface of the active layer 17 and the second conductive semiconductor layer 19 may vary depending on its position.
較佳地,在倒裝型紫外光發光結構中,紫外光往橫向或往前朝基板11方向行進。 Preferably, in the flip-chip type ultraviolet light emitting structure, the ultraviolet light travels toward the substrate 11 in the lateral direction or forward direction.
在覆晶(flip-chip)紫外光發光結構中,產生自活化層17的紫外光可朝各方向行進。 In a flip-chip ultraviolet light emitting structure, ultraviolet light generated from the active layer 17 can travel in various directions.
部分的紫外光不往上或往前朝基板11行進,而是往下朝第二導電半導體層19進行。若往下行進的光線方向未改為往前,往下行進的光線可能會被吸收或消失在紫外光發光裝置10中,如此光的提取效率會明顯地下降。 Part of the ultraviolet light does not travel upward or forward toward the substrate 11, but proceeds downward toward the second conductive semiconductor layer 19. If the direction of the light traveling downward is not changed to the front, the light traveling downward may be absorbed or disappeared in the ultraviolet light-emitting device 10, so that the light extraction efficiency is significantly lowered.
尤其是,如圖3所示,即使紫外光往上朝基板11行進,由於基板11、空氣與紫外光波長之間的折射率不同,紫外光可經由基板11的上表面輸出至外側。除此之外,部分的紫外光可反射自基板11的上表面,如此部分的紫外光可往橫向或往下行進,因此被吸收或消失在紫外光發光裝置10中。 In particular, as shown in FIG. 3, even if the ultraviolet light travels upward toward the substrate 11, the ultraviolet light can be output to the outside via the upper surface of the substrate 11 due to the difference in refractive index between the substrate 11, the air and the ultraviolet light wavelength. In addition to this, part of the ultraviolet light may be reflected from the upper surface of the substrate 11, and such a portion of the ultraviolet light may travel laterally or downwardly, and thus be absorbed or disappeared in the ultraviolet light emitting device 10.
根據第一實施例,為了解決問題,第一和第二電極層21和23被提供於讓往下發射的紫外光使其往上反射,而從活化層17往上發光的紫外光,然後再被基板11的上表面反射,其可被往上方向反射。 According to the first embodiment, in order to solve the problem, the first and second electrode layers 21 and 23 are provided to allow the ultraviolet light emitted downward to be reflected upward, and the ultraviolet light which is emitted upward from the active layer 17 and then Reflected by the upper surface of the substrate 11, it can be reflected in the upward direction.
第一電極層21可形成於第一導電半導體層15的下表面,而第二電極層23可形成於第二導電半導體層19的下表面。 The first electrode layer 21 may be formed on a lower surface of the first conductive semiconductor layer 15, and the second electrode layer 23 may be formed on a lower surface of the second conductive semiconductor layer 19.
為將第一電極層21形成於第一導電半導體層15的下表面上,受活化層17和第二導電半導體層19覆蓋的第一導電半導體層15必須露出。 In order to form the first electrode layer 21 on the lower surface of the first conductive semiconductor layer 15, the first conductive semiconductor layer 15 covered by the active layer 17 and the second conductive semiconductor layer 19 must be exposed.
換言之,為了露出第一導電半導體層15,一平台蝕刻法(mesa etching process)可對第二導電半導體層19和活化層17來連續進行。 In other words, in order to expose the first conductive semiconductor layer 15, a mesa etching process may be continuously performed on the second conductive semiconductor layer 19 and the active layer 17.
第一導電半導體層15可經由平台蝕刻法部分地蝕刻,但本實施例不限定於此。第一導電半導體層15的中央區可往下突出於第一導電半導體層15的周邊區外。周邊區可環繞中央區,但實施例不限定於此。 The first conductive semiconductor layer 15 may be partially etched via a terrace etching method, but the embodiment is not limited thereto. The central region of the first conductive semiconductor layer 15 may protrude downward from the peripheral region of the first conductive semiconductor layer 15. The peripheral area may surround the central area, but the embodiment is not limited thereto.
經由平台蝕刻法被露出的第一導電半導體層15周邊區,命名為第一區41。未受平台蝕刻而保留的活化層17和第二導電半導體層19、或未經平台蝕刻法被露出的第一導電半導體層15、和對應於第一導電半導體層15未被露出的中央區的活化層17及第二導電半導體層19,命名為第二區43。由於光產生自活化層17,第二區43可被稱為一發光區。除此之外,由於第一區41不產生光,第一區41可被稱為一不發光區,但實施例不限定於此。 The peripheral region of the first conductive semiconductor layer 15 exposed through the terrace etching method is named as the first region 41. The active layer 17 and the second conductive semiconductor layer 19 which are not left by the etching of the substrate, or the first conductive semiconductor layer 15 which is not exposed by the terrace etching, and the central region corresponding to the unexposed portion of the first conductive semiconductor layer 15 The active layer 17 and the second conductive semiconductor layer 19 are named as the second region 43. Since light is generated from the active layer 17, the second region 43 can be referred to as a light-emitting region. In addition to this, since the first region 41 does not generate light, the first region 41 may be referred to as a non-light-emitting region, but the embodiment is not limited thereto.
第一區41可包含一藉移除部分的第二導電半導體層19、活 化層17、第一導電半導體層15而形成的凹槽。換句話說,此凹槽具有與活化層17和第二導電半導體層19的厚度一樣高的深度。因此,此凹槽可沿著第二區43的周圍部分形成,即為發光區,但本實施例不限定於此。換句話說,此凹槽可沿著活化層17和第二導電半導體層19的周圍形成。此凹槽可形成於活化層17和第二導電半導體層19的側邊表面。 The first region 41 may include a second conductive semiconductor layer 19 that is removed by a portion, and the live The layer 17 is formed by the first conductive semiconductor layer 15. In other words, this groove has a depth as high as the thickness of the active layer 17 and the second conductive semiconductor layer 19. Therefore, the groove can be formed along the peripheral portion of the second region 43, that is, the light-emitting region, but the embodiment is not limited thereto. In other words, this groove can be formed along the periphery of the active layer 17 and the second conductive semiconductor layer 19. This groove may be formed on the side surfaces of the active layer 17 and the second conductive semiconductor layer 19.
第一導電半導體層15的尺寸可大於活化層17和第二導電半導體層19的尺寸,但本實施例不限定於此。第一導電半導體層15可從活化層17和第二導電半導體層19的側邊表面往外延伸。凹槽可形成於已延伸的第一導電半導體層15中。 The size of the first conductive semiconductor layer 15 may be larger than the size of the active layer 17 and the second conductive semiconductor layer 19, but the embodiment is not limited thereto. The first conductive semiconductor layer 15 may extend outward from the side surfaces of the active layer 17 and the second conductive semiconductor layer 19. A groove may be formed in the extended first conductive semiconductor layer 15.
同時,第一和第二區41及43可明確定義於基板11上。因此,第一區41可形成於第一導電半導體層15之中,而第二區43可形成於第一導電半導體層15、活化層17、和第二導電半導體層19之中。既然如此,形成於第二區43中的第一導電半導體層15的下表面可往下突出到形成於第一區41中的第一導電半導體層15的下表面之外,但本實施例不限定於此。 At the same time, the first and second regions 41 and 43 can be clearly defined on the substrate 11. Therefore, the first region 41 may be formed in the first conductive semiconductor layer 15, and the second region 43 may be formed in the first conductive semiconductor layer 15, the active layer 17, and the second conductive semiconductor layer 19. In this case, the lower surface of the first conductive semiconductor layer 15 formed in the second region 43 may protrude downward beyond the lower surface of the first conductive semiconductor layer 15 formed in the first region 41, but this embodiment does not Limited to this.
如圖1所示,第二區43可具有一十字型,但本實施例不限定於此。 As shown in FIG. 1, the second zone 43 may have a cross shape, but the embodiment is not limited thereto.
舉例來說,第二區43可具有一圓型(見圖8)或一星型(見圖9)。 For example, the second zone 43 can have a round shape (see Figure 8) or a star shape (see Figure 9).
一般來說,第二區43具有一矩形。與矩型相較,十字型、圓型、星型使露在外部的活化層17側邊表面區域更大,因此光提取效率可被改善。 Generally, the second zone 43 has a rectangular shape. Compared with the rectangular shape, the cross type, the round shape, and the star shape make the side surface area of the active layer 17 exposed to the outside larger, and thus the light extraction efficiency can be improved.
第一電極層21可形成於第一導電半導體層15的下表面上,即為第一區41。 The first electrode layer 21 may be formed on the lower surface of the first conductive semiconductor layer 15, that is, the first region 41.
舉例來說,第一電極層21可形成於暴露在外的第一導電半導體層15的全區之上。 For example, the first electrode layer 21 may be formed over the entire region of the first conductive semiconductor layer 15 that is exposed.
除此之外,為了阻止第一和第二導電半導體層15及19之間被第一電極層21引起的電子短路,第一電極層21的終端部分可與第二區43的終端部分隔開,即是第一導電半導體層15或受到蝕刻的活化層17的側邊表面。 In addition, in order to prevent an electron short circuit caused by the first electrode layer 21 between the first and second conductive semiconductor layers 15 and 19, the terminal portion of the first electrode layer 21 may be spaced apart from the terminal portion of the second region 43. That is, the first conductive semiconductor layer 15 or the side surface of the etched active layer 17.
第一電極層21的下表面可被置於較活化層17的上表面更高處。為此目的,與活化層17連接的第一導電半導體層15的中央區可往下突出到不與活化層17連接的第一導電半導體層15的周圍區之外,但本實施例不限定於此。 The lower surface of the first electrode layer 21 may be placed higher than the upper surface of the active layer 17. For this purpose, the central region of the first conductive semiconductor layer 15 connected to the active layer 17 may protrude downward beyond the peripheral region of the first conductive semiconductor layer 15 which is not connected to the active layer 17, but the embodiment is not limited thereto. this.
為了完全阻止第一和第二導電半導體層15及19之間由第一電極層21引起的電子短路,一保護層31可形成於一被提供於第二區43中的第一導電半導體層15、活化層17、和第二導電半導體層19的側邊表面上,如圖7所示,但實施例不限定於此。 In order to completely prevent the electronic short circuit caused by the first electrode layer 21 between the first and second conductive semiconductor layers 15 and 19, a protective layer 31 may be formed on the first conductive semiconductor layer 15 provided in the second region 43. The side surfaces of the active layer 17 and the second conductive semiconductor layer 19 are as shown in FIG. 7, but the embodiment is not limited thereto.
除此之外,保護層31可形成於一被提供於第一區41中部分的第一導電半導體層15下表面和第一電極層21下表面,及被提供於第二區43中部份的第二電極層下表面,但本實施例不限定於此。 In addition, the protective layer 31 may be formed on a lower surface of the first conductive semiconductor layer 15 and a lower surface of the first electrode layer 21 provided in a portion of the first region 41, and provided in a portion of the second region 43 The lower surface of the second electrode layer, but the embodiment is not limited thereto.
換句話說,保護層31可沿受蝕刻的發光結構的周圍部分形成,即是第一導電半導體層15、活化層17、第二導電半導體層19的側邊表面之周圍區,但本實施例不限定於此。 In other words, the protective layer 31 may be formed along the peripheral portion of the etched light emitting structure, that is, the peripheral regions of the side surfaces of the first conductive semiconductor layer 15, the active layer 17, and the second conductive semiconductor layer 19, but this embodiment It is not limited to this.
第一電極層21可反射從活化層17發射到基板11、自基板11的上表面反射後往下行進的紫外光,但本實施例不限定於此。 The first electrode layer 21 can reflect ultraviolet light emitted from the active layer 17 to the substrate 11 and reflected downward from the upper surface of the substrate 11, but the embodiment is not limited thereto.
產生自活化層17的紫外光可往各方向行進,而部分紫外光可往上或往前朝基板11行進。儘管朝基板11行進的紫外光經由基板11的上表面輸出到外部,部分紫外光可被基板11的上表面反射而往下行進。往下行進的紫外光被第一電極層21反射,而往上行進,因此紫外光經由基板11的上表面或基板11的側邊表面輸出到外部。 The ultraviolet light generated from the active layer 17 can travel in all directions, and part of the ultraviolet light can travel upward or forward toward the substrate 11. Although the ultraviolet light traveling toward the substrate 11 is output to the outside via the upper surface of the substrate 11, a part of the ultraviolet light can be reflected by the upper surface of the substrate 11 to travel downward. The ultraviolet light traveling downward is reflected by the first electrode layer 21 and travels upward, so that the ultraviolet light is output to the outside via the upper surface of the substrate 11 or the side surface of the substrate 11.
具有一狹窄主波長的紫外光從基板11的上表面往內部大量反射。除此之外,第一導電半導體層15被露出於其中的第一區41可佔有較第一導電半導體層15未被露出於其中的第二區43更大的區域。換句話說,第一區41的區域可比第二區43的區域大。既然如此,隨著反射自基板11上表面的紫外光消失,光提取效率可能下降,此舉會造成嚴重的問題。 Ultraviolet light having a narrow dominant wavelength is largely reflected from the upper surface of the substrate 11 toward the inside. In addition to this, the first region 41 in which the first conductive semiconductor layer 15 is exposed may occupy a larger region than the second region 43 in which the first conductive semiconductor layer 15 is not exposed. In other words, the area of the first zone 41 can be larger than the area of the second zone 43. In this case, as the ultraviolet light reflected from the upper surface of the substrate 11 disappears, the light extraction efficiency may decrease, which may cause a serious problem.
根據第一實施例,第一電極層21形成於第一導電半導體層15的下表面之上或於第一區41中,因此從基板11上表面往下反射的紫外光會往上或外橫向反射,由此顯著地改善光提取效率。 According to the first embodiment, the first electrode layer 21 is formed on the lower surface of the first conductive semiconductor layer 15 or in the first region 41, so that the ultraviolet light reflected downward from the upper surface of the substrate 11 may be upward or outward laterally. Reflection, thereby significantly improving light extraction efficiency.
同時,第二電極層23可形成於第二導電半導體層19的下 表面上。換句話說,第二電極層23可形成於第二導電半導體層19且對應於受平台蝕刻法未露出的第一導電半導體層15的下表面上。 Meanwhile, the second electrode layer 23 may be formed under the second conductive semiconductor layer 19 On the surface. In other words, the second electrode layer 23 may be formed on the second conductive semiconductor layer 19 and corresponding to the lower surface of the first conductive semiconductor layer 15 which is not exposed by the terrace etching method.
如圖3所示,第二電極層23可反射從活化層17往下發射的紫外光,使其往上。 As shown in FIG. 3, the second electrode layer 23 reflects the ultraviolet light emitted downward from the active layer 17 to be directed upward.
第二電極層23可反射從基板11上表面所反射通過活化層17和第二導電半導體層19而往下進行的紫外光,使其往上。 The second electrode layer 23 can reflect the ultraviolet light which is reflected downward from the upper surface of the substrate 11 through the active layer 17 and the second conductive semiconductor layer 19, and is made upward.
除此之外,第二電極層23與活化層17之間的距離可能較第一電極層21與活化層17之間的距離長,但本實施例不限定於此。 In addition, the distance between the second electrode layer 23 and the active layer 17 may be longer than the distance between the first electrode layer 21 and the active layer 17, but the embodiment is not limited thereto.
儘管未示於圖中,一透明導電層可插入第二導電半導體層19和第二電極層23之間,但本實施例不限定於此。透明電極層可具有一從第二電極29往橫向擴散電流的電流擴散功能,和一歐姆觸點功能以輕易地將電流引入第二導電半導體層19,但本實施例不限定於此。 Although not shown in the drawings, a transparent conductive layer may be interposed between the second conductive semiconductor layer 19 and the second electrode layer 23, but the embodiment is not limited thereto. The transparent electrode layer may have a current spreading function of diffusing a current from the second electrode 29 to the lateral direction, and an ohmic contact function to easily introduce a current into the second conductive semiconductor layer 19, but the embodiment is not limited thereto.
透明層可包含選自由銦錫氧化物(ITO)、銦鋅氧化物(IZO)、鎵鋅氧化物(GZO)、鋁鋅氧化物(AZO)、鋁鎵鋅氧化物(AGZO)、銦鎵鋅氧化物(IGZO)、銥氧化物(IrOx)、釕氧化物(RuOx)、釕氧化物/銦錫氧化物(RuOx/ITO)、鎳/銥氧化物/金(Ni/IrOx/Au)、和鎳/銥氧化物/金/銦錫氧化物(Ni/IrOx/Au/IT所組成之群組其中之一,但實施例不限定於此。 The transparent layer may comprise a layer selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), gallium zinc oxide (GZO), aluminum zinc oxide (AZO), aluminum gallium zinc oxide (AGZO), indium gallium zinc. Oxide (IGZO), cerium oxide (IrOx), cerium oxide (RuOx), cerium oxide/indium tin oxide (RuOx/ITO), nickel/cerium oxide/gold (Ni/IrOx/Au), and One of the group consisting of nickel/niobium oxide/gold/indium tin oxide (Ni/IrOx/Au/IT), but the embodiment is not limited thereto.
根據第一實施例,第二電極層23形成於第二導電半導體層19的下表面上來往上反射從基板11的上表面往下反射的紫外光、或從活化層17往下發射的紫外光,因此顯著的改善光提取效率。 According to the first embodiment, the second electrode layer 23 is formed on the lower surface of the second conductive semiconductor layer 19 to reflect the ultraviolet light reflected downward from the upper surface of the substrate 11 or the ultraviolet light emitted downward from the active layer 17 Therefore, the light extraction efficiency is significantly improved.
第一和第二電極層21及23可包含一有較好反射性的材料,但實施例不限定於此。 The first and second electrode layers 21 and 23 may comprise a material having better reflectivity, but the embodiment is not limited thereto.
第一和第二電極層21及23可包含一樣或不同的材料。 The first and second electrode layers 21 and 23 may comprise the same or different materials.
第一和第二電極層21及23可形成一單層結構或一多層結構。 The first and second electrode layers 21 and 23 may form a single layer structure or a multilayer structure.
第一和第二電極層21及23可包含有較好反射性和傳導性的不透明金屬材料。第一和第二電極層21及23可包含選自由銀、鎳、鋁、銠、鈀、銥、釕、鎂、鋅、鉑、金、和鉿所組成之群組其中至少之一、或其合金,但實施例不限定於此。 The first and second electrode layers 21 and 23 may comprise an opaque metal material having better reflectivity and conductivity. The first and second electrode layers 21 and 23 may include at least one selected from the group consisting of silver, nickel, aluminum, rhodium, palladium, iridium, ruthenium, magnesium, zinc, platinum, gold, and rhenium, or Alloy, but the embodiment is not limited thereto.
舉例來說,第一和第二電極層21及23可包含代表對紫外 光有較好反射性的鋁,但實施例不限定於此。 For example, the first and second electrode layers 21 and 23 may comprise a representative UV The light has a good reflective aluminum, but the embodiment is not limited thereto.
舉例來說,第一電極層21包含鋁,第二電極層23可包含鋁鎳合金,但實施例不限定於此。 For example, the first electrode layer 21 may include aluminum, and the second electrode layer 23 may include an aluminum-nickel alloy, but the embodiment is not limited thereto.
根據實驗結果,當第一電極層21包含鋁時,根據第一實施例的紫外光發光裝置10光提取效率是16.4%。同時,當第一電極層21包含銀時,根據第一實施例的紫外光發光裝置10光提取效率是13.8%。因此,關於具有240到360奈米波長的紫外光,含有鋁的第一電極層21所表示的反射係數比含有銀的第一電極層21所表示的反射係數高。 According to the experimental results, when the first electrode layer 21 contains aluminum, the light extraction efficiency of the ultraviolet light-emitting device 10 according to the first embodiment is 16.4%. Meanwhile, when the first electrode layer 21 contains silver, the light extraction efficiency of the ultraviolet light-emitting device 10 according to the first embodiment is 13.8%. Therefore, with respect to ultraviolet light having a wavelength of 240 to 360 nm, the first electrode layer 21 containing aluminum has a reflection coefficient higher than that of the first electrode layer 21 containing silver.
儘管未示於圖中,露出於活化層17周圍部分的第一導電半導體層15下表面、及第二導電半導體層19的下表面,可具有粗糙的結構。此粗糙結構可具有固定的凹凸樣式或隨機的凹凸樣式,但實施例不限定於此。 Although not shown in the drawing, the lower surface of the first conductive semiconductor layer 15 exposed to the portion around the active layer 17 and the lower surface of the second conductive semiconductor layer 19 may have a rough structure. This roughness structure may have a fixed concavo-convex pattern or a random concavo-convex pattern, but the embodiment is not limited thereto.
當第一電極層21形成於第一導電半導體層15的粗糙結構之上時,第一電極層21表示強大的黏著力並可與第一導電半導體層15接合,因此防止第一電極層21從第一導電半導體層15脫離。除此之外,從活化層往下發射的紫外光會因為粗糙結構而反射或散射,使光提取效率可更加改善。 When the first electrode layer 21 is formed over the rough structure of the first conductive semiconductor layer 15, the first electrode layer 21 represents a strong adhesive force and can be bonded to the first conductive semiconductor layer 15, thereby preventing the first electrode layer 21 from being The first conductive semiconductor layer 15 is detached. In addition, the ultraviolet light emitted downward from the active layer may be reflected or scattered due to the roughness, so that the light extraction efficiency can be further improved.
形成於第二導電半導體層15的下表面上的粗糙結構可做出與上述同樣的效果。 The roughness formed on the lower surface of the second conductive semiconductor layer 15 can achieve the same effects as described above.
第一電極層21和第二電極層23可藉由活化層17和第二導電半導體層19的厚度,被提供於不同位置且互相隔開,但實施例不限定於此。 The first electrode layer 21 and the second electrode layer 23 may be provided at different positions and spaced apart from each other by the thicknesses of the active layer 17 and the second conductive semiconductor layer 19, but the embodiment is not limited thereto.
同時,一第一電極27可形成於部分第一電極層21之上,而一第二電極29可形成於部分第二電極層23之上。 Meanwhile, a first electrode 27 may be formed on a portion of the first electrode layer 21, and a second electrode 29 may be formed on a portion of the second electrode layer 23.
第一電極27可具有較第一電極層21高的導電性,而第二電極29可具有較第二電極層23高的導電性,但本實施例不限定於此。 The first electrode 27 may have higher conductivity than the first electrode layer 21, and the second electrode 29 may have higher conductivity than the second electrode layer 23, but the embodiment is not limited thereto.
第一和第二電極27及29可包含同樣材料或彼此不同的材料。 The first and second electrodes 27 and 29 may comprise the same material or materials different from each other.
第一和第二電極27及29可形成為一單層結構或一多層結構。 The first and second electrodes 27 and 29 may be formed in a single layer structure or a multilayer structure.
第一和第二電極27及29可包含一代表較佳導電性的金屬材料。舉例來說,第一和第二電極27及29可包含選自由鋁、鈦、鉻、鎳、鉑、金、鎢、銅、和鉬所組成之群組其中至少之一或其合金,但實施例不限定於此。 The first and second electrodes 27 and 29 may comprise a metal material representing preferred conductivity. For example, the first and second electrodes 27 and 29 may comprise at least one selected from the group consisting of aluminum, titanium, chromium, nickel, platinum, gold, tungsten, copper, and molybdenum or alloys thereof, but implemented The example is not limited to this.
第一電極27可形成於第一區41中至少一第一電極層21上。 The first electrode 27 may be formed on at least one of the first electrode layers 21 in the first region 41.
儘管未示於圖中,第一電極27可形成在一被提供於第一區41中的第一電極層21的整個上表面,但本實施例不限定於此。 Although not shown in the drawing, the first electrode 27 may be formed on the entire upper surface of the first electrode layer 21 provided in the first region 41, but the embodiment is not limited thereto.
第一電極層21不只作為一反射層來反射紫外光,也作為一電極來供應電源。既然如此,第一電極27不會形成,但本實施例不限定於此。 The first electrode layer 21 not only reflects ultraviolet light as a reflective layer but also supplies power as an electrode. In this case, the first electrode 27 is not formed, but the embodiment is not limited thereto.
第二電極層23不只作為一反射層來反射紫外光,也作為一電極來供應電源。既然如此,第二電極29不會形成,但本實施例不限定於此。 The second electrode layer 23 not only reflects ultraviolet light as a reflective layer, but also supplies power as an electrode. In this case, the second electrode 29 is not formed, but the embodiment is not limited thereto.
第一和第二電極27及29可具有一圓桶型,但本實施例不限定於此。 The first and second electrodes 27 and 29 may have a drum type, but the embodiment is not limited thereto.
圖4是根據第二實施例的紫外光發光裝置之仰視圖,而圖5是顯示圖4的紫外光發光裝置之剖面圖。 4 is a bottom view of the ultraviolet light emitting device according to the second embodiment, and FIG. 5 is a cross-sectional view showing the ultraviolet light emitting device of FIG. 4.
第二實施例,除了一歐姆層25,其與第一實施例相同。 The second embodiment is identical to the first embodiment except for an ohmic layer 25.
根據第二實施例,相同的參考數字將指向與第一實施例相同的元件,且其中的細節將會被忽略。 According to the second embodiment, the same reference numerals will be given to the same elements as the first embodiment, and the details thereof will be ignored.
參閱圖4和5,根據第二實施例的紫外光發光裝置10A可包含基板11、第一導電半導體層15、活化層17、第二導電半導體層19、歐姆層25、第一和第二電極層21及23、與第一和第二電極27及29。 4 and 5, the ultraviolet light emitting device 10A according to the second embodiment may include a substrate 11, a first conductive semiconductor layer 15, an active layer 17, a second conductive semiconductor layer 19, an ohmic layer 25, first and second electrodes Layers 21 and 23, and first and second electrodes 27 and 29.
歐姆層25可插入第一導電半導體層15和第一電極層21之間。 The ohmic layer 25 may be interposed between the first conductive semiconductor layer 15 and the first electrode layer 21.
第一電極層21可全部或部分地覆蓋歐姆層25,但本實施例不限定於此。換句話說,儘管第一電極層21提供於歐姆層25的外表面和下表面之上,第一電極層21不會被提供於歐姆層25的內表面之上,但本實施例不限定於此。 The first electrode layer 21 may cover the ohmic layer 25 in whole or in part, but the embodiment is not limited thereto. In other words, although the first electrode layer 21 is provided on the outer surface and the lower surface of the ohmic layer 25, the first electrode layer 21 is not provided on the inner surface of the ohmic layer 25, the embodiment is not limited to this.
歐姆層25可提供於沿活化層17的周圍,但本實施例不限 定於此。歐姆層25可具有一封閉(close-loop)環型或是開放(open-loop)環形,但本實施例不限定於此。 The ohmic layer 25 may be provided along the periphery of the active layer 17, but the embodiment is not limited It is here. The ohmic layer 25 may have a close-loop ring type or an open-loop ring shape, but the embodiment is not limited thereto.
歐姆層25可形成於第一區41中,該區為經由平台蝕刻法後,暴露出的第一導電半導體層15所定義。 The ohmic layer 25 may be formed in the first region 41 defined by the exposed first conductive semiconductor layer 15 after the plate etching method.
歐姆層25至少可包含一透明傳導材料。舉例來說,歐姆層25可包含選自由銦錫氧化物(ITO)、銦鋅氧化物(IZO)、銦鋅錫氧化物(IZTO)、銦鋁鋅氧化物(IAZO)、銦鎵鋅氧化物(IGZO)、銦鎵錫氧化物(IGTO)、鋁鋅氧化物(AZO)、銻錫氧化物(ATO)、鎵鋅氧化物(GZO)、銥氧化物(IrOx)、釕氧化物(RuOx)、釕氧化物/銦錫氧化物(RuOx/ITO)、鎳(Ni)、銀(Ag)、鎳/銥氧化物/金(Ni/IrOx/Au)及鎳/銥氧化物/銦錫氧化物所組成之群組其中至少之一。 The ohmic layer 25 can include at least one transparent conductive material. For example, the ohmic layer 25 may comprise an indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide. (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), antimony oxide (IrOx), antimony oxide (RuOx) , niobium oxide/indium tin oxide (RuOx/ITO), nickel (Ni), silver (Ag), nickel/niobium oxide/gold (Ni/IrOx/Au), and nickel/niobium oxide/indium tin oxide At least one of the group consisting of.
歐姆層25沿第二區43的周圍部分形成封閉環型結構,第二區43由第二導電半導體層19定義,該層對應於未經平台蝕刻法所露出在外的第一導電半導體層,但本實施例不限定於此。換句話說,歐姆層25可形成於環繞發光結構20周圍的第一導電半導體層15之上。 The ohmic layer 25 forms a closed ring structure along the peripheral portion of the second region 43, and the second region 43 is defined by the second conductive semiconductor layer 19, which corresponds to the first conductive semiconductor layer exposed without the terrace etching method, but This embodiment is not limited to this. In other words, the ohmic layer 25 may be formed over the first conductive semiconductor layer 15 surrounding the light emitting structure 20.
舉例來說,歐姆層25可形成與提供於第二區43的活化層17之側邊表面相鄰。 For example, the ohmic layer 25 may be formed adjacent to a side surface of the active layer 17 provided to the second region 43.
歐姆層25可與一被提供於第二區43的活化層17側邊表面隔開。 The ohmic layer 25 may be spaced apart from a side surface of the active layer 17 provided in the second region 43.
歐姆層25和第二區43間的距離d可介在範圍1到10微米間,但實施例不限定於此。 The distance d between the ohmic layer 25 and the second region 43 may be in the range of 1 to 10 μm, but the embodiment is not limited thereto.
換句話說,第二區43的第一導電半導體層15可往下突出至第一區41的第一導電半導體層15外。活化層17和第二導電半導體層19可提供於第一區41的第一導電半導體層15之下。第一導電半導體層15的側邊表面藉第一區41的第一導電半導體層15下表面和第二區43的第一導電半導體層15下表面之間的厚度被提供。既然如此,歐姆層25和第二區43間的距離d可介在範圍1到大約10微米間,但本實施例不限定於此。 In other words, the first conductive semiconductor layer 15 of the second region 43 may protrude downward to the outside of the first conductive semiconductor layer 15 of the first region 41. The active layer 17 and the second conductive semiconductor layer 19 may be provided under the first conductive semiconductor layer 15 of the first region 41. The side surface of the first conductive semiconductor layer 15 is provided by the thickness between the lower surface of the first conductive semiconductor layer 15 of the first region 41 and the lower surface of the first conductive semiconductor layer 15 of the second region 43. In this case, the distance d between the ohmic layer 25 and the second region 43 may be in the range of 1 to about 10 μm, but the embodiment is not limited thereto.
為了快速提供電流給活化層,歐姆層25盡可能越鄰近活化層17越佳。 In order to rapidly supply current to the active layer, the ohmic layer 25 is as close as possible to the active layer 17 as much as possible.
儘管未示於圖中,若與活化層17的電子短路未發生,歐姆 層25可連接於第一導電半導體層15的側邊表面。既然如此,第一導電半導體層15可被更深地蝕刻,使第一導電半導體層15的下表面與活化層17的側邊表面隔開。 Although not shown in the figure, if an electron short circuit with the active layer 17 does not occur, ohmic The layer 25 may be connected to a side surface of the first conductive semiconductor layer 15. In this case, the first conductive semiconductor layer 15 can be etched deeper to separate the lower surface of the first conductive semiconductor layer 15 from the side surface of the active layer 17.
歐姆層25可沿第二區43的周圍部分形成一棒形。 The ohmic layer 25 may form a rod shape along the peripheral portion of the second region 43.
歐姆層25的寬度w可介於範圍約5到30微米間,但本實施例不限定於此。 The width w of the ohmic layer 25 may be in the range of about 5 to 30 μm, but the embodiment is not limited thereto.
歐姆層25的區域可相同或窄於第一電極層21,但本實施例不限定於此。 The area of the ohmic layer 25 may be the same or narrower than the first electrode layer 21, but the embodiment is not limited thereto.
除此之外,歐姆層25可形成於一被提供於第一區41中的第一導電半導體層15全區之上,但實施例不限定於此。 In addition to this, the ohmic layer 25 may be formed over a whole region of the first conductive semiconductor layer 15 provided in the first region 41, but the embodiment is not limited thereto.
根據第二實施例,歐姆層25形成於第一導電半導體層15的下表面之上來流暢地供應能量給第一導電半導體層15,並進行一電流擴散的功能,其允許電流在第一導電半導體層15中廣泛的橫向擴散,,使光提取效率可改善,且確保均勻的紫外光。 According to the second embodiment, the ohmic layer 25 is formed over the lower surface of the first conductive semiconductor layer 15 to smoothly supply energy to the first conductive semiconductor layer 15, and performs a current spreading function, which allows current to flow in the first conductive semiconductor Extensive lateral diffusion in layer 15 improves light extraction efficiency and ensures uniform ultraviolet light.
第一電極層21可覆蓋歐姆層25的所有側邊表面和下表面。換句話說,第一電極層21可環繞歐姆層25。歐姆層25盡可能與第一電極層21做表面連接,使能量從第一電極27經由第一電極層21供給歐姆層25的側邊表面和下表面。因此,能量可更流暢地供給第一導電半導體層15。 The first electrode layer 21 may cover all of the side surfaces and the lower surface of the ohmic layer 25. In other words, the first electrode layer 21 may surround the ohmic layer 25. The ohmic layer 25 is surface-connected as much as possible to the first electrode layer 21, so that energy is supplied from the first electrode 27 to the side surface and the lower surface of the ohmic layer 25 via the first electrode layer 21. Therefore, energy can be supplied to the first conductive semiconductor layer 15 more smoothly.
儘管未示於圖中,第一電極層21可與歐姆層25的下表面和外表面部分重疊,但 本實施例不限定於此。換句話說,第一電極層21不是形成一被提供於第二區43中第一導電半導體層15之側邊表面上。 Although not shown in the drawings, the first electrode layer 21 may partially overlap the lower surface and the outer surface of the ohmic layer 25, but the embodiment is not limited thereto. In other words, the first electrode layer 21 is not formed on a side surface of the first conductive semiconductor layer 15 provided in the second region 43.
圖6是根據第三實施例的紫外光發光裝置之仰視圖,而圖7是顯示圖6的紫外光發光裝置之剖面圖。 Figure 6 is a bottom plan view of the ultraviolet light emitting device according to the third embodiment, and Figure 7 is a cross-sectional view showing the ultraviolet light emitting device of Figure 6.
第三實施例,除了保護層31,其與第二實施例相同。 The third embodiment is identical to the second embodiment except for the protective layer 31.
根據第三實施例,相同的參考數字係指第一及第二實施例相同的元件,且其中的細節將會被忽略。 According to the third embodiment, the same reference numerals refer to the same elements of the first and second embodiments, and the details thereof will be omitted.
參閱圖6和7,一根據第三實施例的紫外光發光裝置10B可包含基板11、第一導電半導體層15、活化層17、第二導電半導體層19、歐姆層25、第一和第二電極層21及23、保護層31、與第一和第二電極27 及29。 Referring to FIGS. 6 and 7, an ultraviolet light emitting device 10B according to a third embodiment may include a substrate 11, a first conductive semiconductor layer 15, an active layer 17, a second conductive semiconductor layer 19, an ohmic layer 25, first and second Electrode layers 21 and 23, protective layer 31, and first and second electrodes 27 And 29.
如上所述,根據第一實施例,為了完全阻止由第一電極層21引起的第一和第二導電半導體層15及19之間的電子短路,保護層31可形成於第一導電半導體層15、活化層17、和第二導電半導體層19的邊表面之上,這些區域如圖7所示,在第二區43中露出在外,但本實施例不限定於此。 As described above, according to the first embodiment, in order to completely prevent the electronic short circuit between the first and second conductive semiconductor layers 15 and 19 caused by the first electrode layer 21, the protective layer 31 may be formed on the first conductive semiconductor layer 15. Above the side surfaces of the active layer 17 and the second conductive semiconductor layer 19, these regions are exposed as shown in FIG. 7 in the second region 43, but the embodiment is not limited thereto.
第二區43包含未經平台蝕刻法蝕刻的第一導電半導體層15、和與第一導電半導體層15相對應的活化層17及第二導電半導體層19。 The second region 43 includes a first conductive semiconductor layer 15 that is not etched by the terrace etching, and an active layer 17 and a second conductive semiconductor layer 19 that correspond to the first conductive semiconductor layer 15.
第一區41可包含經平台蝕刻法蝕刻並露出在外的第一導電半導體層15。 The first region 41 may include the first conductive semiconductor layer 15 etched by the terrace etching and exposed.
第一區41是一非發光區,而第二區43是一發光區。 The first zone 41 is a non-light emitting zone and the second zone 43 is a light emitting zone.
保護層31可被提供於發光結構20的側邊表面上。保護層31可被提供於至少一活化層17的側邊表面上,但本實施例不限定於此。保護層31可供於供於第二區43中的第一導電半導體層15、活化層17、和第二導電半導體層19的側邊表面上。除此之外,保護層31可供於供於第二區43中的歐姆層25和第一導電半導體層17的側邊表面之上。 The protective layer 31 may be provided on the side surface of the light emitting structure 20. The protective layer 31 may be provided on the side surface of at least one of the active layers 17, but the embodiment is not limited thereto. The protective layer 31 is available for supply to the side surfaces of the first conductive semiconductor layer 15, the active layer 17, and the second conductive semiconductor layer 19 in the second region 43. In addition to this, the protective layer 31 is available for supply over the ohmic layer 25 in the second region 43 and the side surface of the first conductive semiconductor layer 17.
保護層31可形成於供於第一區41的第一導電半導體層15下表面之上,並插入第一電極層21與供於第二區43中的第一導電半導體層15之間。 The protective layer 31 may be formed over the lower surface of the first conductive semiconductor layer 15 supplied to the first region 41 and interposed between the first electrode layer 21 and the first conductive semiconductor layer 15 provided in the second region 43.
保護層31可形成於供於第一區41中的第一導電半導體層15部份下表面、部分的第一電極層21、和發光結構20的一邊表面之上,即是供於第二區43中的第一導電半導體層15、活化層17、第二導電半導體層19、和第二電極層23邊表面,且可形成於第二電極層23的部份下表面之上。 The protective layer 31 may be formed on a lower surface of the first conductive semiconductor layer 15 in the first region 41, a portion of the first electrode layer 21, and a side surface of the light emitting structure 20, that is, in the second region. The first conductive semiconductor layer 15, the active layer 17, the second conductive semiconductor layer 19, and the second electrode layer 23 are disposed on the side surface of the second electrode layer 23, and may be formed on a portion of the lower surface of the second electrode layer 23.
保護層31可包含一代表更佳透光率和低傳導性的材料或一絕緣材料。舉例來說,保護層31可包含選自由二氧化矽、矽氧化物、氮化矽、矽氮化物、氧化鋁、和二氧化鈦所組成之群組的其中之一,但實施例不限定於此。 The protective layer 31 may comprise a material or an insulating material that represents better light transmittance and low conductivity. For example, the protective layer 31 may include one selected from the group consisting of cerium oxide, cerium oxide, cerium nitride, cerium nitride, aluminum oxide, and titanium oxide, but the embodiment is not limited thereto.
根據實施例,第一電極層21形成於第一導電半導體層15下表面之上或形成於第一區41之中,因此往上反射從基板11的上表面往 下反射的紫外光,使光提取效率可顯著改善。 According to the embodiment, the first electrode layer 21 is formed on the lower surface of the first conductive semiconductor layer 15 or formed in the first region 41, and thus is reflected upward from the upper surface of the substrate 11 toward The lower reflected ultraviolet light can significantly improve the light extraction efficiency.
根據實施例,第二電極層23形成於第二導電半導體層19下表面之上,因此往上反射從基板11的上表面往下反射的紫外光、或從活化層17往下發射的紫外光,使光提取效率可顯著改善。 According to the embodiment, the second electrode layer 23 is formed on the lower surface of the second conductive semiconductor layer 19, thereby reflecting upward ultraviolet light reflected downward from the upper surface of the substrate 11, or ultraviolet light emitted downward from the active layer 17. , the light extraction efficiency can be significantly improved.
根據實施例,歐姆層25形成於第一區41的第一導電半導體層15下表面之上,來更流暢地供應能量給第一導電半導體層15,並允許電流可在第一導電半導體層15中往橫向更廣地流動,使光提取效率可改善,且均勻的紫外光可受保證。 According to an embodiment, the ohmic layer 25 is formed over the lower surface of the first conductive semiconductor layer 15 of the first region 41 to more smoothly supply energy to the first conductive semiconductor layer 15, and allows current to flow in the first conductive semiconductor layer 15 The flow to the lateral direction is wider, so that the light extraction efficiency can be improved, and uniform ultraviolet light can be ensured.
圖10是根據實施例的發光裝置組200之剖面圖。 FIG. 10 is a cross-sectional view of a light emitting device group 200 in accordance with an embodiment.
參閱圖10,根據實施例的發光裝置組200包含一主體330、安裝於主體330中的第一和第二引線架310及320、根據第一和第三實施例安裝於主體330中以接收來自第一和第二引線架310及320能量的發光裝置10、和一圍繞發光裝置10的模型組件340。 Referring to FIG. 10, a light emitting device group 200 according to an embodiment includes a main body 330, first and second lead frames 310 and 320 mounted in the main body 330, and mounted in the main body 330 according to the first and third embodiments to receive from The first and second lead frames 310 and 320 are powered by the illumination device 10, and a model assembly 340 surrounding the illumination device 10.
主體330可包含一矽材料、一合成樹脂材料、或一金屬材料,且可具有形成於發光裝置10周圍部分的斜表面。 The body 330 may include a crucible material, a synthetic resin material, or a metal material, and may have an inclined surface formed at a portion around the light emitting device 10.
第一和第二引線架310及320彼此電子絕緣並供應能量給發光裝置10。 The first and second lead frames 310 and 320 are electrically insulated from each other and supply energy to the light emitting device 10.
除此之外,第一和第二引線架310及320反射從發光裝置10發出的光來增加光效率,並將發自發光裝置10的熱能排除在外。 In addition to this, the first and second lead frames 310 and 320 reflect light emitted from the light-emitting device 10 to increase light efficiency, and exclude thermal energy emitted from the light-emitting device 10.
發光裝置10可固定於第一引線架310、第二引線架320、和主體330的其中之一上,並可經由一線路法或一晶片黏合法以電性連接第一和第二引線架310及320,但實施例不限定於此。 The illuminating device 10 can be fixed on one of the first lead frame 310, the second lead frame 320, and the main body 330, and can electrically connect the first and second lead frames 310 via a wire method or a wafer bonding method. And 320, but the embodiment is not limited to this.
根據實施例,儘管根據第一實施例的發光裝置10為達說明的目的經由2線路350與宇第一和第二引線架310及320電性連接,根據第二實施例的發光裝置10可與第一和第二引線架310及320電性連接而不需線路350,且根據第三實施例的發光裝置10可經由1線路350以與第一和第二引線架310及320電性連接。 According to the embodiment, although the light-emitting device 10 according to the first embodiment is electrically connected to the first and second lead frames 310 and 320 via the 2-line 350 for the purpose of illustration, the light-emitting device 10 according to the second embodiment may be The first and second lead frames 310 and 320 are electrically connected without the line 350, and the light emitting device 10 according to the third embodiment can be electrically connected to the first and second lead frames 310 and 320 via the 1 line 350.
模型組件340可圍繞發光裝置10來保護發光裝置10。除此之外,模型組件340可包含一磷光劑來改變從發光裝置10發出的光波長。 Model component 340 can protect lighting device 10 around lighting device 10. In addition to this, the model component 340 can include a phosphor to change the wavelength of light emitted from the illumination device 10.
除此之外,發光裝置組200包含一版上晶片(COB)型發光裝 置組。主體330可具有一平坦上表面,並與複數個發光裝置10供於其中。 In addition, the light-emitting device group 200 includes a plate-on-chip (COB) type light-emitting device. Set the group. The body 330 can have a flat upper surface and is provided with a plurality of illumination devices 10.
本說明書中提及的「一實施例」、「實施例」、「範例實施例」等任何引用,意味著本發明之至少一實施例中包含關於該實施例的一特定特徵、結構、或特色。此類用語出現在文中多處,但不必然要參考相同的實施例。再者,當一特定特徵、結構、或特色的描述與任何實施例有關時,可認為是在熟習此技藝者的知識範圍中利用如此的特徵、結構、或特色與其他實施例連結。 Any reference to "an embodiment", "an embodiment", "an example embodiment" or the like in this specification means that at least one embodiment of the present invention includes a specific feature, structure, or characteristic of the embodiment. . Such terms appear in many places in the text, but do not necessarily refer to the same embodiment. Furthermore, when a description of a particular feature, structure, or feature is described in connection with any embodiment, it is contemplated that such features, structures, or characteristics are utilized in connection with other embodiments.
儘管參考許多說明性實施例來描述實施例,應理解的是,其他眾多的修改和實施例可被落入本發明之原理的精神與範疇中的熟習此技藝者所設計出。尤其是,在本發明、圖示、和所附申請專利範圍的範疇內,主張組合配置的零件及/或配置的各樣變化和修改是可能的。除了零件及/或配置的變化和修改,對熟習此技藝者而言,替代用途亦將顯見。 While the embodiments have been described with reference to the various embodiments of the embodiments of the present invention, it is understood that many other modifications and embodiments can be devised by those skilled in the art. In particular, various variations and modifications of the parts and/or arrangements of the combinations are possible in the scope of the invention, the invention, and the scope of the appended claims. In addition to variations and modifications in parts and/or configurations, alternative uses will also be apparent to those skilled in the art.
11‧‧‧基板 11‧‧‧Substrate
13‧‧‧緩衝層 13‧‧‧buffer layer
15‧‧‧第一導電半導體層 15‧‧‧First conductive semiconductor layer
17‧‧‧活化層 17‧‧‧Active layer
19‧‧‧第二導電半導體層 19‧‧‧Second conductive semiconductor layer
20‧‧‧發光結構 20‧‧‧Lighting structure
21‧‧‧第一電極層 21‧‧‧First electrode layer
23‧‧‧第二電極層 23‧‧‧Second electrode layer
29‧‧‧第二電極 29‧‧‧second electrode
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KR102601417B1 (en) * | 2017-09-28 | 2023-11-14 | 서울바이오시스 주식회사 | Light emitting diode chip |
US10937928B2 (en) | 2017-11-09 | 2021-03-02 | Asahi Kasei Kabushiki Kaisha | Nitride semiconductor element, nitride semiconductor light emitting element, ultraviolet light emitting element |
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US5557115A (en) * | 1994-08-11 | 1996-09-17 | Rohm Co. Ltd. | Light emitting semiconductor device with sub-mount |
US20050087755A1 (en) * | 2003-10-27 | 2005-04-28 | Samsung Electronics Co., Ltd. | Electrode structure, and semiconductor light-emitting device having the same |
US20100051994A1 (en) * | 2008-08-28 | 2010-03-04 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device and semiconductor light emitting apparatus |
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JP2007103689A (en) | 2005-10-05 | 2007-04-19 | Matsushita Electric Ind Co Ltd | Semiconductor light emitting device |
US7626210B2 (en) | 2006-06-09 | 2009-12-01 | Philips Lumileds Lighting Company, Llc | Low profile side emitting LED |
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US5557115A (en) * | 1994-08-11 | 1996-09-17 | Rohm Co. Ltd. | Light emitting semiconductor device with sub-mount |
US20050087755A1 (en) * | 2003-10-27 | 2005-04-28 | Samsung Electronics Co., Ltd. | Electrode structure, and semiconductor light-emitting device having the same |
US20100051994A1 (en) * | 2008-08-28 | 2010-03-04 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device and semiconductor light emitting apparatus |
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