TWI585859B - Method for forming a silicide layer - Google Patents

Description

Method for forming metal telluride layer

The present invention relates to the field of semiconductor processing, and more particularly to a method of fabricating a metal halide layer.

Metal-oxide-semiconductor (MOS) transistors are very important components in semiconductor integrated circuits, and the electrical performance of gate and source/drain is the key to the quality of MOS transistors. Conventional gates typically include a poly-silicon layer used as the primary conductive layer, and the source/drain electrodes are formed by doping regions of ions implanted on the single crystal germanium substrate, so A metal germanide layer is formed over the polysilicon layer and over the doped region to reduce the sheet resistance of the gate and increase the operating speed of the MOS transistor.

It is worth noting that the general metal halide layer fabrication process requires two heat treatment (RTP) processes, first covering a surface containing a metal atom on the surface of the substrate for the first RTP process to bond the metal atomic layer. The base substrate of the contact substrate reacts to form a transition metal halide layer having a small crystal grain and a high resistance value; and then removing the metal atom-containing layer to leave only the newly formed transition metal telluride layer on the surface of the substrate Then, the second RTP process is continued to cause the transition metal halide layer to undergo a phase transition and lower the resistance value at a higher temperature to form a metal telluride layer. However, after the completion of the second RTP, the metal telluride layer formed on the surface of the substrate has a contour. Uniform problems, especially in areas of low metal telluride layout pattern density, severely affect the quality of the metal telluride layer.

In order to solve the above problems, the present invention provides a method of forming a metal telluride layer. First forming a metal atom-containing layer on a substrate, and then performing a first heat treatment step on the metal atom-containing layer to form a transition metal halide layer in a specific region, and then removing the metal atom-containing layer, and then removing A thermally conductive layer is formed on the surface of the metal halide layer, and then a second heat treatment is performed on the transition metal halide layer.

The invention is characterized in that after removing the metal atom-containing layer and before performing the second heat treatment, a heat conducting layer is formed on the surface of the exposed transition metal halide layer, so that the heat provided by the second heat treatment is provided by the heat conducting layer It can be more completely and uniformly conducted to the transition metal halide layer, and the temperature required for the second heat treatment is lower than that of the conventional metal halide layer, but the quality of the formed metal halide layer can be improved.

The present invention will be further understood by those of ordinary skill in the art to which the present invention pertains. .

For the convenience of description, the drawings of the present invention are only for the purpose of understanding the present invention, and the detailed proportions thereof can be adjusted according to the design requirements. As described in the text for the figure The relationship between the upper and lower relative elements of the shape should be understood by those skilled in the art to refer to the relative positions of the objects, so that the same components can be flipped and presented, which are all within the scope of the present disclosure. This is described first.

Please refer to FIGS. 1~6, and FIGS. 1~6 are schematic cross-sectional views showing the structure of the first preferred embodiment of the present invention. First, as shown in FIG. 1, a substrate 10 is provided, such as a silicon substrate, an epitaxial silicon substrate, a silicon germanium substrate, or a silicon carbide substrate. In this embodiment, a bulk silicon substrate is taken as an example, but not limited thereto. The substrate 10 can include a gate structure 12 and a source/drain region 14, and a shallow trench isolation (STI) 16 is disposed in the substrate 10 and surrounds the gate structure 12 and the source/drain region 14 . The gate structure 12 can be a metal gate or a polysilicon gate. The present embodiment is described by a polysilicon gate. Therefore, when a metal germanide layer is formed on the surface of the source/drain region 14, a polysilicon gate is also required. A metal telluride layer is formed on the surface. In addition, the embodiment further includes a dielectric layer (not shown) between the gate structure 12 and the substrate 10, and the gate structure 12 includes a sidewall 27 covering the side of the gate structure 12. Regarding the manufacturing method of each element, the shallow trench isolation 16 forms a plurality of shallow trenches in the substrate 10 by etching or the like, and then fills an insulating material in each shallow trench, and the shallow doped drain and the source/germanium The pole region 14 is formed in the substrate 10 by ion implantation or the like without being covered by the gate structure 12. The fabrication of the gate structure 12, the source/drain region 14 and the shallow trench isolation 16 is well known to those skilled in the art and will not be described herein.

Next, as shown in Fig. 2, a self-aligned silicide (salicide) process is performed. For example, a metal atom-containing layer 30 is formed on the surface of the substrate 10 at the same time, and simultaneously covers the gate structure 12, the source/drain region 14, the shallow trench isolation 16 and other portions of the surface of the substrate 10. The metal atom-containing layer 30 can be For example, a metal layer, a metal alloy layer or a metal compound layer is described by taking a nickel-platinum alloy (Ni/Pt) as an example, but is not limited thereto, and other materials such as cobalt (Co) may also be used according to the production requirements. a metal-containing atomic layer which can react with germanium atoms such as titanium (Ti). Then, a first heat treatment 40 is performed on the metal atom-containing layer 30, wherein the temperature of the first heat treatment 40 is preferably between 200 and 300 ° C, so that the metal atom-containing layer 30 reacts with the surface of the contact material, such as a gate. The polar structure 12, the single crystal germanium, the epitaxial germanium, the germanium (SiGe), the germanium carbon (SiC) or the germanium phosphorous (SiP) on the surface of the source/drain region 14 react to form a transition metal telluride layer 33. . The main component of the transition metal telluride layer 33 of this embodiment is, for example, Ni ₂ Si. It should be noted that the transition metal halide layer 33 can be formed only on the surface of the substrate 10 in this embodiment because the region in contact with the metal atom-containing layer 30 must contain germanium atoms. The top of the gate structure 12 (when the gate structure is a germanium-containing gate and the dielectric gate is not covered with a dielectric hard mask layer), the surface of the source/drain region 14 or other metal halides The area of the enamel material that is covered by the silicide block. In another embodiment of the present invention, the gate structure 12 is a laminated structure, and the polysilicon material is overlaid with a dielectric hard mask layer, so that the gate structure is not automatically performed after the automatic alignment of the germanide process. The telluride is formed. This embodiment is not shown in the drawings, but the steps are the same as those described in FIGS. 1-6, except that the telluride is formed on the gate structure 12 in the figure. In addition, before the first heat treatment 40 is performed, the embodiment further selectively covers a cap layer 32 on the metal atom-containing layer 30 to prevent the metal atom-containing layer 30 from directly contacting the air for oxidation, and helps maintain the first heat treatment 40 process. The heat that is uniformly conducted to the transition metal telluride layer 33 is not easily dissipated. In this embodiment, the material of the cap layer 32 may include titanium nitride, tantalum nitride, tungsten nitride, or the like. However, the present invention is not limited thereto, and the cap layer 32 may be composed of other materials according to actual production requirements. The metal-containing atomic layer 30 and the cap layer 32 are preferably formed in-situly or without breaking vacuum, for example, both are formed in the same processing chamber or both are in the same cluster device. Formed in different processing chambers in the (cluster tool).

Thereafter, as shown in FIG. 3, the cap layer 32 and the unreacted metal atom-containing layer 30 are completely removed to expose the source/drain region 14 in which the transition metal telluride layer 33 is formed, the top and the base of the gate structure 12. 10 surface, and then optionally a cleaning process. Next, as shown in FIG. 4, a thermally conductive layer 36 is formed on the surface of the substrate 10, and simultaneously covers the gate structure 12, the source/drain region 14, the shallow trench isolation 16 formed with the transition metal telluride layer 33, and Other parts of the surface of the substrate 10. Next, as shown in FIG. 5, a second heat treatment 42 is performed on the transition metal telluride layer 33 to phase-transform the transition metal telluride layer 33 into a lower-resistance metal halide layer 34 at a higher temperature. In the embodiment, the solid state reaction between nickel and ruthenium is also converted from nickel-rich (Ni ₂ Si) to nickel hydride (NiSi) having the lowest Rs value of monosilicide, but is not limited thereto.

In addition, in this embodiment, the temperature of the second heat treatment 42 is preferably between 350 and 700 ° C, and the material of the heat conduction layer 36 may be selected from the group consisting of titanium nitride, tantalum nitride, tungsten nitride and the like. Or a non-metallic, or other thermally conductive material to help the heat provided by the second heat treatment 42 be completely and uniformly transferred to the transition metal halide layer 33. Improving the quality of the resulting metal halide layer 34.

It is worth noting that in the conventional automatic alignment metal salicide manufacturing process, the metal germanide layout pattern density formed on the semiconductor wafer is also different due to the difference in circuit design. In general, in a region where the density of the metal telluride layout pattern is large, the distribution ratio of the metal telluride to the non-metal telluride (antimony compound or germanium nitrogen compound) is larger than the region where the metal germanide layout pattern density is small, and The thermal conductivity of the metal telluride and the non-metal telluride (the bismuth oxide compound or the ruthenium nitride compound) is different, so after the second heat treatment for performing the phase change, the metal telluride layer formed on the surface of the substrate may be present. The problem of uneven contour, especially in the area of low metal telluride layout pattern density, seriously affects the quality of the metal telluride layer. Even if the temperature of the second heat treatment is greater than 700 ° C, the phase transition of the transition metal telluride layer is still Not quite complete. However, the present invention has a heat conducting layer 36 covering the transition metal vapor layer 33, so that even if the temperature of the second heat treatment 42 does not exceed 700 ° C, the heat provided by the second heat treatment 42 can be completely and uniformly It is transferred to the transition metal telluride layer 33 to make the metal telluride layer 34 in a good state.

Further, the material of the heat conductive layer 36 may be the same as or different from the cover layer 32. In order to facilitate the removal of the heat conductive layer 36 from the surface of the metal telluride layer 34 in the subsequent step, the material of the heat conductive layer 36 is preferably a material having a higher etching selectivity ratio with the metal germanide layer 34. In addition, the heat conducting layer 36 is preferably made of a material that does not react with germanium atoms, or a material having a reaction temperature higher than 700 ° C with germanium atoms, to prevent the heat conducting layer 36 from reacting with germanium atoms during the second heat treatment 42. The formation of the metal telluride layer 34 is affected.

Finally, as shown in Fig. 6, the thermally conductive layer 36 is removed and a cleaning process can be selectively applied to complete the metal halide layer 34 of the present invention. The present invention is characterized in that a heat conducting layer 36 is formed on the surface of the exposed transition metal telluride layer 33 before the second heat treatment 42 is performed, and the heat of the second heat treatment 42 is more completely and uniformly transmitted to the heat conductive layer 36. Each transition metal telluride layer 33 enhances the quality of formation of the metal telluride layer 34.

7 is a flow chart showing a manufacturing method of the first preferred embodiment of the present invention. As shown in FIG. 7, the manufacturing method of the present invention includes at least step S10: forming a metal atom-containing layer on a substrate; and step S12: Performing a first heat treatment on the metal atom-containing layer to form a transition metal telluride layer; step S14: removing the metal atom-containing layer; step S16: forming a heat conductive layer on the transition metal halide layer; and step S18 : performing a second heat treatment on the transition metal halide layer. In addition, between step S10 and step S12, a cap layer is selectively formed to cover the metal atom-containing layer, and after step S18, the heat conductive layer is selectively removed.

It should be noted that the manufacturing method provided by the present invention can also be integrated with a post-contact, and the eighth to ninth are schematic cross-sectional views of the second preferred embodiment of the present invention, as shown in FIG. As shown, a transistor is formed on the substrate 10. The transistor includes a gate structure 12, a source/drain region 14 and a shallow trench isolation 16, and then a dielectric layer 20 is formed to cover the transistor, followed by etching or the like. A plurality of contact holes 22 are selectively formed to expose the gate structure 12 and the top of the source/drain regions 14, and then a metal germanide layer is formed inside each of the contact holes 22. The manufacturing method is the same as the first preferred embodiment of the present invention, including Forming a metal atom-containing layer (not shown) and a cap layer (not shown) in the contact hole 22, and then performing a first heat treatment (not shown) to make the surface containing the metal atom layer and the contact material The reaction generates a transition metal halide layer (not shown), and then removes the unreacted metal-containing atomic layer and the cap layer, and then forms a heat conductive layer 38 in the contact hole 22, and performs a second heat treatment 42 to A transition metal telluride layer (not shown) in each contact hole 22 is converted into a metal telluride layer 48. The dielectric layer 20 in this embodiment may be a single dielectric layer or a combination of multiple dielectric layers, such as SiC doped with nitrogen or oxygen or undoped SiC. ), tantalum nitride, undoped or phosphorus-doped bismuth glass (USG or PSG), yttrium oxide formed with tetraethoxy decane (TEOS) as a precursor, low dielectric constant (low-k) or Ultra low-k dielectric material, or any combination thereof. The difference between the present embodiment and the first preferred embodiment is that the formed metal halide layer 48 is only located in each contact hole 22, and the features, material characteristics and manufacturing method of the remaining components are compared with the first preferred embodiment. Similar, so I won't go into details here.

After the metal germanide layer 48 of the second embodiment is completed, as shown in FIG. 9, a contact structure may be formed over the metal telluride layer 48 to be connected to other external components, such as a barrier layer. (not shown), the conductive layer 24 is in the contact hole 22, and then a planarization process, such as chemical mechanical polishing (CMP), to remove the excess heat conduction layer 38 and the conductive layer on the surface of the dielectric layer 20. 24 is removed to complete a plurality of contact structures 26. It should be noted that in this embodiment, the heat conductive layer 38 may remain in the contact hole 22 as the case may be. That is, after the second heat treatment 42 is performed, it may be selected not to remove the heat conductive layer 38, and the heat conductive layer 38 may serve as the contact structure 26 at this time. In the case of a barrier layer, for example, tungsten (tungsten, W) is generally used as a conductive layer filled in a contact hole, and when the heat conductive layer is made of a titanium/titanium nitride layer (Ti/TiN), The heat conductive layer 38 can be directly retained on the metal germanide layer 48 in the contact hole 22, and used as a barrier layer to prevent the conductive layer 24 filled in the contact hole 22 from being diffused into the substrate 10 in a subsequent process, and directly filled with tungsten ( W). Of course, after the metal halide layer of the first preferred embodiment of the present invention is completed, a contact structure (not shown) may be further formed on the metal telluride layer, and the metal telluride layer can effectively reduce the contact structure and the gate. Structure or resistance between source/drain regions. However, it is worth noting that since the heat conducting layer 36 is completely covered on the entire transistor in the first preferred embodiment, the conductive heat conducting layer 36 needs to be removed before the contact structure can be further fabricated. The contact structures are connected to each other and short-circuited, and if the material of the heat-conducting layer 36 is made of a non-metal material, it can be selectively removed.

In the above embodiments, the gate structure is a typical example of a polysilicon gate, but the metal gate can also be used in the present invention, in which case the metal halide layer is not formed on the gate structure. In addition, the metal gate can also be combined with a high-k first gate last process, a high-k last gate last process or a high-k last gate last process or The gate first process integrates the metal gate process integration of the front high-k first layer, and further includes a high dielectric constant (high-k) material layer. It may be selected from hafnium oxide (HfO ₂ ), hafnium silicon oxide (HfSiO ₄ ), hafnium silicon oxynitride (HfSiON), aluminum oxide (aluminum oxide, Al _{2 ).} O ₃ ), lanthanum oxide (La ₂ O ₃ ), tantalum oxide (Ta ₂ O ₅ ), yttrium oxide (Y ₂ O ₃ ), zirconium oxide (ZrO ₂ ), Strontium titanate oxide (SrTiO ₃ ), zirconium silicon oxide (ZrSiO ₄ ), hafnium zirconium oxide (HfZrO ₄ ), strontium bismuth tantalate (SrBi _{2 )} Ta ₂ O ₉ , SBT), lead zirconate titana Te, PbZr _x Ti _1-x O ₃ , PZT) and a group consisting of barium strontium titanate (Ba _x Sr _1-x TiO ₃ , BST). Further, it is also possible to form a contact hole only on the source/drain without forming a contact hole on the metal gate, so that the metal atomic layer, the cap layer, and the heat conductive layer do not contact the metal gate at all during the metal telluride process.

In summary, the present invention is characterized in that a heat conducting layer is formed on the surface of the exposed transition metal halide layer before removing the cap layer and the unreacted metal atom-containing layer and before performing the second heat treatment. The heat provided by the second heat treatment can be more completely and uniformly conducted to the transition metal halide layer, and the temperature required for the second heat treatment is lower than that of the conventional metal halide layer, but is formed. The quality of the metal halide layer can be improved.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

10‧‧‧Substrate

12‧‧‧ gate structure

14‧‧‧Source/bungee area

16‧‧‧Shallow trench isolation

20‧‧‧Dielectric layer

22‧‧‧Contact hole

24‧‧‧ Conductive layer

26‧‧‧Contact structure

27‧‧‧ Sidewall

30‧‧‧Metal atomic layer

32‧‧‧ cover

33‧‧‧Transition metal telluride layer

34‧‧‧metal telluride layer

36‧‧‧Conducting layer

38‧‧‧thermal layer

40‧‧‧First heat treatment

42‧‧‧second heat treatment

48‧‧‧metal telluride layer

S10~S18‧‧‧Steps

1 to 6 are schematic cross-sectional views showing the structure of the first preferred embodiment of the present invention.

FIG. 7 is a flow chart showing a manufacturing method of the first preferred embodiment of the present invention.

8 to 9 are schematic cross-sectional views showing the structure of a second preferred embodiment of the present invention.

S10~S18‧‧‧Steps

Claims (13)

A method for forming a metal telluride layer, comprising: forming a metal atom-containing layer on a substrate; performing a first heat treatment on the metal atom-containing layer to form a transition metal telluride layer in a specific region; a metal atomic layer; forming a heat conducting layer on the surface of the transition metal germanide layer; and performing a second heat treatment on the transition metal germanide layer to form a metal germanide layer, wherein the temperature of the second heat treatment is between 350 ° C Between ~700 ° C, in addition, the thermally conductive layer is formed in a contact hole, and the thermally conductive layer is not removed after the second heat treatment is performed. The method for forming the first aspect of the patent application further includes forming a cap layer on the metal atom-containing layer. The method for forming the first aspect of the patent application, further comprising removing the thermally conductive layer after the second heat treatment. The method of forming the method of claim 1, wherein the substrate comprises at least one gate and at least one source/drain region, and the specific region refers to a surface of the gate or a surface of the source/drain region . For example, the method for forming the fourth aspect of the patent application, wherein the gate is extremely sturdy or A metal gate. The method for forming the fifth aspect of the patent application further includes forming a dielectric hard mask layer over the germanium-containing gate. For example, the method for forming the fifth aspect of the patent application includes forming a plurality of contact holes on the germanium-containing gate and the source/drain region. The method of forming a seventh aspect of the invention, wherein the metal telluride layer is formed in each of the contact holes. The method of forming the first aspect of the patent application, wherein the specific region refers to the surface of the substrate that is not blocked by a metal silicide block. The method of forming the first aspect of the patent application, wherein the specific region refers to a region in which the surface of the substrate is surrounded by a shallow trench. The method of forming the first aspect of the invention, wherein the material of the heat conducting layer is selected from the group consisting of titanium nitride, tantalum nitride, tungsten nitride, and the like. The method for forming a second aspect of the patent application, wherein the cover material is selected from the group consisting of titanium nitride, tantalum nitride, tungsten nitride, and the like. For example, the method for forming the first item of the patent scope includes forming a contact with the gold It is on the germanide layer or on the heat conductive layer.