TWI566331B - Package module and its substrate structure - Google Patents

Description

Package module and its substrate structure

The invention relates to a substrate structure, in particular to a substrate structure for arranging electronic components.

With the development of the electronics industry, today's electronic products have been designed in a light, short, and versatile manner, and semiconductor packaging technologies have also developed different packaging types.

As shown in Fig. 1, a conventional package module 1 includes a substrate structure 1', an active device 8a, a passive component 8b, and a package 9.

The substrate structure 1 ′ includes a first circuit layer 11 , a plurality of first conductive pillars 100 formed on the first circuit layer 11 , and a first conductive layer and a first conductive pillar a first insulating layer 13 of 100, a second circuit layer 12 formed on the first insulating layer 13, a plurality of second conductive pillars 15 formed on the second wiring layer 12, and a second wiring layer And a second insulating layer 14 of the second conductive pillar 15 , a third wiring layer 16 formed on the second insulating layer 14 , a plurality of conductive bumps 160 formed on the third wiring layer 16 , and An insulating protective layer 17 is formed on the second insulating layer 14 and the third wiring layer 16 , and the conductive bumps 160 are exposed on the insulating protective layer 17 for bonding the plurality of conductive elements 18 .

The active component 8a and the passive component 8b are coupled to the first circuit layer 11 by a plurality of conductive components 19.

The package material 9 is formed on the substrate structure 1' to cover the active element 8a and the passive element 8b.

In the conventional substrate structure 1', the first circuit layer 11, the first conductive pillar 100 and the first insulating layer 13 are used as a line portion 1a, and the second circuit layer 12 and the second conductive pillar 15 are The second insulating layer 14 also serves as a wiring portion 1b, and the third wiring layer 16, the conductive bump 160, and the insulating protective layer 17 serve as another wiring portion 1c.

Moreover, since the common substrate is formed with conductive vias for connecting the upper and lower circuit layers on the substrate, in the conventional substrate structure 1', the circuit layers on the upper and lower sides are respectively the first circuit layer 11 And the third circuit layer 16, and thus the first conductive pillar 100 and a portion of the second conductive pillar 15 can be regarded as the conductive via 10 of the substrate structure 1'.

Moreover, the substrate structure 1' is a substrate of a high-density circuit, which is mainly applied to electronic products of high-order chips, and the products are often light, thin, and short, and when the function of the product is stronger, faster, and the storage amount is higher. Then, a higher-order material (such as a material having a very small particle size of the insulating layer) is used to fabricate a multilayer wiring structure (such as the three-layer wiring portion 1a, 1b, 1c shown in Fig. 1) to form a high-density circuit. Substrate structure 1'. Specifically, the circuit in the substrate structure 1' electrically connected to the active device 8a is fabricated by a fine line process, and the fine circuit region A for setting the active device 8a in the substrate structure 1' needs to use a high-order material ( That is, the size of the material particles of the first and second insulating layers 13, 14 is extremely small, about less than 5 um).

However, the non-fine line region B of the substrate structure 1' for arranging the passive element 8b also needs to be used with the fine line region A to use a high-order material, thereby resulting in an extremely high cost of the overall fabrication of the substrate structure 1'.

Further, the substrate structure 1' is required to include the plurality of wiring portions 1a, 1b, 1c to match the high-order wafer, so that the overall thickness of the substrate structure 1' is thick.

Moreover, when the conductive via 10 is formed, the alignment stacking between the two wiring portions 1a, 1b is required, so that the alignment error between the first conductive pillar 100 and the second conductive pillar 15 is highly likely to occur. In turn, the quality of the conductive via 10 is affected.

Therefore, how to avoid all kinds of defects in the prior art has become a problem that is currently being solved.

In view of the above-mentioned various deficiencies of the prior art, the present invention provides a substrate structure comprising: a first insulating layer having opposite first and second surfaces; and a first circuit layer embedded in the first The first surface is exposed in the insulating layer; a plurality of conductive pillars are disposed in the first insulating layer and electrically connected to the first circuit layer; and a circuit board body is embedded in the first insulating layer And connecting the first and second surfaces, wherein the circuit board body has a plurality of wiring layers and a portion of the wiring layer is exposed on the first and second surfaces; and a second circuit layer is disposed on the circuit board body And electrically connecting the wiring layer to the second surface of the first insulating layer, and electrically connecting the first circuit layer by the conductive pillars.

The present invention also provides a package module comprising: a substrate structure as described above; and at least one first electronic component disposed on the circuit board body The side of the first surface of the first insulating layer is electrically connected to the wiring layer.

The package module includes at least one second electronic component disposed on the first surface of the first insulating layer and electrically connected to the first circuit layer. For example, a plurality of conductive elements are disposed on the first surface of the first insulating layer for bonding the second electronic component and electrically connecting the first circuit layer.

In the above package module, a package material is formed on the first surface of the first insulating layer to cover the first and second electronic components.

In the above package module and its substrate structure, the circuit board body has a second insulating layer for embedding the wiring layer. For example, the material of the second insulating layer is different from the material of the first insulating layer.

In the above package module and its substrate structure, the wiring layer comprises a plurality of conductive traces and a plurality of conductive blind holes electrically connected to the conductive traces.

In the foregoing package module and the substrate structure thereof, the plurality of conductive bumps are further disposed on the second circuit layer. For example, an insulating protective layer is disposed on the second surface of the circuit board body and the first insulating layer and covers the second circuit layer, and the conductive bumps are exposed. A plurality of conductive elements are further included on the conductive bumps.

In addition, the package module and the substrate structure thereof include a plurality of conductive elements disposed on the circuit board body for bonding the first electronic components and electrically connecting the wiring layers.

It can be seen from the above that in the package module and the substrate structure of the present invention, the circuit board body is mainly produced first, and then the circuit board body is introduced into the general substrate manufacturing process. Therefore, only the costly insulating material is used in the circuit board body, The first insulating layer can be made of a relatively inexpensive material, so that the substrate structure of the present invention is less expensive to manufacture than conventional techniques.

Furthermore, since the substrate structure has formed a thin line in the circuit board body, only the second circuit layer may be formed on the first insulating layer. Therefore, the substrate structure can reduce the number of layers of the wiring portion to reduce the thickness of the overall structure as compared with the prior art.

Moreover, the circuit board body has two wiring layers, so in the first insulating layer, the conductive pillar can be regarded as a conductive through hole. Therefore, compared with the prior art, the substrate structure has integrally formed conductive vias, and thus there is no problem of alignment.

1,3‧‧‧Package Module

1', 2‧‧‧ substrate structure

1a, 1b, 1c‧‧‧ Line Department

10‧‧‧ Conductive through hole

100‧‧‧First conductive cylinder

11, 21‧‧‧ first circuit layer

12,22‧‧‧second circuit layer

13,23‧‧‧First insulation

14,241,241'‧‧‧Second insulation

15‧‧‧Second conductive cylinder

16‧‧‧ third circuit layer

160,26‧‧‧Electrical bumps

17,27‧‧‧Insulating protective layer

18,19,28,29,30‧‧‧Conductive components

20‧‧‧Loading board

20a‧‧‧ main area

20b‧‧Auxiliary area

200‧‧‧Adhesive layer

21a‧‧‧Surface

210‧‧‧Electrical connection pads

23a‧‧‧ first surface

23b‧‧‧ second surface

24‧‧‧Circuit board

240,240’‧‧‧ wiring layer

240a, 240a’‧‧‧ conductive traces

240b, 240b’‧‧‧ conductive blind holes

25‧‧‧Electrical cylinder

25a‧‧‧ end face

31‧‧‧First electronic component

32‧‧‧Second electronic components

8a‧‧‧Active components

8b‧‧‧ Passive components

9‧‧‧Package

A‧‧‧fine line area

B‧‧‧Non-fine line area

d, t‧‧‧ particles

1 is a schematic cross-sectional view of a conventional package module; and 2A to 2F are schematic cross-sectional views showing a method of fabricating the package module and the substrate structure thereof; wherein the 2C' is a 2C Partial enlarged view.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The qualifications are not technically meaningful, and any modification of the structure, change of the proportional relationship or adjustment of the size does not affect the work that can be produced by the present invention. Both the effects and the achievable objectives should still fall within the scope of the technical contents disclosed in the present invention. In the meantime, the terms "upper", "lower", "first", "second" and "one" are used in the description for convenience of description, and are not intended to limit the invention. Changes in the scope of implementation, changes or adjustments in their relative relationship, are considered to be within the scope of the present invention.

2A to 2F are schematic cross-sectional views showing the manufacturing method of the package module 3 and the substrate structure 2 of the present invention.

As shown in FIG. 2A, a first wiring layer 21 is formed on a carrier 20 by a patterning process.

In the present embodiment, the carrier 20 is a substrate, such as a copper foil substrate or other plate, and is not particularly limited.

Furthermore, the surface of the carrier plate 20 defines adjacent main regions 20a and auxiliary regions 20b.

Moreover, the first circuit layer 21 is formed on the auxiliary region 20b and includes a plurality of electrical connection pads 210.

In addition, the patterning process includes processes of forming photoresist, exposing and developing, electroplating copper, removing photoresist, and the like.

As shown in FIG. 2B, a circuit board body 24 is disposed on the main area 20a of the carrier board 20 by the adhesive layer 200, wherein the circuit board body 24 is a semi-finished product of the thin circuit board.

In the present embodiment, the circuit board body 24 has two wiring layers 240, 240' and two second insulating layers 241, 241' for burying the two wiring layers 240, 240', and each of the wiring layers 240, 240' includes plural The conductive traces 240a, 240a' are electrically connected to the conductive vias 240b, 240b' of the conductive traces 240a, 240a', wherein the conductive vias 240b are used as the two conductive traces 240a, 240a' Electrical connection between the two.

Furthermore, one of the conductive traces 240a (lower layer) of the wiring layer 240 is exposed on one side (lower side) of the second insulating layer 241, and a part of the conductive blind via 240b' (upper layer) is exposed to the first One side (upper side) of the second insulating layer 241'. Alternatively, the portion of the conductive via hole 240b' (upper layer) may not be exposed on one side (upper side) of the second insulating layer 241'.

Further, the number of layers of the wiring layer of the wiring board body 24 can be produced as needed, and is not limited to the above.

The method of the invention is to complete the semi-finished product of the thin circuit board in one process (that is, to fabricate the circuit board body 24), so that the use amount of the fine circuit material can be reduced to reduce the manufacturing cost.

As shown in FIG. 2C, a plurality of conductive pillars 25 are formed on the first circuit layer 21 by a patterning process, and a first surface 23a and a second surface 23b are formed on the carrier board 20. An insulating layer 23, such that the first insulating layer 23 covers the first circuit layer 21, the conductive pillars 25 and the circuit board body 24, and the first insulating layer 23 is bonded by the first surface 23a thereof. To the carrier board 20.

In this embodiment, the patterning process includes a process of forming photoresist, exposing and developing, electroplating copper, removing photoresist, etc., so the conductive pillar 25 is a copper pillar.

Furthermore, the surface 21a of the first circuit layer 21 is flush with the first insulation The first surface 23a of the layer 23 and the end surface 25a of the conductive pillars 25 are exposed on the second surface 23b of the first insulating layer 23.

Moreover, the first insulating layer 23 is formed by press-bonding or molding, and is then leveled so that one end surface 25a of the conductive pillars 25 is flush with the second surface 23b of the first insulating layer 23.

In addition, the first insulating layer 23 is a molding compound, a dielectric material, an epoxy resin (Epoxy), a polyimide (PI), and other photosensitive or non-photosensitive materials. Resin, and the material of the second insulating layer 241, 241' is different from the material of the first insulating layer 23. For example, as shown in FIG. 2C', the volume of the material d of the material of the second insulating layer 241 is much smaller than the first The volume of the particles t of the material of an insulating layer 23.

In an embodiment, in the process of FIG. 2B, a portion of the conductive via hole 240b' is not exposed on one side of the second insulating layer 241', and a process of leveling the first insulating layer 23 may be utilized. A portion of the conductive via hole 240b' is exposed on one side of the second insulating layer 241'.

As shown in FIG. 2D, a second circuit layer 22 is formed on the second surface 23b of the circuit board body 24 and the first insulating layer 23 by a patterning process, and the second circuit layer 22 is electrically connected to the second circuit layer 22. The conductive vias 240b' of the wiring layer 240' are electrically connected to the first wiring layer 21 by the conductive pillars 25. Then, a plurality of conductive bumps 26 are formed on the second circuit layer 22 by a patterning process, and an insulating protective layer 27 is formed on the circuit board body 24 and the second surface 23b of the first insulating layer 23 to The insulating protective layer 27 is wrapped around the second wiring layer 22, and the guiding The electrical bumps 26 are exposed to the insulating protective layer 27.

In this embodiment, the second circuit layer 22 is directly connected to the conductive vias 240b', the conductive pillars 25 and the conductive bumps 26.

Furthermore, the insulating protective layer 27 is formed by pressing or molding, and the insulating protective layer 27 is a molding compound, a dielectric material, such as an epoxy resin (Epoxy), or a poly An organic resin such as Polyimide (PI), other photosensitive or non-photosensitive materials, or a solder mask.

Moreover, the insulating protective layer 27 can be formed by first covering the second circuit layer 22 and the conductive bumps 26, and then leveling the insulating protective layer 27 (the top surface of the conductive bumps 26 can be etched as needed). The surface of the insulating protective layer 27 may be flush or not flush with the top surface of the conductive bumps 26 to expose the top surfaces of the conductive bumps 26. Alternatively, the insulating protective layer 27 can be formed by covering the second circuit layer 22 and the conductive bumps 26, and forming a plurality of openings on the insulating protective layer 27 to expose the conductive bumps 26 to the conductive bumps 26. Some openings.

As shown in FIG. 2E, the carrier board 20 and the adhesive layer 200 are removed, and the conductive traces 240a of the first circuit layer 21 and the wiring layer 240 are exposed.

In this embodiment, the surface of the circuit board body 24 is lower than the first surface 23a of the first insulating layer 23. In other embodiments, the surface of the circuit board body 24 may be equal to the first insulating layer 23. A surface 23a.

The substrate structure 2 of the present invention is embedded in a standard substrate process to embed a fine line semi-finished product (such as the circuit board body 24), and then layered to form an asymmetric structure. For example, the circuit board body 24 has two Layer wiring layer 240, 240', and having only one line structure (i.e., the first circuit layer 21 and the conductive pillar 25) in the first insulating layer 23, that is, the multilayer wiring layers 240, 240' correspond to a layer structure.

Further, since the substrate structure 2 has been formed in the wiring board 24, the number of layers of the wiring layers 240, 240' (i.e., thin wiring) of the wiring board 24 can be designed as required. Therefore, in the first insulating layer 23, the number of layers of the circuit layer of the substrate structure 2 can be reduced, so that the number of layers of the circuit portion of the substrate structure 2 is smaller than that of the prior art, thereby reducing the overall structure. The thickness.

Moreover, the plurality of wiring layers 240, 240' of the circuit board body 24 have satisfied the number of layers of the thin circuit. Therefore, on both sides of the first insulating layer 23, only two circuit layers (such as the first circuit layer 21 and the first layer) can be formed. The second circuit layer 22) is sufficient. Therefore, in the substrate structure 2, the circuit layers on the upper and lower sides are the first circuit layer 21 and the second circuit layer 22, respectively, and thus some of the conductive pillars 25 can be regarded as conductive vias, so that compared with the conventional ones, In the technology, the substrate structure 2 has an integrally formed conductive via (ie, the conductive pillar 25), and thus there is no problem of alignment.

As shown in FIG. 2F, a plurality of conductive elements 28, 29 are implanted on the side of the first surface 23a of the first insulating layer 23 to bond the electronic components by the conductive elements 28, 29.

In this embodiment, a portion of the conductive component 28 is disposed on the circuit board body 24 and electrically connected to the conductive trace 240a of the wiring layer 240 to bond the first electronic component 31 by the partial conductive component 28.

In addition, a portion of the conductive element 29 is disposed on the electrical connection pad 210 of the first circuit layer 21 and electrically connected to the first circuit layer 21. The conductive elements 29 are combined with the second electronic component 32.

In addition, a plurality of conductive elements 30 may be formed on the insulating protective layer 27, and the conductive elements 30 are electrically connected to the conductive bumps 26 to bond electronic components such as circuit boards by the conductive elements 30 (Fig. slightly).

In addition, the conductive elements 28, 29, 30 are solder balls, solder bumps, copper bumps, etc., and the first electronic component 31 is an active component, such as a semiconductor wafer, and the second electronic component 32 is Passive components such as capacitors, inductors, resistors, etc.

In the subsequent process, a package material (not shown, which can be referred to as the package material 9 shown in FIG. 1 ) is formed on the first surface 23 a of the first insulating layer 23 to cover the first electronic component 31 and The second electronic component 32.

In summary, the substrate structure 2 of the present invention utilizes the circuit board body 24 first, and then the circuit board body 24 is introduced into a general substrate process, that is, a high-order process (such as the circuit board body 24, or a high-level electrical connection). The fine lines of the wafer are fabricated separately from the low-order processes (such as the build-up lines electrically connected to the passive components) and then combined into a finished product (ie, the substrate structure 2).

Therefore, the substrate structure 2 of the present invention uses only the second insulating layer 241 which is relatively expensive in the circuit board body 24, and the first insulating layer 23 is made of a relatively inexpensive material, that is, for providing a passive component ( The non-fine line region of the second electronic component 32) does not need to be used with the fine wiring region (i.e., the wiring board body 24) to use a high-order material, so that the manufacturing cost of the substrate structure 2 of the present invention can be reduced.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Anyone skilled in the art can modify the above embodiments without departing from the spirit and scope of the present invention. change. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

2‧‧‧Substrate structure

21‧‧‧First line layer

22‧‧‧Second circuit layer

23‧‧‧First insulation

23a‧‧‧ first surface

23b‧‧‧ second surface

24‧‧‧Circuit board

240,240’‧‧‧ wiring layer

240a, 240a’‧‧‧ conductive traces

240b, 240b’‧‧‧ conductive blind holes

241,241'‧‧‧Second insulation

25‧‧‧Electrical cylinder

26‧‧‧Electrical bumps

27‧‧‧Insulation protective layer

Claims (13)

A substrate structure includes: a first insulating layer having opposite first and second surfaces; a first circuit layer embedded in the first insulating layer and exposing the first surface; a conductive pillar is disposed in the first insulating layer and electrically connected to the first circuit layer; a circuit board body is embedded in the first insulating layer and communicates with the first and second surfaces, wherein The circuit board system is composed of a plurality of wiring layers and a second insulating layer embedding the wiring layer, and a part of the wiring layer is exposed on the first and second surfaces; and a second circuit layer is disposed on the circuit board And electrically connecting the wiring layer to the second surface of the first insulating layer, and electrically connecting the first circuit layer by the conductive pillars. The substrate structure according to claim 1, wherein the material of the second insulating layer is different from the material of the first insulating layer. The substrate structure of claim 1, wherein the wiring layer comprises a plurality of conductive traces and a plurality of conductive blind vias electrically connected to the conductive traces. The substrate structure according to claim 1, wherein the plurality of conductive bumps are disposed on the second circuit layer. The substrate structure of claim 4, further comprising an insulating protective layer disposed on the circuit board body and the second insulating layer The second circuit layer is coated on the surface, and the conductive bumps are exposed. The substrate structure as claimed in claim 4, further comprising a plurality of conductive elements disposed on the conductive bumps. The substrate structure of claim 1, further comprising a plurality of conductive elements disposed on the first surface of the first insulating layer or the circuit board body. A package module, comprising: a substrate structure according to any one of claims 1 to 6; and at least a first electronic component disposed on the circuit board body opposite to the first insulation layer The side of the first surface is electrically connected to the wiring layer. The package module of claim 8 further comprising a plurality of conductive elements disposed on the circuit board body for bonding the first electronic component and electrically connecting the wiring layer. The package module of claim 8, further comprising a package material formed on the first surface of the first insulation layer to encapsulate the first electronic component. The package module of claim 8 further comprising at least one second electronic component disposed on the first surface of the first insulating layer and electrically connected to the first circuit layer. The package module of claim 11, further comprising a plurality of conductive elements disposed on the first surface of the first insulating layer for bonding the second electronic component and electrically connecting the first line Floor. Such as the package module described in claim 11 of the patent scope, including the package a material formed on the first surface of the first insulating layer to encapsulate the first and second electronic components.