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TWI562163B - Memory cell array - Google Patents

Memory cell array

Info

Publication number
TWI562163B
TWI562163B TW102124040A TW102124040A TWI562163B TW I562163 B TWI562163 B TW I562163B TW 102124040 A TW102124040 A TW 102124040A TW 102124040 A TW102124040 A TW 102124040A TW I562163 B TWI562163 B TW I562163B
Authority
TW
Taiwan
Prior art keywords
memory cell
cell array
array
memory
cell
Prior art date
Application number
TW102124040A
Other languages
Chinese (zh)
Other versions
TW201503159A (en
Inventor
Hsin Wen Chen
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW102124040A priority Critical patent/TWI562163B/en
Publication of TW201503159A publication Critical patent/TW201503159A/en
Application granted granted Critical
Publication of TWI562163B publication Critical patent/TWI562163B/en

Links

TW102124040A 2013-07-04 2013-07-04 Memory cell array TWI562163B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW102124040A TWI562163B (en) 2013-07-04 2013-07-04 Memory cell array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW102124040A TWI562163B (en) 2013-07-04 2013-07-04 Memory cell array

Publications (2)

Publication Number Publication Date
TW201503159A TW201503159A (en) 2015-01-16
TWI562163B true TWI562163B (en) 2016-12-11

Family

ID=52718483

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102124040A TWI562163B (en) 2013-07-04 2013-07-04 Memory cell array

Country Status (1)

Country Link
TW (1) TWI562163B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060262628A1 (en) * 2005-05-23 2006-11-23 Renesas Technology Corp. Semiconductor memory device
US7447058B2 (en) * 2005-10-12 2008-11-04 Fujitsu Limited Write margin of SRAM cells improved by controlling power supply voltages to the inverters via corresponding bit lines
US7715223B2 (en) * 2004-09-15 2010-05-11 Renesas Technology Corp. Semiconductor integrated circuit device
US7869263B2 (en) * 2007-02-02 2011-01-11 Oracle America, Inc. Elastic power for read margin
US20120195135A1 (en) * 2011-01-28 2012-08-02 Kabushiki Kaisha Toshiba Semiconductor memory device
US20130003443A1 (en) * 2006-06-01 2013-01-03 Texas Instruments Incorporated 8t sram cell with higher voltage on the read wl
US8441842B2 (en) * 2010-12-21 2013-05-14 Lsi Corporation Memory device having memory cells with enhanced low voltage write capability

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7715223B2 (en) * 2004-09-15 2010-05-11 Renesas Technology Corp. Semiconductor integrated circuit device
US8072799B2 (en) * 2004-09-15 2011-12-06 Renesas Electronics Corporation Semiconductor integrated circuit device
US20060262628A1 (en) * 2005-05-23 2006-11-23 Renesas Technology Corp. Semiconductor memory device
US7502275B2 (en) * 2005-05-23 2009-03-10 Renesas Technology Corp. Semiconductor memory device
US7447058B2 (en) * 2005-10-12 2008-11-04 Fujitsu Limited Write margin of SRAM cells improved by controlling power supply voltages to the inverters via corresponding bit lines
US20130003443A1 (en) * 2006-06-01 2013-01-03 Texas Instruments Incorporated 8t sram cell with higher voltage on the read wl
US7869263B2 (en) * 2007-02-02 2011-01-11 Oracle America, Inc. Elastic power for read margin
US8441842B2 (en) * 2010-12-21 2013-05-14 Lsi Corporation Memory device having memory cells with enhanced low voltage write capability
US20120195135A1 (en) * 2011-01-28 2012-08-02 Kabushiki Kaisha Toshiba Semiconductor memory device

Also Published As

Publication number Publication date
TW201503159A (en) 2015-01-16

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