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TWI562157B - Memory unit and testing method thereof - Google Patents

Memory unit and testing method thereof

Info

Publication number
TWI562157B
TWI562157B TW104114564A TW104114564A TWI562157B TW I562157 B TWI562157 B TW I562157B TW 104114564 A TW104114564 A TW 104114564A TW 104114564 A TW104114564 A TW 104114564A TW I562157 B TWI562157 B TW I562157B
Authority
TW
Taiwan
Prior art keywords
memory unit
testing method
testing
memory
unit
Prior art date
Application number
TW104114564A
Other languages
Chinese (zh)
Other versions
TW201640516A (en
Inventor
Kuen Huei Chang
Original Assignee
Winbond Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Winbond Electronics Corp filed Critical Winbond Electronics Corp
Priority to TW104114564A priority Critical patent/TWI562157B/en
Publication of TW201640516A publication Critical patent/TW201640516A/en
Application granted granted Critical
Publication of TWI562157B publication Critical patent/TWI562157B/en

Links

TW104114564A 2015-05-07 2015-05-07 Memory unit and testing method thereof TWI562157B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW104114564A TWI562157B (en) 2015-05-07 2015-05-07 Memory unit and testing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW104114564A TWI562157B (en) 2015-05-07 2015-05-07 Memory unit and testing method thereof

Publications (2)

Publication Number Publication Date
TW201640516A TW201640516A (en) 2016-11-16
TWI562157B true TWI562157B (en) 2016-12-11

Family

ID=57850714

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104114564A TWI562157B (en) 2015-05-07 2015-05-07 Memory unit and testing method thereof

Country Status (1)

Country Link
TW (1) TWI562157B (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6400625B2 (en) * 2000-05-10 2002-06-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device capable of performing operational test for contained memory core at operating frequency higher than that of memory tester
US6519194B2 (en) * 2000-01-06 2003-02-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester
US7644324B2 (en) * 2006-06-26 2010-01-05 Yokogawa Electric Corporation Semiconductor memory tester
US7817482B2 (en) * 2003-06-24 2010-10-19 Round Rock Research, Llc Memory device having data paths with multiple speeds
US7898890B2 (en) * 2007-07-10 2011-03-01 Fujitsu Semiconductor Limited Oscillating device, method of adjusting the same and memory
US8423813B2 (en) * 2006-03-21 2013-04-16 Mediatek Inc. Memory controller and device with data strobe calibration

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6519194B2 (en) * 2000-01-06 2003-02-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with a rapid packet data input, capable of operation check with low speed tester
US6400625B2 (en) * 2000-05-10 2002-06-04 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device capable of performing operational test for contained memory core at operating frequency higher than that of memory tester
US7817482B2 (en) * 2003-06-24 2010-10-19 Round Rock Research, Llc Memory device having data paths with multiple speeds
US8879340B2 (en) * 2003-06-24 2014-11-04 Round Rock Research, Llc Memory device having data paths with multiple speeds
US8423813B2 (en) * 2006-03-21 2013-04-16 Mediatek Inc. Memory controller and device with data strobe calibration
US7644324B2 (en) * 2006-06-26 2010-01-05 Yokogawa Electric Corporation Semiconductor memory tester
US7898890B2 (en) * 2007-07-10 2011-03-01 Fujitsu Semiconductor Limited Oscillating device, method of adjusting the same and memory

Also Published As

Publication number Publication date
TW201640516A (en) 2016-11-16

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