圖2為依據本發明一實施例之程式化方法的流程圖。其中，所述的程式化方法適用於一非揮發性記憶體，且所述非揮發性記憶體包括一頁面。此外，頁面包括電性連接至一字元線(word line)的多個記憶胞，且所述多個記憶胞又各自電性連接至一位元線(bit line)。換言之，圖2實施例主要是用以列舉位在同一字元線上之多個記憶胞的程式化方法。 2 is a flow chart of a stylized method in accordance with an embodiment of the present invention. Wherein, the stylized method is applicable to a non-volatile memory, and the non-volatile memory includes a page. In addition, the page includes a plurality of memory cells electrically connected to a word line, and the plurality of memory cells are each electrically connected to a bit line. In other words, the embodiment of Figure 2 is primarily a stylized method for enumerating multiple memory cells located on the same word line.

如步驟S210所示，非揮發性記憶體將被切換至一寫入模式。就步驟S210的細部流程而言，此時供應至字元線的偏壓訊號的準位將逐漸地被調整至一寫入電壓，以切換至寫入模式。此外，如步驟S220所示，在寫入模式內，將一緩衝器內的多個位元資料寫入至所述多個記憶胞。 As shown in step S210, the non-volatile memory will be switched to a write mode. In the detailed flow of step S210, the level of the bias signal supplied to the word line at this time is gradually adjusted to a write voltage to switch to the write mode. Further, as shown in step S220, a plurality of bit data in a buffer is written to the plurality of memory cells in the write mode.

舉例來說，圖3為依據本發明一實施例之用以說明步驟S220的流程圖。如圖3的步驟S310所示，所述多個位元資料將被劃分成多個資料組，其中每一資料組包括2個以上的位元資料。此外，如步驟S320所示，將從所述多個資料組中選取其一，以作為一特定資料組。 For example, FIG. 3 is a flow chart for explaining step S220 according to an embodiment of the invention. As shown in step S310 of FIG. 3, the plurality of bit data will be divided into a plurality of data groups, wherein each data group includes more than two bit data. In addition, as shown in step S320, one of the plurality of data sets is selected as a specific data group.

值得一提的是，一般的抹除操作是將記憶胞的狀態設定為邏輯1，且寫入操作是將記憶胞的狀態設定為邏輯0。換言之，當所要寫入的位元資料為邏輯1時，記憶胞無須進行寫入操作即存有相應的位元資料。因此，在圖3實施例中，將以一預設資料(例如，邏輯1)比對特定資料組，以決定是否進行與特定資料組相對應的該些記憶胞的寫入操作。 It is worth mentioning that the general erase operation sets the state of the memory cell to logic 1, and the write operation sets the state of the memory cell to logic 0. In other words, when the bit data to be written is logic 1, the memory cell stores the corresponding bit data without performing a write operation. Therefore, in the embodiment of FIG. 3, a specific data group will be aligned with a predetermined data (for example, logic 1) to determine whether or not to perform a write operation of the memory cells corresponding to a specific data group.

例如，如步驟S330所示，將判別特定資料組中的每一位元資料是否為一預設資料。倘若特定資料組中的該些位元資料之其一並非為預設資料時，則如步驟S340所示，將進行與特定資料組相對應的該些記憶胞的寫入操作。此時，特定資料組中的該些位元資料將被寫入至與特定資料組相對應的該些記憶胞。相對地，倘若特定資料組中的每一位元資料為預設資料時，則如步驟 S350所示，將略過與特定資料組相對應的該些記憶胞的寫入操作。 For example, as shown in step S330, it is determined whether each bit data in a specific data group is a preset data. If one of the bit data in the specific data group is not the default data, then as shown in step S340, the writing operation of the memory cells corresponding to the specific data group will be performed. At this time, the bit data in the specific data group will be written to the memory cells corresponding to the specific data group. In contrast, if each meta-data in a particular data set is a default data, then steps As shown at S350, the write operations of the memory cells corresponding to the specific data group will be skipped.

舉例來說，在一實施例中，每一特定資料組包括3個位元資料，亦即寫入操作是以3個記憶胞為單位來進行。當特定資料組中的某一位元資料並未非為預設資料時，則將對與特定資料組相對應的3個記憶胞進行寫入操作。反之，特定資料組中的3個位元資料皆為預設資料時，則將略過與特定資料組相對應的3個記憶胞的寫入操作。 For example, in one embodiment, each particular data set includes 3 bit data, that is, the write operation is performed in units of 3 memory cells. When a certain bit data in a specific data group is not a preset data, three memory cells corresponding to a specific data group are written. On the other hand, when all the three bit data in the specific data group are preset data, the writing operation of the three memory cells corresponding to the specific data group will be skipped.

接著，如步驟S360所示，將判別是否已逐一選取所述多個資料組。倘若尚未逐一選取所述多個資料組，則將回到步驟S320，以選取下一個資料組作為特定資料組。相對地，倘若所述多個資料組已逐一被選取，則將進行步驟S360。換言之，在寫入模式內，將接續地對位在同一字元線上的多個記憶胞進行寫入處理，以將每一資料組將逐一地寫入至相應的記憶胞中。 Next, as shown in step S360, it is determined whether the plurality of data sets have been selected one by one. If the plurality of data sets have not been selected one by one, the process returns to step S320 to select the next data set as the specific data set. In contrast, if the plurality of data groups have been selected one by one, step S360 will be performed. In other words, in the write mode, a plurality of memory cells positioned on the same word line are successively subjected to write processing to write each data group one by one into the corresponding memory cell.

當寫入模式結束後，如步驟S230所示，非揮發性記憶體將被切換至一驗證模式。就步驟S230的細部流程而言，此時供應至字元線的偏壓訊號的準位將逐漸地被調整至一驗證電壓，以切換至驗證模式。其中，驗證電壓小於寫入電壓。此外，如步驟S240所示，在驗證模式內，將驗證所述多個記憶胞，並依據驗證結果選擇性地更新緩衝器內的所述多個位元資料。 When the write mode ends, as shown in step S230, the non-volatile memory will be switched to a verification mode. In the detailed flow of step S230, the level of the bias signal supplied to the word line at this time will be gradually adjusted to a verification voltage to switch to the verification mode. Wherein, the verification voltage is less than the write voltage. In addition, as shown in step S240, in the verification mode, the plurality of memory cells are verified, and the plurality of bit data in the buffer are selectively updated according to the verification result.

舉例來說，圖4為依據本發明一實施例之用以說明步驟S240的流程圖。如圖4的步驟S410所示，將從所述多個記憶胞中選取其一。此外，如步驟S420所示，將對所選取的記憶胞進行 驗證。再者，如步驟S430所示，將進一步地判別所選取的記憶胞是否驗證成功。例如，此時將讀取所選取的記憶胞，並將從記憶胞所讀取到的資料與緩衝器內相應的資料位元進行比對。倘若比對結果為兩者相同，則代表所選取的記憶胞驗證成功。反之，倘若比對結果為兩者不相同，則代表所選取的記憶胞驗證失敗。因此，在圖4實施例中，將依據所選取的記憶胞的驗證結果，而決定是否更新緩衝器內與所選取的記憶胞相對應的位元資料。 For example, FIG. 4 is a flow chart for explaining step S240 according to an embodiment of the invention. As shown in step S410 of FIG. 4, one of the plurality of memory cells is selected. In addition, as shown in step S420, the selected memory cells will be performed. verification. Furthermore, as shown in step S430, it will be further determined whether the selected memory cell is successfully verified. For example, the selected memory cell will be read at this time, and the data read from the memory cell will be compared with the corresponding data bit in the buffer. If the comparison result is the same, it means that the selected memory cell is verified successfully. On the other hand, if the comparison result is different from the two, it means that the selected memory cell verification fails. Therefore, in the embodiment of FIG. 4, it is determined whether to update the bit data corresponding to the selected memory cell in the buffer according to the verification result of the selected memory cell.

舉例來說，當所選取的記憶胞驗證成功時，則代表無需再對所選取的記憶胞進行寫入操作。因此，如步驟S440所示，此時將以預設資料更新緩衝器內與所選取的記憶胞相對應的位元資料。相對地，當所選取的記憶胞驗證失敗時，則代表必須再對所選取的記憶胞進行寫入操作。因此，如步驟S450所示，此時將不更新緩衝器內與所選取的記憶胞相對應的位元資料。 For example, when the selected memory cell is successfully verified, it means that there is no need to perform a write operation on the selected memory cell. Therefore, as shown in step S440, the bit data corresponding to the selected memory cell in the buffer will be updated with the preset data. In contrast, when the selected memory cell fails to verify, it means that the selected memory cell must be further written. Therefore, as shown in step S450, the bit data corresponding to the selected memory cell in the buffer will not be updated at this time.

接著，如步驟S460所示，將判別是否已逐一選取所述多個記憶胞。倘若尚未逐一選取所述多個記憶胞，則將回到步驟S410，以選取下一個記憶胞。相對地，倘若所述多個記憶胞已逐一被選取，則將進行步驟S250。換言之，在驗證模式內，將接續地對位在同一字元線上的多個記憶胞進行驗證處理。 Next, as shown in step S460, it is determined whether the plurality of memory cells have been selected one by one. If the plurality of memory cells have not been selected one by one, the process returns to step S410 to select the next memory cell. In contrast, if the plurality of memory cells have been selected one by one, step S250 will be performed. In other words, in the verification mode, a plurality of memory cells positioned on the same word line are successively subjected to verification processing.

請繼續參照圖2。當驗證模式結束後，如步驟S250所示，將判別緩衝器內的每一位元資料是否為一預設資料。當緩衝器內的所述多個位元資料之其一並非為預設資料時，則代表記憶胞仍然需要進行寫入操作，故此時將回到步驟S210。相對地，當緩衝 器內的每一位元資料為預設資料時，則如步驟S260所示，將停止程式化非揮發性記憶體。換言之，當驗證模式結束後，將依據緩衝器內的所述多個位元資料來決定是否繼續程式化非揮發性記憶體。 Please continue to refer to Figure 2. After the verification mode ends, as shown in step S250, it is determined whether each bit data in the buffer is a preset data. When one of the plurality of bit data in the buffer is not the preset data, the memory cell still needs to perform the writing operation, so the process returns to step S210. Relatively, when buffering When each bit data in the device is a preset data, as shown in step S260, the stylized non-volatile memory will be stopped. In other words, when the verification mode ends, it is determined whether to continue to program the non-volatile memory according to the plurality of bit data in the buffer.

綜上所述，本發明是在寫入模式內，接續地對位在同一字元線上的多個記憶胞進行寫入處理，並在驗證模式內，接續地對位在同一字元線上的多個記憶胞進行驗證處理。藉此，本發明將可降低寫入模式與驗證模式之間的切換次數，進而降低非揮發性記憶體的程式化時間。特別是，在對經過多次程式化/抹除循環之非揮發性記憶體進行程式化的過程中，寫入模式與驗證模式之間的切換次數也不會大幅度地增加，進而有效地降低非揮發性記憶體的程式化時間。 In summary, the present invention performs write processing on a plurality of memory cells on the same word line in a write mode, and successively aligns on the same word line in the verification mode. The memory cells are verified. Thereby, the present invention can reduce the number of switching between the write mode and the verification mode, thereby reducing the stylized time of the non-volatile memory. In particular, in the process of programming non-volatile memory that has undergone multiple stylization/erasing cycles, the number of switching between the write mode and the verify mode is not greatly increased, thereby effectively reducing Stylized time for non-volatile memory.

雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.