TWI514728B - Multiphase converter controller with current balance - Google Patents
Multiphase converter controller with current balance Download PDFInfo
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- TWI514728B TWI514728B TW102105578A TW102105578A TWI514728B TW I514728 B TWI514728 B TW I514728B TW 102105578 A TW102105578 A TW 102105578A TW 102105578 A TW102105578 A TW 102105578A TW I514728 B TWI514728 B TW I514728B
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Description
本發明係關於一種多相電源轉換控制器,尤指一種具電流平衡之多相電源轉換控制器。The invention relates to a multi-phase power conversion controller, in particular to a multi-phase power conversion controller with current balance.
隨著製程技術的演進,積體電路越趨微小化。而積體電路的微小化會伴隨著驅動電壓的下降。然而有些領域的積體電路的耗電量並未隨著驅動電壓的下降而等比例的下降,使得積體電路的操作電流反向地增加。With the evolution of process technology, the integrated circuit has become more and more miniaturized. The miniaturization of the integrated circuit is accompanied by a drop in the driving voltage. However, the power consumption of the integrated circuit in some fields does not decrease proportionally with the decrease of the driving voltage, so that the operating current of the integrated circuit is inversely increased.
積體電路的驅動電壓源均以切換式電源電路為主。而切換式電源電路的切換操作,會造成輸出端的電壓漣波(Ripple)。這些電壓漣波在低驅動電壓的操作環境下會顯得明顯,甚至造成積體電路的邏輯錯誤。為了降低切換式電源電路的電壓漣波,而發展出多相直流轉直流轉換控制器。透過多通道分時傳送電力至直流轉直流轉換電路輸出端的方式,可降低每次傳送的電力大小,因而降低電壓漣波的大小。The driving voltage source of the integrated circuit is mainly a switching power supply circuit. The switching operation of the switching power supply circuit causes a voltage ripple (Ripple) at the output. These voltage choppings can be noticeable in low operating conditions of the operating voltage, and even cause logic errors in the integrated circuit. In order to reduce the voltage chopping of the switching power supply circuit, a multi-phase DC-to-DC conversion controller has been developed. By multi-channel time-division transmission of power to the output of the DC-to-DC converter circuit, the amount of power transmitted per time can be reduced, thereby reducing the magnitude of voltage chopping.
請參見第一圖,為傳統多相電源轉換電路的電路示意圖。多相電源轉換電路包含了一控制器10及三個通道12a~12c。每一個通道12a~12c包含兩個電晶體開關串接在輸入電壓Vin及接地之間。各通道12a~12c內的驅動器各自接收來自控制器10的脈寬調變控制訊號PWM1~PWM3,以據此切換對應的電晶體開關,以提供通道電流Io1~Io3。通道電流Io1~Io3結合而形成一輸出電流Io對一輸出電容Co充電而產生一輸出電壓Vout,以驅動一負載Load。控制器10透過腳位對CSP1及CSN1、CSP2及CSN2、CSP3及CSN3偵測通道電 流Io1~Io3並接收一電壓偵測訊號FB,據以調變通道12a~12c中的電晶體開關之工作週期。Please refer to the first figure, which is a circuit diagram of a conventional multi-phase power conversion circuit. The multiphase power conversion circuit includes a controller 10 and three channels 12a-12c. Each of the channels 12a-12c includes two transistor switches connected in series between the input voltage Vin and ground. The drivers in each of the channels 12a-12c receive the pulse width modulation control signals PWM1~PWM3 from the controller 10 to switch the corresponding transistor switches accordingly to provide channel currents Io1~Io3. The channel currents Io1~Io3 combine to form an output current Io to charge an output capacitor Co to generate an output voltage Vout to drive a load. The controller 10 detects the channel power through the pin pairs CSP1 and CSN1, CSP2 and CSN2, CSP3 and CSN3. The streams Io1~Io3 receive a voltage detection signal FB, thereby modulating the duty cycle of the transistor switches in the channels 12a-12c.
由於各通道的電晶體開關及電感的不匹配,例如:寄生電阻不匹配,會導致各相電流不平衡,即各相的熱不會平衡。電流的不平衡會影響元件的壽命和可靠度。控制器10為了使各通道12a~12c造成的電流漣波相近,因而根據腳位對CSP1及CSN1、CSP2及CSN2、CSP3及CSN3的偵測訊號來調整各通道電流Io1~Io3之大小,使其彼此一致。一般而言,控制器10會先以誤差放大器來進行回授控制,以得到各通道的工作週期參考依據,然後再根據通道電流之間的差異之資料傳送到各通道對應的脈寬控制電路以進行工作週期之補償修正。Due to the mismatch of the transistor switch and the inductance of each channel, for example, the parasitic resistance mismatch, the current of each phase is unbalanced, that is, the heat of each phase is not balanced. Current imbalance can affect component life and reliability. In order to make the current ripples of the channels 12a~12c similar, the controller 10 adjusts the currents Io1~Io3 of each channel according to the detection signals of the CSP1 and CSN1, CSP2 and CSN2, CSP3 and CSN3. Consistent with each other. Generally, the controller 10 first performs feedback control with an error amplifier to obtain a reference period of the duty cycle of each channel, and then transmits the data to the corresponding pulse width control circuit according to the difference between the channel currents. Perform compensation compensation for the work cycle.
誤差放大器雖然對抑制雜訊的效果不錯,但相對的其暫態反應的能力較差,無法對負載變動快速回應。再者,複數個脈寬控制電路除了有電路比較複雜、面積大、成本高的問題外,複數個脈寬控制電路之間也有匹配上的問題,而影響到各相電流平衡的精確度。Although the error amplifier works well for suppressing noise, its relative transient response capability is poor, and it cannot respond quickly to load changes. Furthermore, in addition to the complicated circuit, large area, and high cost of the plurality of pulse width control circuits, there are also matching problems between the plurality of pulse width control circuits, which affect the accuracy of current balance of each phase.
先前技術中的多相電源轉換電路有暫態反應差、電路複雜成本高,而且電流平衡的精確度差之問題。本發明使用固定導通時間控制技術,改善了電路的暫態反應,而且利用單一的計時電路來決定各相電路的導通時間,降低了電路的複雜度及成本,也同時避免了電路不匹配影響電流平衡精確度之問題。The multi-phase power conversion circuit in the prior art has a problem of poor transient response, high circuit complexity, and poor accuracy of current balance. The invention uses the fixed on-time control technology to improve the transient response of the circuit, and uses a single timing circuit to determine the on-time of each phase circuit, which reduces the complexity and cost of the circuit, and also avoids the circuit mismatch affecting the current. The problem of balancing accuracy.
為達上述目的,本發明提供了一種具電流平衡之多相電源轉換控制器,用以控制複數個轉換電路以共同提供一輸出電壓。多相電源轉換控制器包含一回授電路、一固定導通時間電路以及一多相邏輯控制器。回授電路偵測輸出電壓,以產生一回授控制訊號。固定導通時間電路根據回授控制訊號以產生一導通時間訊號,其中導通時間訊號之一脈衝 寬度根據單一計時電路來決定。多相邏輯控制器,根據回授控制訊號之次序以選擇複數個轉換電路中對應的轉換電路並產生一相數訊號,且根據導通時間訊號控制對應之轉換電路。其中,固定導通時間電路根據複數個轉換電路之電流,並對應相數訊號判斷對應的轉換電路的電流之一修正量,並據此修正對應的導通時間訊號之脈衝寬度。To achieve the above object, the present invention provides a multi-phase power conversion controller with current balancing for controlling a plurality of conversion circuits to collectively provide an output voltage. The multiphase power conversion controller includes a feedback circuit, a fixed on time circuit, and a polyphase logic controller. The feedback circuit detects the output voltage to generate a feedback control signal. The fixed on-time circuit generates a conduction time signal according to the feedback control signal, wherein one of the on-time signals is pulsed The width is determined by a single timing circuit. The multi-phase logic controller selects a corresponding one of the plurality of conversion circuits according to the order of the feedback control signals and generates a phase signal, and controls the corresponding conversion circuit according to the on-time signal. The fixed on-time circuit determines the current correction amount of the corresponding conversion circuit according to the current of the plurality of conversion circuits, and corrects the pulse width of the corresponding on-time signal according to the phase signal.
以上的概述與接下來的詳細說明皆為示範性質,是為了進一步說明本發明的申請專利範圍。而有關本發明的其他目的與優點,將在後續的說明與圖示加以闡述。The above summary and the following detailed description are exemplary in order to further illustrate the scope of the claims. Other objects and advantages of the present invention will be described in the following description and drawings.
先前技術:Prior art:
10‧‧‧控制器10‧‧‧ Controller
12a、12b、12c‧‧‧通道12a, 12b, 12c‧‧‧ channels
Co‧‧‧輸出電容Co‧‧‧ output capacitor
CSP1、CSN1、CSP2、CSN2、CSP3、CSN3‧‧‧腳位CSP1, CSN1, CSP2, CSN2, CSP3, CSN3‧‧‧ feet
FB‧‧‧電壓偵測訊號FB‧‧‧ voltage detection signal
Io‧‧‧輸出電流Io‧‧‧ output current
Io1、Io2、Io3‧‧‧通道電流Io1, Io2, Io3‧‧‧ channel current
Load‧‧‧負載Load‧‧‧load
PWM1、PWM2、PWM3‧‧‧脈寬調變控制訊號PWM1, PWM2, PWM3‧‧‧ pulse width modulation control signal
Vin‧‧‧輸入電壓Vin‧‧‧Input voltage
Vout‧‧‧輸出電壓Vout‧‧‧ output voltage
本發明:this invention:
100‧‧‧多相電源轉換控制器100‧‧‧Multiphase power conversion controller
110、210‧‧‧回授電路110, 210‧‧ ‧ feedback circuit
120、220‧‧‧固定導通時間電路120, 220‧‧‧ fixed on-time circuit
130、230‧‧‧多相邏輯控制器130, 230‧‧‧Multiphase Logic Controller
150a~150c‧‧‧轉換電路150a~150c‧‧‧ conversion circuit
152a~152c‧‧‧電流偵測電路152a~152c‧‧‧current detection circuit
212‧‧‧比較器212‧‧‧ Comparator
222‧‧‧誤差電流產生電路222‧‧‧Error current generating circuit
223‧‧‧數位誤差電流產生電路223‧‧‧Digital error current generating circuit
224‧‧‧類比數位轉換電路224‧‧‧ analog digital conversion circuit
226‧‧‧計時電路226‧‧‧Timekeeping Circuit
227‧‧‧數位計時電路227‧‧‧Digital Timing Circuit
232‧‧‧相數判斷電路232‧‧‧phase number judgment circuit
234‧‧‧多相驅動電路234‧‧‧Multiphase drive circuit
3221‧‧‧電流和電路3221‧‧‧ Current and circuit
3222‧‧‧平均電路3222‧‧‧ average circuit
3223‧‧‧誤差計算電路3223‧‧‧Error calculation circuit
3224‧‧‧放大電路3224‧‧‧Amplification circuit
3261‧‧‧D型正反器3261‧‧‧D type flip-flop
3262‧‧‧固定電流源3262‧‧‧Fixed current source
3263‧‧‧電容3263‧‧‧ Capacitance
3264‧‧‧調整電流源3264‧‧‧Adjust current source
3265‧‧‧比較器3265‧‧‧ comparator
3266‧‧‧脈寬控制器3266‧‧‧ Pulse Width Controller
3267‧‧‧SR正反器3267‧‧‧SR flip-flop
3268‧‧‧開關3268‧‧‧Switch
△DI_s‧‧‧數位調整電流訊號△DI_s‧‧‧Digital adjustment current signal
△I_s‧‧‧調整電流訊號△I_s‧‧‧Adjust current signal
C、D、S‧‧‧輸入端C, D, S‧‧‧ input
Co‧‧‧輸出電容Co‧‧‧ output capacitor
DIse_1~n‧‧‧數位電流偵測訊號DIse_1~n‧‧‧ digital current detection signal
FB‧‧‧電壓偵測訊號FB‧‧‧ voltage detection signal
Iavg‧‧‧平均電流訊號Iavg‧‧‧Average current signal
Io1~Io3‧‧‧通道電流Io1~Io3‧‧‧ channel current
Ise_1~Ise_3、Ise_1~n、Ise_s、Ise_s-1、Ise_s+1‧‧‧電流偵測訊號Ise_1~Ise_3, Ise_1~n, Ise_s, Ise_s-1, Ise_s+1‧‧‧ current detection signal
IseX‧‧‧電流放大訊號IseX‧‧‧current amplification signal
Isum‧‧‧電流和訊號Isum‧‧‧currents and signals
Ph_s‧‧‧相數訊號Ph_s‧‧‧ phase signal
Pon‧‧‧回授控制訊號Pon‧‧‧ feedback control signal
Q‧‧‧輸出端Q‧‧‧output
QN‧‧‧反相輸出端QN‧‧‧inverting output
R‧‧‧重置端R‧‧‧Reset end
Ron‧‧‧電阻Ron‧‧ resistance
Sa_1~Sa_3、Sb_1~Sb_3、Sa_s、Sb_s‧‧‧控制訊號Sa_1~Sa_3, Sb_1~Sb_3, Sa_s, Sb_s‧‧‧ control signals
Ton_s‧‧‧導通時間訊號Ton_s‧‧‧ On time signal
Vin‧‧‧輸入電壓Vin‧‧‧Input voltage
Vout‧‧‧輸出電壓Vout‧‧‧ output voltage
Vref‧‧‧參考電壓Vref‧‧‧reference voltage
Von‧‧‧導通時間參考電壓Von‧‧‧ conduction time reference voltage
第一圖為傳統多相電源轉換電路的電路示意圖。The first figure is a circuit diagram of a conventional multi-phase power conversion circuit.
第二圖為根據本發明之一較佳實施例之具電流平衡之多相電源轉換電路之電路示意圖。The second figure is a circuit diagram of a multi-phase power conversion circuit with current balancing according to a preferred embodiment of the present invention.
第三圖為根據本發明之一第一較佳實施例之具電流平衡之多相電源轉換控制器之電路示意圖。The third figure is a circuit diagram of a multi-phase power conversion controller with current balancing according to a first preferred embodiment of the present invention.
第四圖為根據本發明之一第二較佳實施例之具電流平衡之多相電源轉換控制器之電路示意圖。The fourth figure is a circuit diagram of a multi-phase power conversion controller with current balancing according to a second preferred embodiment of the present invention.
第五圖為根據本發明之一第三較佳實施例之具電流平衡之多相電源轉換控制器之電路示意圖。Figure 5 is a circuit diagram of a multi-phase power conversion controller with current balancing according to a third preferred embodiment of the present invention.
第六圖為根據本發明之一第一較佳實施例之計時電路之電路示意圖。Figure 6 is a circuit diagram of a timing circuit in accordance with a first preferred embodiment of the present invention.
第七圖為根據本發明之一第二較佳實施例之計時電路之電路示意圖。Figure 7 is a circuit diagram of a timing circuit in accordance with a second preferred embodiment of the present invention.
第八圖為根據本發明之一第一較佳實施例之誤差電流產生電路之電路示意圖。Figure 8 is a circuit diagram showing an error current generating circuit in accordance with a first preferred embodiment of the present invention.
第九圖為根據本發明之一第二較佳實施例之誤差電流產生電路之電路示意圖。Figure 9 is a circuit diagram showing an error current generating circuit in accordance with a second preferred embodiment of the present invention.
請參見第二圖,為根據本發明之一較佳實施例之具電流平衡之多相電源轉換電路之電路示意圖。多相電源轉換控制器100控制複數個轉換電路150a~150c以共同提供一輸出電壓Vout。在本實施例,複數個轉換電路為直流轉直流降壓轉換電路。每一轉換電路包含一上端電晶體、一下端電晶體以及一電感,上端電晶體耦接一輸入電壓Vin,並根據多相電源轉換控制器100之控制,將輸入電壓Vin的電力傳送至一輸出電容Co儲存。多相電源轉換控制器100包含一回授電路110、一固定導通時間電路120以及一多相邏輯控制器130。回授電路110耦接一輸出電壓Vout以偵測輸出電壓Vout之高低,並接收代表輸出電壓Vout之一電壓偵測訊號FB,以據此產生一回授控制訊號Pon。多相邏輯控制器130根據回授控制訊號Pon之次序以選擇複數個轉換電路150a~150c中對應的轉換電路,並產生一相數訊號Ph_s。複數個電流偵測電路152a~152c偵測複數個轉換電路150a~150c中電感之通道電流Io1~Io3,以產生代表通道電流Io1~Io3大小之電流偵測訊號Ise_1~Ise_3。固定導通時間電路120根據回授控制訊號Pon以產生一導通時間訊號Ton_s,其中導通時間訊號Ton_s之一脈衝寬度根據單一計時電路來決定(請參見後續之實施例)。固定導通時間電路120並接收電流偵測訊號Ise_1~Ise_3,以對應相數訊號Ph_s來判斷此次週期所欲控制的對應轉換電路,並據此判斷對應轉換電路的電流的一修正量,並據此修正導通時間訊號Ton_s之脈衝寬度。多相邏輯控制器130根據導通時間訊號Ton_s決定此次週期的導通時間,並對應欲控制的對應轉換電路,產生控制訊號Sa_1~Sa_3、Sb_1~Sb_3對應的控制訊號以控制對應轉換電路,其中控制訊號Sa_1~Sa_3用以控制對應的轉換電路的上端電晶體,控制訊號Sb_1~Sb_3用以控制對應的轉換電路的下端電晶體。Please refer to the second figure, which is a circuit diagram of a multi-phase power conversion circuit with current balance according to a preferred embodiment of the present invention. The multi-phase power conversion controller 100 controls a plurality of conversion circuits 150a to 150c to collectively provide an output voltage Vout. In this embodiment, the plurality of conversion circuits are DC-to-DC buck conversion circuits. Each of the conversion circuits includes an upper transistor, a lower transistor, and an inductor. The upper transistor is coupled to an input voltage Vin, and the power of the input voltage Vin is transmitted to an output according to the control of the multi-phase power conversion controller 100. Capacitor Co is stored. The multi-phase power conversion controller 100 includes a feedback circuit 110, a fixed on-time circuit 120, and a multi-phase logic controller 130. The feedback circuit 110 is coupled to an output voltage Vout for detecting the level of the output voltage Vout, and receives a voltage detection signal FB representing the output voltage Vout to generate a feedback control signal Pon accordingly. The multi-phase logic controller 130 selects a corresponding one of the plurality of conversion circuits 150a-150c according to the order of the feedback control signals Pon, and generates a phase signal Ph_s. The plurality of current detecting circuits 152a-152c detect the channel currents Io1~Io3 of the inductors in the plurality of converting circuits 150a-150c to generate current detecting signals Ise_1~Ise_3 representing the channel currents Io1~Io3. The fixed on-time circuit 120 generates an on-time signal Ton_s according to the feedback control signal Pon, wherein the pulse width of one of the on-time signals Ton_s is determined according to a single timing circuit (refer to the following embodiment). The fixed on-time circuit 120 receives the current detecting signals Ise_1~Ise_3, determines the corresponding conversion circuit to be controlled in the period corresponding to the phase signal Ph_s, and determines a correction amount of the current corresponding to the conversion circuit according to the This correction turns on the pulse width of the time signal Ton_s. The multi-phase logic controller 130 determines the on-time of the current period according to the on-time signal Ton_s, and generates corresponding control signals corresponding to the control signals Sa_1~Sa_3, Sb_1~Sb_3 to control the corresponding conversion circuit according to the corresponding conversion circuit to be controlled, wherein the control The signals Sa_1~Sa_3 are used to control the upper transistor of the corresponding conversion circuit, and the control signals Sb_1~Sb_3 are used to control the lower transistor of the corresponding conversion circuit.
由於本實施例的固定導通時間電路120僅具有單一計時電路,故電路的複雜度及成本均較傳統的電路為低,而且使用單一計時電路也避免多個電路間不匹配之問題。因此,各轉換電路的電流更為一致之下,也可避免電流不均而影響元件使用壽命之問題。Since the fixed on-time circuit 120 of the present embodiment has only a single timing circuit, the complexity and cost of the circuit are lower than those of the conventional circuit, and the use of a single timing circuit also avoids the problem of mismatch between multiple circuits. Therefore, the current of each conversion circuit is more consistent, and the problem of the current life of the components can be avoided by avoiding current unevenness.
請參見第三圖,為根據本發明之一第一較佳實施例之具電流平衡之多相電源轉換控制器之電路示意圖。多相電源轉換控制器包含一回授電路210、一固定導通時間電路220以及一多相邏輯控制器230。回授電路210包含一比較器212,比較器212的一非反相輸入端接收一參考電壓Vref、一反相輸入端接收一電壓偵測訊號FB,並根據比較結果輸出一回授控制訊號Pon。當電壓偵測訊號FB的一準位低於參考電壓Vref時,回授控制訊號Pon為一高準位。多相邏輯控制器230包含一相數判斷電路232及一多相驅動電路234。相數判斷電路232接收並計數回授控制訊號Pon高準位的次數,以根據計數的結果決定此次週期預定控制哪一相的轉換電路,並同時輸出一相數訊號Ph_s。固定導通時間電路220包含一誤差電流產生電路222以及一計時電路226。誤差電流產生電路222接收代表各通道電流的電流偵測訊號Ise_1~n以決定一目標值。誤差電流產生電路222同時也接收相數訊號Ph_s,以判斷此次週期所欲控制的轉換電路對應的電流偵測訊號與目標值的差異,並據此產生一調整電流訊號△I_s。計時電路226接收回授控制訊號Pon,並據此啟動計時程序以產生一導通時間訊號Ton_s,並同時根據調整電流訊號△I_s來調整導通時間訊號Ton_s的一脈衝寬度。多相驅動電路234接收相數訊號Ph_s及導通時間訊號Ton_s,根據相數訊號Ph_s對應欲控制的轉換電路產生控制訊號Sa_s、Sb_s,並根據導通時間訊號Ton_s決定此次週期的導通時間(即控制訊號Sa_s的脈衝寬度)。Referring to the third figure, there is shown a circuit diagram of a multi-phase power conversion controller with current balancing according to a first preferred embodiment of the present invention. The multiphase power conversion controller includes a feedback circuit 210, a fixed on time circuit 220, and a polyphase logic controller 230. The feedback circuit 210 includes a comparator 212. A non-inverting input terminal of the comparator 212 receives a reference voltage Vref, and an inverting input terminal receives a voltage detection signal FB, and outputs a feedback control signal Pon according to the comparison result. . When a level of the voltage detection signal FB is lower than the reference voltage Vref, the feedback control signal Pon is at a high level. The multiphase logic controller 230 includes a phase number determination circuit 232 and a polyphase drive circuit 234. The phase number judging circuit 232 receives and counts the number of times the feedback control signal Pon is high level to determine which phase of the conversion circuit is scheduled to be controlled in the current cycle according to the result of the counting, and simultaneously outputs a phase signal Ph_s. The fixed on-time circuit 220 includes an error current generating circuit 222 and a timing circuit 226. The error current generating circuit 222 receives the current detecting signals Ise_1~n representing the currents of the respective channels to determine a target value. The error current generating circuit 222 also receives the phase signal Ph_s to determine the difference between the current detecting signal corresponding to the switching circuit to be controlled in the cycle and the target value, and accordingly generates an adjusted current signal ΔI_s. The timing circuit 226 receives the feedback control signal Pon, and accordingly starts the timing program to generate an on-time signal Ton_s, and simultaneously adjusts a pulse width of the on-time signal Ton_s according to the adjustment current signal ΔI_s. The multi-phase driving circuit 234 receives the phase signal Ph_s and the on-time signal Ton_s, generates control signals Sa_s, Sb_s according to the phase-control signal Ph_s corresponding to the conversion circuit to be controlled, and determines the on-time of the cycle according to the on-time signal Ton_s (ie, control) The pulse width of the signal Sa_s).
根據上述說明,本發明的固定導通時間電路220 會對應此次週期預定控制的轉換電路,並根據電流偵測訊號Ise_1~n來判斷欲控制的轉換電路的通道電流所需的調整量,於該次週期調整導通時間訊號Ton_s的脈衝寬度。例如:該通道電流偏小,則對應的導通時間訊號Ton_s的脈衝寬度則較長;該通道電流偏大,則對應的導通時間訊號Ton_s的脈衝寬度則較短。當進入下一週期多相電源轉換控制器欲控制下一個轉換電路時,固定導通時間電路220會再重新根據相數訊號Ph_s及電流偵測訊號Ise_1~n來調整下一個轉換電路的導通時間訊號Ton_s的脈衝寬度。由於各相的轉換電路的導通時間是錯開、不重疊的,故固定導通時間電路220可利用單一計時電路即可提供各相轉換電路所需的導通時間之資訊,因此也可以避免傳統使用多個計時電路的電路不匹配問題。According to the above description, the fixed on-time circuit 220 of the present invention The conversion circuit corresponding to the scheduled control of the cycle is determined, and the adjustment amount required for the channel current of the conversion circuit to be controlled is determined according to the current detection signal Ise_1~n, and the pulse width of the on-time signal Ton_s is adjusted in the period. For example, if the current of the channel is too small, the pulse width of the corresponding on-time signal Ton_s is longer; if the current of the channel is too large, the pulse width of the corresponding on-time signal Ton_s is shorter. When entering the next cycle of the multi-phase power conversion controller to control the next conversion circuit, the fixed on-time circuit 220 will re-adjust the on-time signal of the next conversion circuit according to the phase signal Ph_s and the current detection signal Ise_1~n. The pulse width of Ton_s. Since the on-time of the conversion circuits of the phases is staggered and non-overlapping, the fixed on-time circuit 220 can provide the information of the on-time required by each phase-converting circuit by using a single timing circuit, thereby avoiding the conventional use of multiple The circuit of the timing circuit does not match the problem.
請參見第四圖,為根據本發明之一第二較佳實施例之具電流平衡之多相電源轉換控制器之電路示意圖。相較於第三圖所示之實施例,本實施例的固定導通時間電路220額外增加一類比數位轉換電路224,用以將誤差電流產生電路222所產生的調整電流訊號△I_s轉換成數位調整電流訊號△DI_s,使一數位計時電路227得以數位方式來調整導通時間訊號Ton_s的脈衝寬度。請參見第五圖,為根據本發明之一第三較佳實施例之具電流平衡之多相電源轉換控制器之電路示意圖。相較於第四圖所示之實施例,類比數位轉換電路224的位置改至一數位誤差電流產生電路223之前,以先接收電流偵測訊號Ise_1~n,並轉換成數位電流偵測訊號DIse_1~n。數位誤差電流產生電路223根據數位電流偵測訊號DIse_1~n及相數訊號Ph_s而產生數位調整電流訊號△DI_s,使數位計時電路227得以數位方式來調整導通時間訊號Ton_s的脈衝寬度。Please refer to the fourth figure, which is a circuit diagram of a multi-phase power conversion controller with current balance according to a second preferred embodiment of the present invention. Compared with the embodiment shown in FIG. 3 , the fixed on-time circuit 220 of the embodiment additionally adds an analog-to-digital conversion circuit 224 for converting the adjusted current signal ΔI_s generated by the error current generating circuit 222 into a digital adjustment. The current signal ΔDI_s causes the digital timing circuit 227 to digitally adjust the pulse width of the on-time signal Ton_s. Referring to FIG. 5, a circuit diagram of a multi-phase power conversion controller with current balancing according to a third preferred embodiment of the present invention. Compared with the embodiment shown in FIG. 4, before the position of the analog digital conversion circuit 224 is changed to the digital error current generating circuit 223, the current detecting signal Ise_1~n is received first, and converted into a digital current detecting signal DIse_1. ~n. The digital error current generating circuit 223 generates the digital adjustment current signal ΔDI_s according to the digital current detecting signal DIse_1~n and the phase signal Ph_s, so that the digital timing circuit 227 can digitally adjust the pulse width of the on-time signal Ton_s.
請參見第六圖,為根據本發明之一第一較佳實施例之計時電路之電路示意圖。計時電路包含一D型正反器 3261、一電流源、一電容3263、一脈寬控制器3266以及一開關3268。D型正反器3261的一輸入端D接收”1”的邏輯訊號、一輸入端C接收回授控制訊號Pon、一重置端R耦接脈寬控制器3266。請同時參見第三圖,當電壓偵測訊號FB的準位低於參考電壓Vref時,回授控制訊號Pon為高準位。此時,D型正反器3261被觸發,使一輸出端Q與輸入端D相同”1”之邏輯狀態,而一反相輸出端QN為相反之邏輯狀態(即”0”)。因此,開關3268被截止,使電流源開始對電容3263充電。電流源包含一固定電流源3262及一調整電流源3264。固定電流源3262提供一固定之電流,而調整電流源3264根據上述實施例的調整電流訊號△I_s或數位調整電流訊號△DI_s來產生一調整電流。因此電流源所提供的一充電電流為固定電流源3262及調整電流源3264所提供的電流之和,會根據相數訊號Ph_s及複數個轉換電路之電流偵測訊號Ise_1~n來決定。脈寬控制器3266包含一比較器3265以及一SR正反器3267。SR正反器3267的一輸入端S接收回授控制訊號Pon,當回授控制訊號Pon為高準位時,於一輸出端Q輸出高準位之導通時間訊號Ton_s。也就是說,回授控制訊號Pon決定導通時間訊號Ton_s之一起始時間點。此時,多相邏輯控制器230開始導通對應的轉換電路,使電壓偵測訊號FB的準位回升到高於參考電壓Vref,回授控制訊號Pon轉為低準位訊號。比較器3265之一反相端接收一導通時間參考電壓Von,一非反相端耦接電容3263。當電容3263的一電壓高於導通時間參考電壓Von時,比較器3265輸出一高準位訊號至SR正反器3267之一重置端R,使SR正反器3267停止輸出導通時間訊號Ton_s。也就是說,導通時間訊號Ton_s的一結束時間點由導通時間參考電壓Von及電容3263之電壓來決定。此時,D型正反器3261同時被重置,使反相輸出端輸出邏輯狀態”1”之高準位訊號。因此,開關3268被導通使電容3263的電壓被歸零以等待下一次週期(即回授控制訊號Pon又回到高準位)。6 is a circuit diagram of a timing circuit according to a first preferred embodiment of the present invention. The timing circuit includes a D-type flip-flop 3261, a current source, a capacitor 3263, a pulse width controller 3266, and a switch 3268. An input terminal D of the D-type flip-flop 3261 receives the logic signal of "1", an input terminal C receives the feedback control signal Pon, and a reset terminal R is coupled to the pulse width controller 3266. Please also refer to the third figure. When the level of the voltage detection signal FB is lower than the reference voltage Vref, the feedback control signal Pon is at a high level. At this time, the D-type flip-flop 3261 is triggered to make an output terminal Q and the input terminal D have the same logic state of "1", and an inverting output terminal QN is the opposite logic state (ie, "0"). Thus, switch 3268 is turned off, causing the current source to begin charging capacitor 3263. The current source includes a fixed current source 3262 and an adjusted current source 3264. The fixed current source 3262 provides a fixed current, and the regulated current source 3264 generates an adjustment current according to the adjusted current signal ΔI_s or the digital adjustment current signal ΔDI_s of the above embodiment. Therefore, the current supplied by the current source is the sum of the currents supplied by the fixed current source 3262 and the adjusted current source 3264, and is determined according to the phase signal Ph_s and the current detection signals Ise_1~n of the plurality of conversion circuits. The pulse width controller 3266 includes a comparator 3265 and an SR flip-flop 3267. An input terminal S of the SR flip-flop 3267 receives the feedback control signal Pon. When the feedback control signal Pon is at a high level, the high-level on-time signal Ton_s is outputted at an output terminal Q. That is to say, the feedback control signal Pon determines the starting time point of one of the on-time signals Ton_s. At this time, the multi-phase logic controller 230 starts to conduct the corresponding conversion circuit, so that the level of the voltage detection signal FB rises above the reference voltage Vref, and the feedback control signal Pon turns to the low level signal. One of the comparators 3265 receives an on-time reference voltage Von, and a non-inverting terminal is coupled to the capacitor 3263. When a voltage of the capacitor 3263 is higher than the on-time reference voltage Von, the comparator 3265 outputs a high-level signal to the reset terminal R of the SR flip-flop 3267, so that the SR flip-flop 3267 stops outputting the on-time signal Ton_s. That is to say, an end time point of the on-time signal Ton_s is determined by the on-time reference voltage Von and the voltage of the capacitor 3263. At this time, the D-type flip-flop 3261 is simultaneously reset, so that the inverted output terminal outputs the high-level signal of the logic state "1". Therefore, the switch 3268 is turned on to zero the voltage of the capacitor 3263 to wait for the next cycle (ie, the feedback control signal Pon returns to the high level).
除了調整充電電流大小來調整導通時間訊號Ton_s之脈衝寬度外,本發明也可以藉由調整導通時間參考電壓Von的準位來達到相同之作用。請參見第七圖,為根據本發明之一第二較佳實施例之計時電路之電路示意圖。相較於第六圖所示之實施例,調整電流源3264透過一電阻Ron耦接導通時間參考電壓Von,因此比較器3265之反相端所接收的電壓會隨著電阻Ron的壓降而不同,其中電阻Ron的壓降為調整電流源3264的調整電流流經而造成的。In addition to adjusting the magnitude of the charging current to adjust the pulse width of the on-time signal Ton_s, the present invention can also achieve the same effect by adjusting the level of the on-time reference voltage Von. Referring to the seventh figure, there is shown a circuit diagram of a timing circuit according to a second preferred embodiment of the present invention. Compared with the embodiment shown in FIG. 6, the adjustment current source 3264 is coupled to the on-time reference voltage Von through a resistor Ron, so the voltage received by the inverting terminal of the comparator 3265 varies with the voltage drop of the resistor Ron. The voltage drop of the resistor Ron is caused by the adjustment current flowing through the adjustment current source 3264.
請參見第八圖,為根據本發明之一第一較佳實施例之誤差電流產生電路之電路示意圖。誤差電流產生電路包含一電流和電路3221、一平均電路3222以及一誤差計算電路3223。電流和電路3221接收各通道電流的電流偵測訊號Ise_1~n,以計算各通道電流的和並據此輸出一電流和訊號Isum。平均電路3222接收電流和訊號Isum,並計算出一電流平均值及對應輸出一平均電流訊號Iavg作為一目標值。誤差計算電路3223接收平均電流訊號Iavg以及對應到此次週期欲控制的轉換電路的一電流偵測訊號Ise_s,並以計算對應的轉換電路的電流與多相電源轉換電路的全部轉換電路的平均電流之差異輸出調整電流訊號△I_s。當電流偵測訊號Ise_s高於平均電流訊號Iavg時,調整電流訊號△I_s控制上述實施例中的調整電流源3264,使調整電流源3264輸出一正電流,以增加電流源的充電電流大小或調低比較器3265的反相端接收的電壓。如此,可以使對應轉換電路的導通時間縮短而降低通道電流。相對地,當電流偵測訊號Ise_s低於平均電流訊號Iavg時,調整電流訊號△I_s控制上述實施例中的調整電流源3264,使調整電流源3264輸出一負電流,以降低電流源的充電電流大小或調高比較器3265的反相端接收的電壓。如此,可以使對應轉換電路的導通時間增長而提升通道電流。Referring to the eighth figure, there is shown a circuit diagram of an error current generating circuit according to a first preferred embodiment of the present invention. The error current generating circuit includes a current sum circuit 3221, an averaging circuit 3222, and an error calculating circuit 3223. The current and circuit 3221 receives the current detection signals Ise_1~n of the currents of the respective channels to calculate the sum of the currents of the respective channels and output a current and a signal Isum accordingly. The averaging circuit 3222 receives the current and the signal Isum, and calculates a current average value and a corresponding output-average current signal Iavg as a target value. The error calculation circuit 3223 receives the average current signal Iavg and a current detection signal Ise_s corresponding to the conversion circuit to be controlled in the current cycle, and calculates the current of the corresponding conversion circuit and the average current of all the conversion circuits of the multi-phase power conversion circuit. The difference output adjusts the current signal ΔI_s. When the current detecting signal Ise_s is higher than the average current signal Iavg, the adjusting current signal ΔI_s controls the adjusting current source 3264 in the above embodiment, so that the adjusting current source 3264 outputs a positive current to increase the charging current magnitude or modulation of the current source. The voltage received by the inverting terminal of the low comparator 3265. In this way, the on-time of the corresponding conversion circuit can be shortened to reduce the channel current. In contrast, when the current detection signal Ise_s is lower than the average current signal Iavg, the adjustment current signal ΔI_s controls the adjustment current source 3264 in the above embodiment, so that the adjustment current source 3264 outputs a negative current to reduce the charging current of the current source. The voltage received or inverted by the inverting terminal of comparator 3265 is increased. In this way, the on-time of the corresponding conversion circuit can be increased to increase the channel current.
請參見第九圖,為根據本發明之一第二較佳實施例之誤差電流產生電路之電路示意圖。誤差電流產生電路包 含一電流和電路3221、一放大電路3224以及一誤差計算電路3223。電流和電路3221接收對應轉換電路以外的各通道電流的電流偵測訊號Ise_1~s-1及Ise_s+1~n,以計算其他通道電流的和並據此輸出一電流和訊號Isum。放大電路3224接收對應到此次週期欲控制的轉換電路的電流偵測訊號Ise_s,並放大(n-1)倍後輸出一電流放大訊號IseX,其中n為多相電源轉換控制的總通道數。誤差計算電路3223接收平均電流訊號Iavg以及電流放大訊號IseX,並據此輸出調整電流訊號△I_s。相較於第八圖的實施例的作法,本實施例可使調整電流訊號△I_s更能反映出對應的通道電流與其他通道電流之間的差異。Referring to FIG. 9, a circuit diagram of an error current generating circuit according to a second preferred embodiment of the present invention. Error current generation circuit pack A current and circuit 3221, an amplifying circuit 3224, and an error calculating circuit 3223 are included. The current and circuit 3221 receives the current detection signals Ise_1~s-1 and Ise_s+1~n corresponding to the currents of the respective channels other than the conversion circuit to calculate the sum of the currents of the other channels and output a current and a signal Isum accordingly. The amplifying circuit 3224 receives the current detecting signal Ise_s corresponding to the conversion circuit to be controlled in the current cycle, and amplifies (n-1) times and outputs a current amplifying signal IseX, where n is the total number of channels of the multi-phase power conversion control. The error calculation circuit 3223 receives the average current signal Iavg and the current amplification signal IseX, and outputs an adjustment current signal ΔI_s accordingly. Compared with the embodiment of the eighth embodiment, the embodiment can make the adjustment current signal ΔI_s more reflect the difference between the corresponding channel current and other channel currents.
綜合上述實施例之說明,本發明之多相電源轉換控制器使用固定導通時間控制技術,改善了多相電源轉換電路的暫態反應。而且多相電源轉換控制器利用單一計時電路來決定各相電路的導通時間,降低了電路的複雜度及成本,也同時避免了電路不匹配影響電流平衡精確度之問題。In summary of the above embodiments, the multiphase power conversion controller of the present invention uses a fixed on-time control technique to improve the transient response of the multi-phase power conversion circuit. Moreover, the multi-phase power conversion controller uses a single timing circuit to determine the on-time of each phase circuit, which reduces the complexity and cost of the circuit, and also avoids the problem that the circuit mismatch affects the accuracy of the current balance.
如上所述,本發明完全符合專利三要件:新穎性、進步性和產業上的利用性。本發明在上文中已以較佳實施例揭露,然熟習本項技術者應理解的是,該實施例僅用於描繪本發明,而不應解讀為限制本發明之範圍。應注意的是,舉凡與該實施例等效之變化與置換,均應設為涵蓋於本發明之範疇內。因此,本發明之保護範圍當以下文之申請專利範圍所界定者為準。As described above, the present invention fully complies with the three requirements of the patent: novelty, advancement, and industrial applicability. The invention has been described above in terms of the preferred embodiments, and it should be understood by those skilled in the art that the present invention is not intended to limit the scope of the invention. It should be noted that variations and permutations equivalent to those of the embodiments are intended to be included within the scope of the present invention. Therefore, the scope of the invention is defined by the scope of the following claims.
100‧‧‧多相電源轉換控制器100‧‧‧Multiphase power conversion controller
110‧‧‧回授電路110‧‧‧Return circuit
120‧‧‧固定導通時間電路120‧‧‧Fixed on-time circuit
130‧‧‧多相邏輯控制器130‧‧‧Multiphase Logic Controller
150a~150c‧‧‧轉換電路150a~150c‧‧‧ conversion circuit
152a~152c‧‧‧電流偵測電路152a~152c‧‧‧current detection circuit
Co‧‧‧輸出電容Co‧‧‧ output capacitor
FB‧‧‧電壓偵測訊號FB‧‧‧ voltage detection signal
Io1~Io3‧‧‧通道電流Io1~Io3‧‧‧ channel current
Ise_1~Ise_3‧‧‧電流偵測訊號Ise_1~Ise_3‧‧‧current detection signal
Ph_s‧‧‧相數訊號Ph_s‧‧‧ phase signal
Pon‧‧‧回授控制訊號Pon‧‧‧ feedback control signal
Sa_1~Sa_3、Sb_1~Sb_3‧‧‧控制訊號Sa_1~Sa_3, Sb_1~Sb_3‧‧‧ control signals
Ton_s‧‧‧導通時間訊號Ton_s‧‧‧ On time signal
Vin‧‧‧輸入電壓Vin‧‧‧Input voltage
Vout‧‧‧輸出電壓Vout‧‧‧ output voltage
Claims (7)
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