TWI506810B - Method for manufacturing light emitting diode - Google Patents

Description

Method for manufacturing light emitting diode

The present invention relates to a semiconductor light source, and more particularly to a light-emitting diode (LED).

The light-emitting diode system used herein is a semiconductor light source for generating light having a specific wavelength or a specific wavelength range. Generally, a light-emitting diode system is used in an indicator lamp and is gradually applied to displays. The light emitting diode emits light when a voltage is applied across a p-n junction formed by the oppositely doped semiconductor compound film layer. The use of different materials to change the energy gap of the semiconductor layer and the formation of an active layer in the p-n junction can produce light of different wavelengths. In addition, the selective phosphor material changes the characteristics of the light generated by the light-emitting diode.

The continued development of light-emitting diodes has resulted in an efficient and mechanically durable light source that covers the visible light spectrum and its subsequent wavelengths. When coupled to a possible long-lasting solid state component, a variety of new display applications can be formed and the LED can be placed in a position to compete with the inherent incandescent and fluorescent fixtures. However, there is still a need to continuously consider improvements in the manufacturing process to produce high efficiency and mechanically durable light-emitting diodes.

In view of the above, the present invention provides a method of fabricating a light-emitting diode to produce a preferred light-emitting diode.

According to an embodiment, the present invention provides a method of fabricating a light emitting diode, comprising: providing a sapphire substrate; forming a light emitting structure on the sapphire substrate, the light emitting structure comprising: a first doped layer, doped with a first dopant of a first conductivity type; an active layer over the first doped layer; and a second doped layer over the active layer, the second doped layer being doped oppositely a second dopant of one of the second conductivity types of the first conductivity type; grinding a back surface of the sapphire substrate to remove a portion of the sapphire substrate; and removing one of the sapphire substrates by etching unit.

According to another embodiment, the present invention provides a method for fabricating a light emitting diode, comprising: providing a growth substrate; forming a light emitting structure on the growth substrate, the light emitting structure comprising: a buffer layer; a dummy layer overlying the buffer layer, the first doped layer being doped with one of the first types of first dopants; an active layer over the first doped layer; and a second doped layer Located on the active layer, the second doped layer is doped with a second dopant opposite to one of the second types of the first type; a plurality of channels are etched into the light emitting structure to form an exposed a plurality of light emitting platform structures on the sidewall; depositing a protective layer to cover the exposed sidewall; removing a first portion of the grown substrate by polishing a back surface of the grown substrate; and removing the grown substrate by etching One of the remaining parts.

According to still another embodiment, the present invention provides a method for fabricating a light emitting diode, comprising: providing a growth substrate; forming a light emitting structure on the growth substrate, the light emitting structure comprising: a buffer layer; a dummy layer overlying the buffer layer, the first doped layer being doped with a first dopant of a first type; an active layer over the first doped layer; and a second doped layer Located on the active layer, the second doped layer is doped with a second dopant opposite to one of the second types of the first type; a plurality of channels are etched into the light emitting structure to form a plurality of a light emitting platform structure; by polishing a back surface of one of the growth substrates to remove a first portion of the growth substrate such that a remaining portion of the growth substrate is about 5 microns; and moving by plasma etching or wet etching Except for the remaining portion of the growth substrate.

The above described objects, features and advantages of the present invention will become more apparent and understood.

It will be appreciated that a number of different embodiments, or examples, are provided below for performing different features of the present invention. Specific examples of components and setup scenarios are described below for the purpose of simplifying the present invention. However, such components and arrangements are for illustrative purposes only and are not intended to limit the invention. For example, the formation of a first component on or in a second component in the description may include the implementation of direct contact of the first component with the second component, and also includes the first component and The implementation of additional components is included between the second components such that there is no direct contact between the first component and the second component. In addition, the present invention may repeat reference numerals and or characters in different examples. These repetitive cases are based on the simplification and clarity of the present invention and are not intended to illustrate the relevance of the various embodiments and/or drawings.

The manufacturing methods 11 and 12 of the light-emitting diode according to the present invention are shown in Figs. 1 and 2. 3-15 are schematic partial views of one of the light-emitting diodes in a plurality of process stages in accordance with some embodiments of the present invention. The light-emitting diode can be a display having one of the plurality of light-emitting diodes or a light-emitting device, and the light-emitting diodes can be controlled individually or collectively. The light emitting diode may also be an integrated circuit, a part of a system on a wafer or may include such as a resistor, a capacitor, an inductor, a diode, a MOSFET, a complementary gold. Multiple passive and active oxygen semiconductor transistors (CMOS), bipolar junction transistors (BJT), laterally diffused metal oxide semiconductor transistors (LDMOS), high power MOS transistors or other types of transistors Part of a microelectronic component. It will be appreciated that such drawings have been simplified for purposes of better understanding of the inventive concepts of the present invention. Thus, it can be understood that additional processes can be performed before, during, and after the methods as in Figures 1-2, and only certain processes are simply described herein, and the processes described can be replaced by multiple processes. To achieve the same effect.

Referring to Figure 1, method 11 proceeds to operation 13 to provide a substrate. The substrate includes a material suitable for growing a light emitting structure. Therefore, the substrate can also be referred to as a growth substrate or a growth wafer. In various embodiments, the substrate comprises sapphire. In other embodiments, the substrate comprises gallium nitride, tantalum carbide, niobium or other suitable material suitable for growing the light emitting structure. In operation 15, a light emitting structure can be formed on the substrate. The light emitting structure is typically a semiconductor diode.

Figure 3 shows one of the light emitting structures 30 on a substrate 31. The light emitting structure 30 is formed on the substrate 31. In the present embodiment, the light emitting structure 30 includes a doped layer 35, a multiple quantum well (MQW) layer 37, and a doped layer 39. Doped layers 35 and 39 are oppositely doped semiconductor layers. In some embodiments, doped layer 35 includes an n-type gallium nitride material and doped layer 39 includes a p-type gallium nitride material. In other embodiments, the doped layer 35 can comprise a p-type gallium nitride material and the doped layer 39 can comprise an n-type gallium nitride material. The multiple quantum well layer 37 shown in FIG. 3 includes a plurality of staggered (or spaced) layers of active materials such as gallium nitride and indium gallium nitride. As used herein, the active material in the light-emitting diode is a major source of illumination from a light-emitting diode during operation. For example, in one embodiment, the multiple quantum well layer 37 includes ten layers of gallium nitride and ten layers of indium gallium nitride, wherein an indium gallium nitride layer is formed on a gallium nitride layer. The other gallium nitride layer is formed on the indium gallium nitride layer and continues to be implemented in the above manner. The number of interleaved layers and their thickness affect the luminous efficiency. The multiple quantum well layer 37 can have a thickness of, for example, about 100-2000 nm, about 1 micron or about 1.5 microns.

In FIG. 3, the doped layer 35, the multiple quantum well layer 37, and the doped layer 39 are all formed by an epitaxial growth process. In the epitaxial growth process, a first undoped layer 33, typically a gallium nitride layer (in some cases, aluminum nitride), grows above the substrate 31. This first undoped layer 33 is also referred to as a buffer layer 33. The buffer layer can be from about 500 nanometers to 5 microns, such as about 1.5 microns or about 2 microns. The film layers 35, 37 and 39 are then sequentially grown. In the epitaxial growth process, doping can be accomplished by adding impurities to a gas source. In these epitaxial growth processes, a p-n junction (or a p-n diode) comprising a plurality of quantum well layers 37 between opposite doped layers 35 and 39 is formed. When a voltage is applied between the doped layer 35 and the doped layer 39, current will flow through the light emitting structure 30, and the multiple quantum well layer 37 will emit light. The color of the light emitted by the multiple quantum well layers 37 is related to the wavelength of the emitted light, which can be adjusted by changing the composition and structure of the multiple quantum well layers 37. For example, a slight increase in the indium content of the indium gallium nitride layer can cause the output wavelength to shift toward longer wavelengths.

The operation of forming the light emitting structure 30 can optionally include forming additional film layers not shown in FIG. For example, an ohmic contact layer or other film layer can be added over the doped layer 39. Such other layers may include an indium tin oxide (ITO) layer or other transparent conductive layer.

In order to facilitate good electrical contact, light extraction and effective cooling of the light-emitting diode during operation, the growth substrate will be removed in many light-emitting diode products, particularly in high power light-emitting diode applications. In one example, electromagnetic waves (e.g., an excitation laser) are employed to destroy the interface between the growth substrate and the buffer layer 33, thereby decomposing the buffer material at the interface. This interface can be an undoped gallium nitride layer. Such a growth substrate such as sapphire can be peeled off and removed. In the laser lift-off (LLO) method, a laser beam generated by using an excitation laser is injected from a sapphire side into a light-emitting diode structure to decompose at an interface between the substrate and the buffer layer. The gallium nitride material becomes a gallium atom and a nitrogen gas. This laser lift-off method is generally suitable for the manufacture of light-emitting diodes after the substrate is removed. One of the features of this laser lift-off method is that in many instances, the removed sapphire can be recycled and reused as a growth substrate, thereby saving material costs. However, as discovered by the inventors and disclosed herein, this laser lift-off method is not suitable for many advanced light-emitting diode applications and efficient fabrication.

This laser lift-off method typically uses a high laser power density to decompose gallium nitride at the buffer layer and substrate interface. The laser spot is usually set to the grain size of the light-emitting diode to ensure perfect peeling. As the size of the growing substrate increases, more and more light-emitting diode crystal grains can grow on the same substrate. As the laser is removed from point to point (grain to grain), the time for laser stripping is thus increase. Since the high power density limits the area of the laser beam or the spot, the size of the light-emitting diode die suitable for the laser stripping process is also limited. With the increasing use of high power light-emitting diodes using larger light-emitting diode dies, this laser stripping process may not meet the demand for cleaner stripping of larger and larger grains.

To ensure that the entire substrate can be removed, the laser spot slightly covers the edge. However, this high power density is very devastating and can cause cracking at the edge of each laser spot coverage. This laser may destroy the exposed surface and the sidewalls of the light-emitting structure. Such ruptures and damage may cause leakage current during operation.

Since the laser beam enters the sapphire, if the sapphire interface after the growth of the light-emitting diode structure includes irregularities, the laser stripping process may be non-uniform. Therefore, the conventional laser peeling method also includes a sapphire grinding step on the back side to improve the uniformity of the laser stripping process. This sapphire grinding reduces the possibility of recycling sapphire after the end of the process and increases process time and cost.

In one aspect, the invention relates to a method of removing a growing substrate from multiple operations that do not include the use of a laser beam. The sapphire substrate is first ground to a first specific thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching.

Referring again to FIG. 1, in operation 17, a first side of the growth substrate is removed by grinding a back side of the substrate. In some embodiments, the grinding can be adjusted to remove sufficient growth of the substrate to leave about 3-20 microns, about 10 microns, or about 5 microns. This grinding is done in one operation or in multiple operations depending on the abrasive used. The grinding machine is a grinding wheel containing diamond particles of extremely fine size combined with epoxy or wax. When the substrate is placed on the machine, the grinding wheel presses the back side of the substrate and rotates in different directions. The hard diamond particles remove the crucible from the back side of the substrate by a shear force applied to the substrate. The polishing operation of the thin tantalum substrate may additionally involve a chemical etchant. Some commercial machines for backside grinding of the substrate can be used for other substrates such as sapphire substrates.

In one example, only one grinding operation was used. The abrasive material can be diamond particles having a size between 15 and 5 microns. Under the control of the uniformity and rate of grinding, the choice of abrasive can maximize the removal rate. This grinding operation is about 30-90 minutes.

In other examples, more than one grinding operation was used. In other examples. A first grinding operation can remove less material than a single grinding operation. This first grinding operation removes enough growth of the substrate to leave more than 6 microns. For example, a diamond particulate abrasive can be used, and the wafer can be ground using a large size abrasive slurry at a polishing time of about 35 minutes to thin the wafer from about 430 microns to about 50 microns. The approximately 50 micron thick wafer is then ground in a second stage polishing process using a 6 micron diamond abrasive for about 20 minutes to a thickness of about 5 microns. The first operating abrasive can be selected to have a maximum removal rate. In the second stage of the grinding process, the grinding removes the grown substrate to a specific thickness. Thus the first abrasive can be harder and/or more corrosive than the second abrasive and other subsequent abrasives when more than two operations are used. The initial sapphire back condition is not suitable for the grinding process as compared to the laser stripping method. Therefore, unlike the laser stripping process, the surface needs to be ground first, and surface preparation measures are not performed before the grinding operation.

After the polishing operation 17, the remaining portion of the grown substrate can be removed by etching in operation 19 in FIG. In some embodiments, the etching is dry etching using inductively coupled plasma (ICP). Inductively coupled plasma etching may use inert elements such as nitrogen, argon, helium, neon, oxygen or other known gases. This inductively coupled plasma etch can use reactive ionic elements such as fluorine-containing etchants (ie, CF ₄ , CHF ₃ , SF ₆ , C ₄ F ₈ , C ₄ F ₁₀ , C _x F _2x+2 , CCl ₃ , CCl). ₂ F ₂ , CF ₃ Cl, C ₂ ClF ₅ ), chlorine-containing etchant (ie BCl ₃ , BCl ₃ +Cl ₂ , CCl ₄ , CCl ₄ +Cl ₂ , BCl ₃ +Cl ₂ , CCl ₃ F, CCl ₂ F ₂ , CF ₃ Cl, C ₂ ClF ₅ ), a bromine-containing etchant (ie, HBr) and other halogen-containing etchants. A high-density plasma is produced in the process chamber. This plasma etching operation can be carried out at a substrate temperature of less than about 150 ° C, preferably at about room temperature. A bias can be applied at the substrate to direct the plasma toward the substrate.

The plasma dry etching can be performed by other plasma generation methods, including capacitively coupled plasma (CCP), magnetron plasma, electron cyclotron resonance (ECR) plasma. Or microwave plasma. The plasma can be produced on-site or remotely. This plasma has a high ion density.

Alternatively, in some embodiments, the etching is wet etching. This wet etching can use sulfuric acid, phosphoric acid or a combination of such etchants. In a wet etch, the substrate is immersed in an etching solution for a period of time until a sufficient amount of the growth substrate is removed. The sulfuric acid can be H ₂ SO ₄ and the phosphoric acid can be H ₃ PO ₄ . The etching solution may also use a small amount of acetic acid (CH ₃ COOH), nitric acid (HNO ₃ ), water, and other commonly used etchant components. For example, the etching solution can be a mixture of 3 sulfuric acid: 1 phosphoric acid including acetic acid, nitric acid and water. The etching solution may also be heated to above 100 ° C, above 200 ° C, above 300 ° C or above 400 ° C. This wet etching can be carried out in a cavity below a pressure of, for example, 1 atmosphere or more than 1.5 atmospheres or 2 atmospheres. A typical etching solution is a mixture of 3 sulfuric acid:1 phosphoric acid comprising acetic acid, nitric acid and water at 300 ° C under atmospheric pressure. Those skilled in the art can design a wet etch process to achieve an appropriate etch rate and selectivity. Since the entire portion of the fabricated LED is exposed to the etching solution, portions of the component can be protected by a protective layer. The protective layer may be selected to have a material having an etching rate much lower than that of the grown substrate in the etching process. The protective layer may also suitably cover the sidewalls of the light-emitting diode platform structure, in other words, it may be sufficiently compliant to occur without the etching of the component itself.

Figure 2 is a flow diagram of a process flow for demonstrating process 12 in accordance with a broader flow 11 of the present invention and a different embodiment. This example flow 12 shows a process for fabricating a light emitting diode package having one of the light emitting diodes of the inner substrate in accordance with an embodiment of the method of the present invention. Other types of light-emitting diode packages formed by other processes than the exemplary process 12 are also applicable to the fabrication of an embodiment of the method according to the present invention, including one of the light-emitting diodes having one of the light-emitting diodes removed from the inner substrate. One of the packages. An example of a flip-chip LED package including one of the package substrates attached by solder bumps is shown.

Referring to FIG. 2, in operation 13, a growth substrate such as a sapphire substrate is provided. In operation 15, a light emitting structure is formed on the substrate. A contact metal layer is then selectively formed over the light emitting structure, and a bonding metal layer is formed over the contact metal layer in operation 16. A reflective metal layer may be disposed between the contact metal layer and the bonding metal layer. In operation 17, a scribe pattern is then employed to etch the structure to form a light emitting platform structure. A protective layer is deposited in operation 18 to protect the platform structure, particularly the exposed platform sidewall portions. In operation 19, the first portion of the grown substrate is removed by grinding the back side of the substrate. As indicated previously, this grinding operation can include one or more operations using different abrasives. Next, in operation 20, the remaining portion of the grown substrate can be removed by etching by plasma etching, wet etching, or a combination thereof.

Figures 3-15 show an exemplary intermediate structure of the process flow as shown in Figure 2. Figure 3 shows the formation of the aforementioned illumination structure 30. 4 shows one of the contact metal layer 41 and the selective one of the reflective metal layer 43 formed on the light emitting structure 30. The contact metal layer 41 is a metal which may be nickel, such as a nickel/gold nickel alloy, or a metal alloy such as chromium/platinum/gold, titanium/aluminum/titanium/gold, or other similar alloy. In one embodiment, the layer of contact metal 41 is a nickel/silver alloy. The contact metal layer 41 is firmly adhered to the top layer of the light emitting structure 30 and the reflective metal layer 43. The reflective metal layer 43 can be an alloy such as aluminum, copper, titanium, silver, gold, alloys such as titanium/platinum/gold, or combinations thereof. In particular, silver and aluminum are well-known good reflectors for blue light. The light reflecting layer can be formed by a physical vapor deposition (PVD) process or a chemical vapor deposition (CVD) or other deposition process. The contact metal layer 41 and the reflective metal layer 43 may have a combined thickness of about 300 nm.

The contact metal layer 41 and the selective reflective metal layer 43 are formed using a physical vapor deposition process or a chemical vapor deposition process or other deposition process and deposited with the same pattern. These layers can be deposited using different techniques. For example, the reflective metal layer 43 can be deposited using electrochemical plating, and the contact metal layer 41 can be deposited by physical vapor deposition.

Figure 5 shows a resist pattern 45 overlying and surrounding metal layers 41 and 43. A resist pattern is deposited, exposed and developed over the workpiece. This pattern defines an area surrounding the metal layers 41 and 43. Figure 6 shows a plurality of streets 47, or trenches, etched into the light-emitting structure 30 as shown in Figure 5 in accordance with a mesa pattern 45. These channels 47 separate individual light-emitting mesa structures. While these channels show a high aspect ratio, these figures are not drawn to scale and the channels can be wider than they are displayed. This platform structure can have a height of a few microns and a width of hundreds or thousands of microns. The width of this channel can be more than 50 microns wide. As shown, the etching stops at an interface between the buffer layer 33 and the growth substrate 31. In various embodiments, the process can include a slight overetch, and the substrate 31 can serve as an etch stop.

The etching of the light emitting platform structure may be a dry etching or a wet etching. For dry etching, an inductively coupled plasma (ICP) using one of argon or nitrogen plasma can be used. For wet etching, hydrochloric acid (HCl), hydrofluoric acid (HF), hydroiodic acid (HI), sulfuric acid (H ₂ SO ₄ ), phosphorous acid (H ₂ PO ₄ ), phosphoric acid (H) can be used in sequence. ₃ PO ₄ ) or a combination thereof. Part of the wet etchant requires a higher temperature to achieve an effective etch rate, such as phosphoric acid having an etch temperature of about 50-100 °C.

As shown in FIG. 7A, after etching to form the light-emitting platform structure, the resist pattern 45 is removed. A protective layer 51 is then formed over the top and sidewalls of the light emitting platform structure and over the substrate within the channel 47, as shown in FIG. 7B. This protective layer 51 protects the exposed surface from undesired reactions caused by materials used in subsequent processes. In particular, the protective layer 51 protects the exposure of the light-emitting platform structure from subsequent processing operations such as resist removal, backside polishing, and backside etching. Therefore, the protective layer 51 having a lower etching rate than the grown substrate in the etching process can be selected. The protective layer 51 may also suitably cover the sidewalls of the exposed light-emitting platform structure, in other words, it may be sufficiently compliant. Depending on the material of the protective layer, the above considerations will limit the types of processes that can be used to deposit this material.

In some embodiments, the protective layer 51 may be tantalum oxide, tantalum nitride, hafnium oxynitride, tantalum carbide, carbon-doped cerium oxide, carbon-doped carbonitride or other known non-conductive protective materials. For example, ruthenium oxide can be deposited using a plasma enhanced chemical vapor deposition (PECVD) process. Plasma enhanced chemical vapor deposition is commonly used, using a higher temperature based on other dielectric deposition techniques that cause problems at the previously deposited metal layers 41 and 43. In the use of plasma enhanced chemical vapor deposition to deposit yttria, those skilled in the art can adjust the process to deposit a suitable film layer.

In order to avoid leakage currents surrounding the multiple quantum well layers 37, it is particularly important to protect the sidewalls of the multiple quantum well layers 37 and portions of their adjacent layers. It is advantageous to protect a larger area, as this reduces the likelihood that subsequent etching processes will damage the light emitting structure 30. Depending on the process and the materials used, a protective layer 51 of varying thickness can be deposited and formed over the sidewalls as shown and above the field or horizontal regions. The protective layer 51 from the sidewall to the light-emitting platform structure is measured to be about 600 angstroms, or at least 100 angstroms, and may be as much as about 1000 nanometers, depending on the plasma form and bias conditions used. .

As shown in FIG. 8A, a portion of the protective layer 51 on the top surface of the light emitting platform structure is then removed by patterning and etching. As shown, the protective layer 51 on the film layer 39 is removed to expose the contact metal layer 41 and the reflective metal layer 43. A resist pattern is formed on the protective layer 51 to protect a portion of the protective layer located within the via and the sidewalls of the light emitting platform structure. The unprotected portion of the protective layer 51 on the light emitting platform structure and surrounding the metal layers 41 and 43 is then etched by dry etching or wet etching.

FIG. 8B shows an additional bonding metal layer 53 formed on the contact metal layer 41 and the reflective metal layer 43. The bonding metal material may be suitable for bonding a soft metal having an adhesive metal layer and a bonding substrate. For example, the bonding material can be gold or gold/tin alloy. After removing one of the protective layers 51, it is not necessary to remove or remove the resist pattern in the deposition of the bonding metal material. The bonding metal can be deposited by physical vapor deposition, chemical vapor deposition, or other deposition processes including electrodeposition or electroless deposition.

As shown in FIG. 9, the light-emitting platform structure and the growth substrate are then inverted and connected to a bonding substrate. The connecting metal layer 53 is connected to one of the adhesive metal layers 57 on a substrate 59. The substrate 59 is typically a germanium substrate, but may be a metal or ceramic. A suitable substrate can have a high thermal conductivity, such as tantalum or copper. The adhesive metal layer can be made of gold, tin, or an alloy of such materials. The connection metal layer 53 and the adhesion metal layer 57 can be connected by eutectic bonding or metal bonding. In the eutectic connection, the connecting metal layer may be a gold/tin alloy, and the adhesive metal layer may be made of gold. In the metal bond, the metal layers 53 and 57 may both be gold.

After the die of the light emitting diode is bonded to the substrate, the growth substrate 31 can be removed in accordance with several operations described herein. Figure 10 shows a thinned growth substrate 55 after one or more polishing processes. Fig. 11 shows the structure of the light-emitting platform connected to the connection substrate 59 after the growth of the substrate is completely removed. As previously described, the thinned growth substrate 55 is removed by dry etching or wet etching. After completely removing the grown substrate, the respective light emitting platform structures may be referred to as light emitting diode grains. Each of the light emitting diode dies can generate light separately from each other.

Figure 12 shows a substrate with a light-emitting diode die mounted with a buffer layer 33 removed. A resist pattern can first be applied to protect portions of the structure from removal during processing. A resist pattern may be formed on the edge of the light emitting diode die, the protective layer surface 51, and the surfaces of the metal layers 53 and 57. A dry etching process such as an inductively coupled plasma process can be applied to remove portions of the buffer layer 33. It is to be noted that although it is shown in Fig. 12 that the edge of the buffer layer 33 remains on the light-emitting diode die, it is not necessary. These figures and text describe the use of a resist to protect the edges, so that the protective layer 51 need not be removed. However, other methods for protecting the resist layer 51 may be used, such as depositing a sacrificial layer prior to removal of the buffer layer. Typically, a biased inductively coupled plasma (ICP) is used and a heavier molecule such as argon, helium or neon is used to perform a physical etching process.

Referring to Figure 13, the exposed surface of the first doped layer 35 can be subsequently processed to obtain a rough surface 61 and metal contacts 63 and 64 are formed at the surface. In some embodiments, the surface is first patterned to protect the area used to form the metal contacts 63 and then plasma treated to form a rough surface. Plasma etching using one of chemical etchants such as chlorine may be used to etch its surface along a gallium nitride crystal lattice structure to form a rough surface having a small triangle. The roughened surface can then be patterned for contact deposition of the metal. In a particular embodiment, the contact metal can be deposited to form an interconnect pattern having a plurality of contact pads 64 and thin contacts 63 on the die surface. Such an internal connection is sufficient to distribute current over the surface. An exemplary contact pattern is shown in Figure 14. The contact pads 64 can be joined by a thin contact structure 63. The thin contact 63 can be about 20-30 microns wide and the contact pads can be about 50-80 microns wide. It is worth noting that the step of patterning the resist can be omitted by forming the contact on the roughened surface or by placing the contact metal in the plasma etching, and the contact resistance may be correspondingly increase.

An additional protective layer material 65 may also be deposited to protect the sidewalls of the exposed conductive metal layer 53. The material of this additional protective layer 65 may be the same as the composition of the protective layer 51 or a different material. The material of the protective layer 65 may be deposited directly on the protective layer 51.

After the contact structures 63 and 64 are completed, a light emitting diode is generally formed. The light emitting diode can be selectively tested or binned prior to mounting onto the bonding substrate and prior to cutting. During the testing and grouping process, the electrodes are moved across the substrate between the light-emitting diode die and the light-emitting diode die. The output of each of the light emitting diode dies is measured. At this stage, any defects in the luminescent diode grains will cause their light output to be below the minimum specification, so they will be marked and removed in subsequent procedures. If defective LED dies are discovered and discarded later, they will result in more material and process losses such as packaging, lens molding and fluorescent coating. Such early defect product removal scenarios save process time and material costs. Light-emitting diode dies having a light output that meets the minimum specifications are classified into different groups for further fabrication of products having different characteristics.

Figure 15 shows an example of test and group substrate mounted light emitting diode dies. Here, temporary contacts formed at the channels for testing the individual dies of the light-emitting diode dies of the group are shown. A portion of the protective layer material 65 can be patterned and opened such that the temporary contact 67 can be deposited. This operation can generally be performed simultaneously with the deposition of contact structures 63 and 64. In the test and grouping process, a current is conducted and traverses the light-emitting diode die and a light output is measured. A pair of electrode probes 69 and 71 are used to contact the contact 64 with the temporary contact 67. This test can include measuring different output situations corresponding to different current input quantities. Light-emitting diodes with similar responses will be classified as homogeneous. Those skilled in the art will appreciate that this temporary contact can also be used to test adjacent illuminating diode dies, at which point such structures are tested simultaneously and of the same type.

After the light-emitting diode grains are grouped, they can be cut or divided into individual light-emitting diodes. The splitting process can be a non-etching process that can employ a cutting device such as a laser beam or a cutting blade to physically separate the light emitting diode dies. After dicing, each of the light-emitting diodes suitable for generating light can be physically and electrically independent of one another.

While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the invention may be modified and retouched without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application attached.

11,12. . . Method for manufacturing light emitting diode

13, 15, 16, 17, 18, 19, 20. . . operating

30. . . Light structure

31. . . Substrate

33. . . The buffer layer

35. . . Doped layer

37. . . Multiple quantum well layers

39. . . Doped layer

41. . . The buffer layer

43. . . Reflective metal layer

45. . . Resistive pattern

47. . . aisle

51. . . The protective layer

53. . . Bonded metal layer

55. . . Thinned growth substrate

57. . . Adhesive metal layer

59. . . Substrate

61. . . Rough surface

63. . . Thin contact structure

64. . . Contact pad

65. . . The protective layer

67. . . Temporary contact

69, 71. . . Electrode probe

1 and 2 are flow charts showing a method of manufacturing a light-emitting diode according to various aspects of the present invention;

Figures 3-6, 7A, 7B, 8A, 8B, and 9-15 show diagrams of various stages of fabrication of a light-emitting diode in accordance with a particular embodiment of the present invention.

12. . . Method for manufacturing light emitting diode

13, 15, 16, 17, 18, 19, 20. . . operating

Claims (9)

A method for manufacturing a light-emitting diode, comprising: providing a sapphire substrate; forming a light-emitting structure on the sapphire substrate, the light-emitting structure comprising: a buffer layer; a first doped layer on the buffer layer, doped a first dopant of a first conductivity type; an active layer over the first doped layer; and a second doped layer over the active layer, the second doped layer being doped Conversely, the second dopant of one of the second conductivity types of the first conductivity type; grinding the back side of one of the sapphire substrates to remove a portion of the sapphire substrate; and etching to completely remove the sapphire substrate a remaining portion; and removing a portion of the buffer layer to form a recess in the buffer layer. The method of manufacturing a light-emitting diode according to claim 1, wherein the grinding the back surface of the sapphire substrate comprises sequentially using two kinds of abrasive materials having different hardnesses or particle sizes. The method of manufacturing a light-emitting diode according to claim 1, wherein the etching is plasma etching or wet etching. A method for manufacturing a light-emitting diode, comprising: providing a growth substrate; forming a light-emitting structure on the growth substrate, the light-emitting structure package Included: a buffer layer; a first doped layer over the buffer layer, the first doped layer is doped with one of the first types of first dopants; and an active layer is located at the first doped layer And a second doped layer over the active layer, the second doped layer being doped with a second dopant opposite to one of the second types of the first type; etching a plurality of channels In the light-emitting structure, a plurality of light-emitting platform structures having exposed sidewalls are formed; a protective layer is deposited to cover the exposed sidewalls; and a back surface of one of the growth substrates is removed by grinding a back surface of the growth substrate; The recess is completely removed by etching to remove a portion of the growth substrate; and a portion of the buffer layer is removed to form a recess in the buffer layer. The method for manufacturing a light-emitting diode according to claim 4, further comprising: forming a contact metal layer on the second doped layer; and forming a bonding metal layer on the contact metal layer. The method for manufacturing a light-emitting diode according to claim 5, further comprising: bonding the light-emitting platforms on the growth substrate by bonding the bonding metal layer and one of the adhesion metal layers on a substrate Structure with the crucible substrate. The manufacturer of the light-emitting diode as described in claim 4 The method further includes: roughening one of the exposed portions of the first doped layer; and forming a metal contact over a remaining portion of the exposed surface of the first doped layer. The method for manufacturing a light-emitting diode according to claim 7, further comprising: forming a temporary contact on the adhesive metal layer; applying the metal across the temporary contact and the first doped layer Contacting one of the voltages such that light is emitted by the illumination platform structure; measuring the light; and grouping the illumination platform structure according to the measurement of the light. A method for manufacturing a light-emitting diode, comprising: providing a growth substrate; forming a light-emitting structure on the growth substrate, the light-emitting structure comprising: a buffer layer; a first doped layer on the buffer layer, The first doped layer is doped with a first dopant of a first type; an active layer is disposed over the first doped layer; and a second doped layer is disposed over the active layer. The doped layer is doped with a second dopant opposite to the second type of the first type; a plurality of channels are etched into the light emitting structure to form a plurality of light emitting platform structures; by grinding the growth substrate One of the back faces to remove the growth substrate a first portion such that a remaining portion of the growth substrate is about 5 microns; completely removing one of the remaining portions of the growth substrate by plasma etching or wet etching; and removing one of the buffer layers, A notch is formed in the buffer layer.