TWI505258B - Display panel and display apparatus using the same - Google Patents

Description

Display panel and display device using the same

The present invention relates to a display panel and a display device using the same.

A panel of a liquid crystal display usually has two glass substrates stacked one on top of the other: a thin film-transistor (TFT) substrate and a color filter (CF) substrate. A thin film transistor is formed on the thin film transistor substrate, and a conductive trace such as a scan line and a data line connecting the thin film transistor is formed, and a common electrode layer is formed on the color filter substrate, and a gap is arranged between the two substrates. Spacer to maintain a gap of a fixed thickness. However, in the manufacturing process of the display panel, impurities may inevitably appear in the gaps between the two substrates, or when the panel is pressed by an external force and the spacers are crushed, the short circuit between the conductive traces and the common electrode layer may occur.

At present, the common short-circuit protection of the display panel utilizes a power supply circuit chip to activate a protection mechanism for an abnormally large voltage or an excessive current, and the short-circuit current of less than 300 mA between the two substrates cannot be effectively protected, but if Small currents continue to flow in the display panel, which will cause heat to accumulate and overheat, and damage or burn some of the pixels. Therefore, it is necessary to develop a new display panel technology to treat and improve the problems caused by the accumulation of small-value short-circuit currents between the above substrates.

In order to achieve the object, an embodiment of the present invention provides a display panel including: a first substrate; a plurality of thin film transistors formed on the first substrate; a first driving unit formed on The first substrate is connected to the gates of the thin film transistors via a plurality of first conductive traces; a second substrate is disposed facing the first substrate; and a common electrode layer is formed on the second substrate base a power management unit that outputs at least a first voltage, a second voltage, and a third voltage, the first voltage being used as the first driving unit to control the conduction of the thin film transistors, the second voltage Controlling, by the first driving unit, the thin film transistors, the third voltage is supplied to the common electrode layer as a reference voltage of the display panel; and a short circuit detecting unit, the first substrate and the first The two substrates are electrically connected to detect a current between the first substrate and the second substrate, and output a control signal.

According to another aspect of the present invention, a display device includes a display panel, the display panel includes: a first substrate; a plurality of thin film transistors formed on the first substrate; a driving unit is formed on the first substrate, and respectively connected to the gates of the thin film transistors via a plurality of first conductive traces; a second substrate disposed face to face with the first substrate; a common electrode layer, Formed on the second substrate; a power management unit outputs at least a first voltage, a second voltage, and a third voltage, wherein the first voltage is used as the first driving unit to control the conduction of the thin film transistors The second voltage is used as the first driving unit to control the closing of the thin film transistors, the third voltage is supplied to the common electrode layer as a reference voltage of the display panel, and a short detecting unit is A substrate and the second substrate are electrically connected to each other to detect a current between the first substrate and the second substrate, and output a control signal.

In an embodiment, the display panel may further include a second driving unit, and respectively connect the drains of the thin film transistors via a plurality of second conductive traces (data lines).

In an embodiment, the short detection unit detects that the current can be between 5 mA and 300 mA.

In an embodiment, the first voltage and the second voltage are directly provided to the first driving unit, and the control signal enables the power management unit to have the ability to cut off the output voltage.

In an embodiment, the voltage difference between the first voltage and the second voltage may be greater than 20V.

In an embodiment, the display panel may further include a one-position shifter, Receiving the first voltage and the second voltage, and outputting a fourth voltage and a fifth voltage to be supplied to the first driving unit; wherein a voltage difference between the fourth voltage and the fifth voltage is greater than the first The voltage is different from the voltage of the second voltage. The control signal can cause the power management unit or the level shifter to have the ability to cut off the output voltage.

In an embodiment, the voltage difference between the fourth voltage and the fifth voltage may be greater than 20V, and the voltage difference between the first voltage and the second voltage may be less than 3.5V.

10‧‧‧ display device

20/100/200/300‧‧‧ display panel

110‧‧‧First substrate

116‧‧‧First conductive trace

118‧‧‧Second conductive trace

112‧‧‧film transistor

120‧‧‧second substrate

122‧‧‧Common electrode layer

132‧‧‧pixel electrode

130‧‧‧Scan Drive Unit

140‧‧‧Data Drive Unit

150‧‧‧Power Management Unit

160‧‧‧Short-circuit detection unit

162‧‧‧ Current sensor

164‧‧‧Comparative decision circuit

166‧‧‧Voltage Operational Amplifier

170‧‧‧ spacers

180‧‧‧LCD

190‧‧‧ position shifter

FIG. 1 is a schematic circuit diagram of a display panel according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention.

FIG. 3 is a schematic circuit diagram of a display panel according to another embodiment of the present invention.

FIG. 4 is a schematic circuit diagram of a display panel according to another embodiment of the present invention.

FIG. 5 is a schematic circuit diagram of the short circuit detecting unit of the embodiment.

FIG. 6 is a schematic structural view of a display device according to an embodiment of the present invention, the display device including a display panel according to the foregoing embodiment.

In order to further understand and understand the features, objects and functions of the present invention, the embodiments of the present invention are described in detail with reference to the drawings. In all of the specification and the drawings, the same component numbers will be used to designate the same or similar components.

In the description of the various embodiments, when an element is described as "above/on" or "below/under" another element, it is meant to be directly or indirectly above or below the other element. , which may contain other elements set in between; the so-called "directly" means that no other intermediary elements are set in between. The descriptions of "Upper/Upper" or "Bottom/Lower" are based on the schema, but also include other possible direction changes. The so-called "first", "second", and "third" are used to describe different elements that are not limited by such predicates. For the convenience and clarity of the description, the thickness or size of each element in the drawings is expressed in an exaggerated or omitted or schematic manner, and the size of each element is not completely the actual size.

1 is a schematic circuit diagram of a display panel 100 according to an embodiment of the present invention, and FIG. 2 is a schematic cross-sectional structural view of the display panel 100. The display panel 100 includes a first substrate 110, a second substrate 120, a scan driving unit 130, and a data drive. The driving unit 140, a power management unit 150, and a short circuit detecting unit 160; wherein a plurality of thin film transistors 112 and a plurality of first conductive traces 116 as scanning lines are formed on the upper surface of the first substrate 110. And a plurality of second conductive traces 118 as a data line. The upper surface of the second substrate 120 is formed with a common electrode layer 122 as a reference potential of the display panel 100. The power management unit 150 is configured to provide the display. The panel 100 is configured to operate various DC voltages, and the short-circuit detecting unit 160 is electrically connected to the first substrate 110 and the second substrate 120 for detecting between the first substrate 110 and the second substrate 120. Is there a short circuit with a small current value, for example, a short circuit current of more than 5 mA and less than 300 mA.

The first substrate 110 and the second substrate 120 are disposed face to face, and a plurality of spacers 170 are disposed between the substrates 110 and 120 for between the first substrate 110 and the second substrate 120. The gap can be maintained at a fixed pitch, and the liquid crystal 180 can be filled therein. The first substrate 110 is configured to carry the thin film transistors 112, the first conductive traces 116, the second conductive traces 118, the plurality of pixel electrodes 132, and the scan driving unit 130; The circuit of the scan driving unit 130 is simultaneously fabricated on the thin film transistor substrate by the same semiconductor device process as the thin film transistors 112 and the conductive traces 116/118, so this is also called It is the Gate Driver On Panel (GOP) on the panel. In addition, the second substrate 120 is configured to carry the common electrode layer 122 and a color filter (not shown). The first substrate 110 and the second substrate 120 may be flexible or rigid transparent substrates. In this embodiment, the first substrate 110 and the second substrate 120 are both glass substrates, and the thin film transistors 112 are formed on the first substrate 110, and the second substrate 120 is provided with a color filter. In the process technology of the display panel, the first substrate 110 may be referred to as a thin film transistor (TFT) substrate, and the second substrate 120 may be referred to as a color filter (CF) substrate.

The pixels of the display panel 100 are disposed on the first substrate 110 in a matrix form. For a color display, one pixel may include one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel. As shown in FIG. 1 , the first conductive traces 116 are horizontally arranged scan signal lines for transmitting scan signals sequentially scanned by the scan driving unit 130 for each of the first conductive traces 116; The second conductive traces 118 are longitudinally arranged data signal lines for transmitting the pixel data signals output by the data driving unit 140. The data driving unit 140 outputs a voltage corresponding to the pixel data to drive the first Two conductive traces 118; the data driving unit 140 can correspond to the second driving unit described in the patent application scope of the present application. . A so-called pixel can be defined at the intersection of each of the first conductive traces 116 and each of the second conductive traces 118. The gate of each thin film transistor 112 is connected to a first conductive trace (or scan line) 116, and the drain is connected to a second conductive trace (or data line) 118, by scanning signals, data signals, and the pixel The electrode 132 determines whether the pixel is on or off (On/Off). Therefore, as shown in FIG. 1, the equivalent circuit of each pixel includes a thin film transistor 112 and a parallel plate capacitor, the upper half of the parallel plate capacitor is the pixel electrode 132, and the lower half is the common electrode. A layer 122 is connected to the common voltage V _{COM of} the display panel 100.

Since the present embodiment is applied to a gate driver (GOP) technology on a panel, the circuit of the scan driving unit 130 is directly fabricated on the first substrate 110 instead of forming an integrated circuit of a scan driver (IC). The wafer is then adhered to the circuit board of the display panel 100. The scan driving unit 130 can correspond to the first driving unit described in the patent application scope of the present application. As shown in FIG. 1 , the scan driving unit 130 respectively connects the gates of the thin film transistors 112 via the first conductive traces 116, and turns on the active switching elements by a high logic level DC voltage signal. (ie, the thin film transistor 112) and the active switching element is turned off by a low logic level DC voltage signal. Since the DC voltage signal is used to drive the gates of the thin film transistors 112, in the display panel technology, the high logic level DC voltage signal is also called the gate high level voltage (V _{gate- High} (V _{GH for} short), the DC voltage signal of the low logic level is also called the gate low level voltage (V _gate-low , referred to as V _GL ).

The power management unit 150 has an input voltage V _CC and outputs various DC voltages required for operation of the display panel 100, for example, a gate high level voltage V _GH (which may correspond to the first voltage described in the patent application) a gate low level voltage V _GL (which may correspond to a second voltage as described in the patent application) and a timing controller (T-CON) supply voltage V _DD to generate the display panel 100 a timing signal, a Gamma voltage V _gamma required to control the liquid crystal deflection, a common electrode supplied to the color filter substrate as a common voltage V _{COM of the} reference potential of the display panel 100 (which may correspond to the third voltage described in the patent application scope) )Wait. The power management unit 150 can have an over temperature protection function to avoid itself being exposed to excessive operating temperatures (eg, wafer junction temperatures greater than 150 ° C). In this embodiment, the power management unit 150 further includes a disabling control terminal that receives control signals from an overcurrent or/and overvoltage protector (not shown) or the short detection unit 160. If the control signal is logic 1 (or high logic level), the power management unit 150 will have the ability to cut off the output voltage; and if the control signal is logic 0 (or low logic level), then The power management unit 150 maintains its operation of outputting various DC voltages. The above-mentioned overcurrent or/and overvoltage protection refers to the DC voltage outputted by the power management unit 150 (for example, the gate high level voltage V _GH , the gate low level voltage V _GL , and the timing control chip supply voltage V). _DD , Gamma voltage V _gamma , common voltage V _COM, etc.) excessive current (eg, greater than 300 mA) or voltage (eg, less than 80% of its preset voltage or rating voltage, or greater than its preset voltage) At 115%), the overcurrent or/and overvoltage protector will send a high logic level control signal to disable the power management unit 150.

However, the above-described overcurrent/voltage protection mechanism is limited to a large current exceeding 300 mA or a large voltage exceeding a preset value of 115%, and a small short-circuit current (for example, less than) between the color filter substrate and the thin film transistor substrate. 300 mA), it is not effective to provide an appropriate protection mechanism when it appears. Therefore, in the embodiment, the short circuit detecting unit 160 can be used to detect whether a short circuit between the first substrate 110 and the second substrate 120 has a small current value, for example, between 5 mA and 300 mA. Short circuit current. When such a short circuit current is between the first substrate 110 and the second substrate 120, the short circuit detecting unit 160 will send a high logic level control signal, thereby causing the power management unit 150 to be disabled or have a cutoff. The ability to output a voltage prevents the small current value short-circuit current described above from continuously flowing in the display panel 100 to damage the pixel of the portion.

In this embodiment, since the scan driving unit 130 is fabricated on the thin film transistor substrate (the first substrate 110) by using a GOP (gate driver on the panel) technology, it requires a gate voltage difference exceeding 20V. The extremely high level voltage V _GH and the gate low level voltage V _GL can properly turn on or off the thin film transistors 112. For example, the power management unit 150 can directly provide a gate high level voltage V _GH greater than 15V and a gate low level voltage V _GL less than -5V to the scan driving unit 130 to drive the thin film transistors 112. Use. When a small-value short-circuit current between 5 mA and 300 mA occurs between the thin film transistor substrate and the color filter substrate, the short-circuit detecting unit 160 sends a high logic level control signal to enable the power management. The unit 150 stops outputting the gate high level voltage V _GH and the gate low level voltage V _GL , and even the remaining DC voltage required for operation of the display panel 100.

FIG. 3 is a schematic circuit diagram of a display panel 200 according to another embodiment of the present invention. The display panel 200 further includes a bit shifter 190 and the power management unit 150 can only provide a gate height of less than 3.5V. The other parts are similar to the embodiment of the display panel 100 in FIG. 2 except for the level voltage V _GH1 and the gate low level voltage V _GL1 . The related description will not be repeated here, please refer to the foregoing. Since the scan driving unit 130 is fabricated by using the GOP technology, it requires a gate high level voltage V _GH and a gate low level voltage V _GL exceeding a voltage difference of 20V to properly turn on or off the thin film transistors 112. . Therefore, the embodiment increases the level shifter 190, which receives the gate high level voltage V _GH1 and the gate low level voltage V _GL1 provided by the power management unit 150, for example, V _GH1 is 3.3V and V _GL1 is 0V, and the offset voltage level is outputted to respectively output a gate high level voltage V _{GH2 of} 24V and a gate low level voltage V _{GL2 of} -15V to the scan driving unit 130 to drive the films. Used for the transistor 112. When a small-value short-circuit current between 5 mA and 300 mA occurs between the thin film transistor substrate and the color filter substrate, the short-circuit detecting unit 160 sends a high logic level control signal to enable the power management. The unit 150 stops outputting the gate high level voltage V _GH2 and the gate low level voltage V _GL2 , and even the remaining DC voltage required for the operation of the display panel 200.

FIG. 4 is a schematic circuit diagram of a display panel 300 according to another embodiment of the present invention. The display panel 300 further includes a bit shifter 190 and the power management unit 150 can only provide a gate height of less than 3.5V. The other parts are similar to the embodiment of the display panel 100 in FIG. 2 except for the level voltage V _GH1 and the gate low level voltage V _GL1 . The related description will not be repeated here, please refer to the foregoing. Since the scan driving unit 130 is fabricated by using the GOP technology, it requires a gate high level voltage V _GH and a gate low level voltage V _GL exceeding a voltage difference of 20V to properly turn on or off the thin film transistors 112. . Therefore, the embodiment increases the level shifter 190, which receives the gate high level voltage V _GH1 and the gate low level voltage V _GL1 provided by the power management unit 150, for example, V _GH1 is 3.3V and V _GL1 is 0V, and the offset voltage level is outputted to respectively output a gate high level voltage V _{GH2 of} 24V and a gate low level voltage V _{GL2 of} -15V to the scan driving unit 130 to drive the films. Used for the transistor 112. In addition, the level shifter 190 includes a disable control terminal that receives a control signal from the short circuit detection unit 160. If the control signal is a logic 1 (or a high logic level), the level will be made. The offset 190 is disabled or has the ability to cut off the output voltage and its output state is a high impedance; and if the control signal is a logic 0 (or low logic level), the level shifter 190 maintains its Outputs the operation of DC voltages V _GH2 and V _GL2 . When a small-value short-circuit current between 5 mA and 300 mA occurs between the thin film transistor substrate and the color filter substrate, the short-circuit detecting unit 160 will send a high logic level control signal to make the level The shifter 190 stops outputting the gate high level voltage V _GH2 and the gate low level voltage V _GL2 .

The short-circuit detecting unit 160 is configured to detect whether a short-circuit current flows between the thin film transistor substrate and the color filter substrate. FIG. 5 is a schematic circuit diagram of the short-circuit detecting unit 160 of the embodiment. The short circuit detecting unit 160 includes a current sensor 162 and a comparison determining circuit 164. The current sensor 162 can be composed of a resistor, and one end thereof is connected to the common electrode of the color filter substrate, and the other end is connected to the V _COM voltage output terminal of the power management unit 150 or via a voltage operational amplifier (Voltage Operational Amplifier) 166. And connected to the V _COM voltage output of the power management unit 150, as shown in FIG. The comparison decision circuit 164 can be a Schmitt trigger that accepts the induced voltage difference across the current sensor 162 and compares it with a reference voltage value when the thin film transistor substrate and the color filter When a short-circuit current between 5 mA and 300 mA occurs between the substrates, the comparison determining circuit 164 sends a control signal of a high logic level, thereby causing the power management unit 150 or the level shifter 190 to be cut off. Its output voltage or the ability to lose output voltage.

FIG. 6 is a schematic view showing the structure of a display device 10 according to an embodiment of the present invention. The display device 10 includes a display panel 20 according to the foregoing embodiment. The display device 10 may be a computer device including a display panel as a screen, a mobile phone, a tablet computer, or a digital photo frame, etc., but the invention is not limited thereto. The display panel 20 may be a liquid crystal panel, and the arrangement of the liquid crystal molecules may be affected by an external voltage or an electric field to cause a change in the polarization of the light to achieve display of the image.

The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto. It is to be understood that the scope of the present invention is not limited by the spirit and scope of the present invention, and should be considered as a further embodiment of the present invention.

100‧‧‧ display panel

110‧‧‧First substrate

116‧‧‧First conductive trace

118‧‧‧Second conductive trace

112‧‧‧film transistor

122‧‧‧Common electrode layer

132‧‧‧pixel electrode

130‧‧‧Scan Drive Unit

140‧‧‧Data Drive Unit

150‧‧‧Power Management Unit

160‧‧‧Short-circuit detection unit

Claims (9)

A display panel includes: a first substrate; a plurality of thin film transistors formed on the first substrate; a first driving unit formed on the first substrate and via a plurality of first conductive traces Connecting the gates of the thin film transistors respectively; a second substrate is disposed face to face with the first substrate; a common electrode layer is formed on the second substrate; and a power management unit outputs at least a first voltage, a second voltage, and a third voltage, the first voltage is used as the first driving unit to control the conduction of the thin film transistors, and the second voltage is used as the first driving unit to control the closing of the thin film transistors. The third voltage is supplied to the common electrode layer as a reference voltage of the display panel; and a short circuit detecting unit is electrically connected to the first substrate and the second substrate to detect the first substrate and the second The current between the substrates is between 5 mA and 300 mA and outputs a control signal. The display panel of claim 1, further comprising a second driving unit, and respectively connecting the drains of the thin film transistors via the plurality of second conductive traces. The display panel of claim 1, wherein the first voltage and the second voltage are directly provided to the first driving unit, and the control signal causes the power management unit to have the ability to cut off the output voltage. The display panel of claim 3, wherein a voltage difference between the first voltage and the second voltage is greater than 20V. The display panel of claim 1, further comprising a quasi-offset that receives the first voltage and the second voltage, and outputs a fourth voltage and a fifth voltage to provide the And a first driving unit; wherein a voltage difference between the fourth voltage and the fifth voltage is greater than a voltage difference between the first voltage and the second voltage. The display panel of claim 5, wherein the control signal is The power management unit has the ability to cut off the output voltage. The display panel of claim 5, wherein the control signal causes the level shifter to have the ability to cut off the output voltage. The display panel of claim 5, wherein a voltage difference between the fourth voltage and the fifth voltage is greater than 20V, and a voltage difference between the first voltage and the second voltage is less than 3.5V. A display device includes a display panel, the display panel includes: a first substrate; a plurality of thin film transistors formed on the first substrate; a first driving unit formed on the first substrate and via a plurality of first conductive traces respectively connected to the gates of the thin film transistors; a second substrate disposed face to face with the first substrate; a common electrode layer formed on the second substrate; a power management unit, Outputting at least a first voltage, a second voltage, and a third voltage, the first voltage is used as the first driving unit to control the conduction of the thin film transistors, and the second voltage is used as the first driving unit to control the When the thin film transistor is turned off, the third voltage is supplied to the common electrode layer as a reference voltage of the display panel; and a short circuit detecting unit is electrically connected to the first substrate and the second substrate to detect The current between the first substrate and the second substrate has a value between 5 mA and 300 mA and outputs a control signal.