TWI501302B - Barrier removal method and device - Google Patents

Description

Barrier removal method and device

This invention relates to semiconductor processing methods and apparatus. Specifically, it relates to the selective removal of stress-free copper polishing and barrier layers. More specifically, the process of the present invention can be used to selectively polish the stress-free removal of copper and tantalum/tantalum nitride barrier layers in the fabrication of integrated devices.

Semiconductor devices are formed on a semiconductor wafer through a series of different processing steps to form transistors and interconnects. In order for the transistor termination to be attached to the cymbal, it is desirable to make conductive (e.g., metal) slots, holes, and the like on the dielectric material of the cymbal as part of the device. Slots and holes can transfer electrical signals and energy between transistors, internal circuits, and external circuits.

In forming interconnect elements, semiconductor dies may require processes such as masking, etching, and deposition to form the transistors and the loops needed to connect the terminals of the transistors. In particular, multilayer masking, ion implantation, annealing, plasma etching, and physical and chemical vapor deposition processes can be used for wells, gates, and polysilicon lines and interconnect new structures in shallow trenches and transistors.

A metal film deposited on a non-recessed region of the dielectric material on the semiconductor wafer is removed, and conventional methods include chemical mechanical polishing (CMP). Chemical mechanical polishing is widely used in the semiconductor industry to polish and planarize trenches and metal layers in holes formed in non-recessed regions of dielectric material to form interconnect lines. The ruthenium processed in the CMP is placed on a flat polishing pad. The dielectric substrate of the processed ruthenium contains one or more layers of interconnecting elements or other functional layers, and then the ruthenium is pressed against the polishing pad by pressure. The polishing pad and the cymbal are moved toward each other as the surface of the cymbal is polished by the applied pressure. The addition of a liquid, often referred to as an abrasive, to the polishing pad facilitates polishing. The typical composition of the abrasive contains an abrasive which selectively chemically removes the portion to be polished. For example, it can polish only the metal layer without affecting the dielectric layer.

Due to the strong mechanical forces involved, the CMP process can have some deleterious effects on the semiconductor structure. For example, when the size of the interconnect is reduced to 0.13 micrometers and below, the conductive material is greatly different due to the mechanical properties of the copper and low-k dielectric materials. The value of the Young's modulus of the low-k dielectric material differs from the value of the Young's modulus of the copper and barrier material by more than 10 times. The relatively strong mechanical forces in the CMP may cause permanent damage to the low-k dielectric material.

Another method of removing a metal film deposited on a non-recessed region of a semiconductor dielectric material is electrochemical polishing. Electrochemical copper polishing systems achieve copper removal very evenly and have a high selectivity to barrier tantalum/tantalum nitride materials. This is a mechanical stress-free polishing method, but the barrier layer cannot be removed by electropolishing due to the formation of an oxide passivation layer on its surface.

One method of removing tantalum and tantalum nitride is wet etching with hydrofluoric acid, but hydrofluoric acid can damage the dielectric layer when the barrier layer is removed.

In addition, Sood et al., "Damp Removal of Sputtered Layer of Strontium Based on NaOH and KOH Solutions", J Mater Sci, 2007, Mater Electron, Vol. 18, pp. 535-539, describes the use of KOH/H ₂ A method of removing ruthenium from an O ₂ or NaOH/H ₂ O ₂ solution. A strong alkaline solution like KOH or NaOH can accelerate the dissolution of ruthenium. However, both NaOH/H ₂ O ₂ and KOH/H ₂ O ₂ etch and damage the copper in the bath to some extent.

The IBM patent reveals a new processing technique that removes barrier materials, such as tantalum, tantalum nitride, titanium, and titanium nitride, by vapor phase etching of germanium difluoride after the copper CMP process.

This invention relates to semiconductor wafer processing methods and apparatus. The semiconductor wafer substrate includes a substrate, a dielectric layer, a barrier layer on the dielectric layer, and a copper metal layer on the barrier layer. More particularly, the present invention relates to a process of stress-free electrochemical polishing of copper, removal of oxides of tantalum or titanium formed during copper polishing, and barrier 钽/tantalum nitride or titanium/nitridation. 1. The removal process of titanium dioxide using a vapor phase etching method.

First, the excess copper film in the electroplated copper is removed by a stress-free polishing method. The present invention replaces the conventional copper chemical mechanical polishing (CMP) method with a stress-free electrochemical polishing method as a basic "metal polishing process" in the latter stage of semiconductor fabrication. This is an electrochemical process: copper on the semiconductor ruthenium as the anode and electrolyte nozzle as the cathode. When a certain voltage is applied between the two poles, the copper can be polished by the electrolyte in contact therewith. When the copper coated on the surface is removed, a surface of the exposed tantalum or titanium forms a highly chemically stable oxide passivation film.

The oxides of niobium or titanium have high chemical stability. It acts as a protective layer for the barrier material during the stress-free polishing of copper, but it also makes the removal of the barrier layer more difficult in subsequent processes. The xenon difluoride gas can effectively etch tantalum/niobium nitride and titanium/titanium nitride, but the etching rate for tantalum oxide or titanium oxide is very slow. In order to remove the barrier layer more effectively and avoid the barrier effect caused by yttrium oxide or titanium oxide, the present invention first blocks the yttrium oxide gas before removing yttrium/niobium nitride or titanium/titanium nitride with an etchant. The ruthenium oxide or titanium oxide on the surface of the layer is removed. A variety of etchants can be used to remove cerium oxide or titanium oxide, such as hydrofluoric acid, buffered hydrofluoric acid, sodium hydroxide solution, potassium hydroxide solution, oxalic acid, and citric acid. In addition to the above examples of etchants, CF ₄ /O ₂ plasma and argon sputtering can also be used to remove yttrium oxide or titanium oxide from the surface of the barrier layer.

Finally, the barrier layer tantalum/niobium nitride or titanium/titanium nitride is removed by vapor phase etching of germanium difluoride. The present invention replaces conventional tantalum/niobium nitride or titanium/titanium nitride chemical mechanical polishing with a vapor phase etching of germanium difluoride as a basic barrier removal process. None of the above processes have mechanical forces, so there is no mechanical damage to the low-k material and device structure.

Further advantages of the invention will be apparent from the following detailed description and the accompanying drawings.

The present invention relates to a semiconductor device processing method and apparatus. More specifically, the invention relates to the removal or etching of a barrier layer such as tantalum/niobium nitride which is suitable for low k dielectric materials. This facilitates various applications of low-k materials in semiconductor devices.

Figure 1 to Figure 4 show the combination of some new processes in semiconductor processing: copper removal by stress-free polishing, and removal of copper during etching by etchant The oxide of ruthenium formed on the surface of the barrier layer is removed by a selective ruthenium difluoride gas etch to remove the barrier ruthenium/tantalum nitride. Among them, whether electrochemical copper or copper oxide is removed, or the antimony difluoride etch barrier is a process without mechanical force. This set of processes therefore minimizes mechanical damage to the semiconductor structure, minimizes the cerium oxide coverage, minimizes chemical modification of the semiconductor structure, and minimizes loss of low-k dielectric material.

Figure 1 is a schematic representation of the damascene structure of copper. The semiconductor structure includes a dielectric layer, typically a low-k dielectric layer 102 formed on a wafer substrate or a front processed semiconductor device structure 101. According to a specific example, the dielectric constant of a low-k dielectric is generally greater than 1.2 and less than 4.2. The structure further includes a barrier layer 103 over the low-k dielectric layer 102, typically tantalum/tantalum nitride or other materials. The structure includes a pattern of grooves and holes that are separated by dielectric layer 102. The metal or copper film 104 structure on the barrier layer 103 is formed by filling recessed regions of the dielectric layer. However, while the recessed regions are filled, the dielectric layers of the non-recessed regions are also covered. The morphology of the copper or metal layer 104 plated on the barrier layer 103 and dielectric layer 102 can be very flat using the following method. Patent PCT/US03/11417 describes a method for the use of dummy structures during electroplating. Alternatively, the surface of the copper or metal layer can be planarized by a contact pad nozzle using the method described in U.S. Patent No. 60/738,250.

The metal layer 204 is subjected to stress-free polishing (step 502 in Fig. 5), and Fig. 2 is a cross-sectional view of the structure after the wafer is electropolished. The metal or copper layer 204 is polished to the surface of the non-recessed area. Therefore, the metal, the groove, and the holes filled in the recessed area are separated from each other. The past The process is an electrochemical process: copper on the ruthenium plate serves as the anode and the electrolyte nozzle is the cathode. When a certain positive voltage is applied between the two poles, the copper is dissolved by the electrolyte. This process is a selective stress-free copper removal process. An oxide film 205 is formed on the surface of the barrier layer/cerium nitride 203 to be passivated. The passivation film can function to protect the barrier layer during the polishing of copper, but the yttrium oxide film 205 formed on the barrier layer 203 makes subsequent barrier removal more difficult.

The ruthenium oxide film 205 formed on the surface of the barrier layer is composed of two parts: a part is caused by natural oxidation of ruthenium in the air. When the ruthenium is in the air, various compounds can be formed depending on the valence, including TaO, Ta ₂ O, TaO ₂ , Ta ₂ O ₅ and Ta ₂ O ₇ . However, only Ta ₂ O ₅ is the most stable when water is present.

The other part, and a more important part, is caused by anodizing during the stress-free polishing of copper. After the ruthenium is exposed during the polishing of copper, the electrode reaction on the surface can be described as follows: 2Ta+5H ₂ O=Ta ₂ O ₅ +10H ⁺ +10e ^- After the copper polishing is completed due to the presence of water in the electrolyte, The oxide on the surface of the crucible is mainly pentavalent antimony oxide, namely antimony pentoxide. Antimony pentoxide has high chemical stability and acts as a protective layer for the barrier during copper polishing. But it makes subsequent barrier removal more difficult. The xenon difluoride gas can etch away the tantalum and tantalum nitride 203 at a suitable rate, but the tantalum oxide 205 can hardly be etched and can not be etched at all even under certain conditions. Therefore it can prevent bismuth and tantalum nitride from being removed. A long time bismuth difluoride etch can remove some of the tantalum and tantalum nitride, but only cause pinhole effects. As shown in FIG. 7, after copper is subjected to stress-free polishing, a photograph of a scanning electron microscope after ruthenium/tantalum nitride is etched for a long time with a ruthenium difluoride gas without being removed by the ruthenium oxide film 205. It can be seen that after a certain time, except for the tantalum/tantalum nitride portion around the pinhole, the remaining barrier layer 203 is not etched at all. In order to remove the barrier layer more effectively, the oxide layer 205 of tantalum must first be removed.

Thus, the second step in Figure 5 is to remove the oxide layer of germanium (step 504). The following are a few examples for the purpose of illustrating the method, and the invention is not limited thereto.

The first method of removing the tantalum oxide layer is to treat the surface of the tantalum sheet with a solution containing F-ion, wherein hydrofluoric acid (HF) and hydrofluoric acid buffer solution (BHF) are better. HF/BHF can react with yttrium oxide. The chemical reaction equation is exemplified by bismuth pentoxide. It can be expressed as follows: Ta ₂ O ₅ +14F ^- +10 H ⁺ =2TaF ₇ ^2- +5H ₂ O HF/BHF concentration can be From 0.1w% to 30w%, and the concentration is preferably between 0.5% and -4%. The temperature of the solution at the time of treatment is from 0 ° C to 50 ° C, and room temperature is better. The length of the treatment time is related to the temperature and the concentration of the solution. This solution can etch the hafnium oxide film 205 and a portion of the antimony barrier layer 203 and have no effect on the copper film 204. However, if the etching time is too long or the concentration of the solution is too high, the barrier 钽/tantalum nitride will also be removed. As shown in Figure 8, the tantalum/tantalum nitride sidewalls around the block structure have been at least partially destroyed. Thus the low k dielectric layer 202 will also be damaged by the solution. Figure 9 shows an example of the correct treatment of the tantalum oxide layer 205 after the copper 204 is polished. As can be seen from comparison with Figures 7 and 8, the barrier enthalpy/tantalum nitride removal effect is very good.

A solution containing F- ions is not limited to a solution containing HF and BHF F ^-., PH of less than 7 and no damage to copper may be used as a tantalum oxide film 205 of etchant. For example, a solution of NH ₄ F containing sulfuric acid or hydrochloric acid. And the addition of other acids to the solution can make the removal of cerium oxide more efficient because of the lower pH. The removal effect of the ruthenium oxide film 205 can be controlled by adjusting the F ^- concentration and pH.

A second method of removing the hafnium oxide film is to use a strong alkali solution as an etchant. The cerium oxide film 205 can be dissolved in a strong alkali solution because a mineral acid of cerium can be formed in the alkali solution. In the case of the present invention is citric acid (H ₂ Ta ₂ O ₆ ). Bismuth pentoxide can accelerate dissolution in high pH solutions or high temperature solutions. For example, the potassium hydroxide solution has a pH of greater than 10 in a saturated solution at room temperature, a concentration of from 0.1% to 50%, and more preferably from 10% to 40%. The temperature is from 0 ° C to 90 ° C, and more preferably from 40 ° C to 80 ° C. The etch rate selection ratio of the strong alkali solution to the yttrium oxide film 205 and the copper film 204 is also high.

A third method of removing the hafnium oxide film 205 is to use an etching gas mixture comprising about 300 sccm to 400 sccm of CF ₄ and about 200 sccm to 600 sccm of oxygen, at a temperature of from about 100 ° C to 150 ° C, and a pressure of from 1 torr to 1.5 torr. The contact of the etching gas with the oxide layer of the crucible is carried out in the form of a plasma. Plasma can be used by reactive ion etching (RIE) or electron cyclotron resonance (ECR) plasma generators, RIE and ECR are widely used commercially, and parallel plate RIE is better. The oxide layer removed by etching gas is isotropic and has good uniformity.

A fourth method of removing the hafnium oxide film 205 is by gas sputtering bombardment. For example, argon sputtering is like a reverse process of thin film deposition, relying on high speed. The particles gradually peel off the surface cerium oxide. The rare gas for sputtering is one or more selected from the group consisting of helium, neon, argon, helium and neon, of which argon is more preferred. Sputtering equipment is currently widely used commercially.

A fifth method of removing the hafnium oxide film 205 is to use oxalic acid or citric acid as an etchant. The oxalic acid or citric acid solution removes at least a portion of the yttrium oxide thin film layer 205, making the removal of the barrier layer 203 more efficient. The acid concentration is from 0.1% to 10%, and 5% to 8% is more preferred. The etching temperature is from 0 ° C to 80 ° C, and more preferably from 20 ° C to 60 ° C.

All of the above example methods can be used to remove the oxide layer of germanium but HF/BHF is better. As previously mentioned, the examples listed herein are for the purpose of illustrating the process of removing the tantalum oxide film 205 or even the portion of the barrier layer 203 in step 504. As shown in FIG. 3, after the ruthenium oxide film 205 is removed, the barrier layer 303 钽/tantalum nitride and copper layer 304 are exposed.

After the surface of the yttrium oxide film 205 is removed, the xenon difluoride gas removes the remaining barrier layer 303 钽/tantalum nitride on the surface of the ruthenium (step 506 in Fig. 5). The xenon difluoride gas spontaneously reacts with the barrier layer 303 钽/niobium nitride at a certain temperature and pressure. The xenon difluoride gas has good selectivity for copper 404 and dielectric material 402, such as SiO ₂ , SiLK, and Si-COH based low k materials, with k values ranging from 1.2 to 4.2, and more preferably 1.3 to 2.4. No direct mechanical stress is applied to barrier layer 403 or dielectric layer 402 throughout the process, and thus physical damage to copper 404 and low-k dielectric material 402 is not caused. The temperature of the substrate is from 0 ° C to 300 ° C, and more preferably from 25 ° C to 200 ° C. The pressure of the xenon difluoride gas is from 0.1 Torr to 100 Torr, and more preferably 0.5 Torr to 20 Torr.

The product of the reaction of ruthenium difluoride with the barrier layer 303 钽/niobium nitride is gas phase (helium and oxygen) or sublimable (yttrium fluoride) under the process conditions. Therefore, there is no residue on the surface of the cymbal.

As shown in FIG. 4, after the barrier layer on the surface is completely removed by the ruthenium difluoride vapor phase etching method 506, the grooves and holes are electrically completely separated. The metal or copper layer 404, barrier layer 403 are completely isolated by the dielectric material 402.

Figure 6 is a schematic block diagram of the apparatus of the present invention. The apparatus includes a stress free electrochemical copper polishing system (SFP) 602, a tantalum oxide layer removal system 604, and a xenon difluoride vapor phase etching system (ie, a barrier layer etching system) 606. The above subsystems 602-606 correspond to the 502-506 process steps in FIG. 5, respectively.

In a typical example, an electropolishing system consists of an electrolyte nozzle through which the electrolyte is sprayed to different radii of the cymbal. A negative pole of the power supply is connected to the nozzle to provide a negative voltage to the electrolyte via the nozzle. The positive side of the power supply is connected to the cymbal to provide a positive voltage to the cymbal. Thus the nozzle acts as a cathode during the electrochemical polishing process and the crucible acts as the anode. When the electrolyte continuously flows to the metal layer on the ruthenium, the metal layer on the surface of the ruthenium is polished due to the potential difference between the two. Although it is mentioned here that the cymbal is directly connected to the positive pole of the power supply, it should be noted that any number of connectors can be inserted between the positive pole and the cymbal of the power supply. For example, the power supply can be connected to the cymbal clip, which in turn is connected to the cymbal, more specifically to the metal layer on the cymbal. For a more detailed description of the electrochemical polishing system, reference is made to U.S. Patent No. 09/497,894, entitled "Semiconductor Device Interconnect Gold" The polishing method and device of the genus, published on February 4, 2000. The entire patent is hereby incorporated by reference.

In a typical example, the barrier oxide film removal system includes a rotatable cymbal clip to secure the cymbal, wherein rotation refers to driving the cymbal clip to rotate about an axis; and an etchant is sprayed onto the surface of the cymbal Nozzle; a cavity and etchant delivery system. After the stress-free polishing of the copper, the crepe is placed in the crepe clip described above. When the cymbal clip starts to rotate, the etchant is evenly sprayed onto the surface of the cymbal. After a certain period of time, the oxide film of the barrier layer is removed.

A typical example, the ruthenium difluoride etch system of the present invention is similar to the currently commercially available ruthenium microsystem processing (MEMS) system, including: at least one vacuum pump, one etch chamber, one diffusion chamber, one solid Bismuth difluoride source chamber, temperature control system and automatic control system. Each chamber is controlled by a pneumatic throttle valve. There is also a vacuum gauge or a pressure gauge in the diffusion chamber and the etching chamber. The system can operate in both pulse mode and constant current mode. In the constant current mode, the pressure in the etch chamber and the diffusion chamber is kept constant to control the etch rate. In pulse mode, the two chambers are first purged with high purity nitrogen and then evacuated. When the switch of the bismuth difluoride bottle is opened, the gas can be filled into the diffusion chamber. Then, the switch of the bismuth difluoride bottle is closed, and the throttle valve between the diffusion chamber and the etching chamber is opened, and the throttle valve can be closed when the pressure in the etching chamber reaches a certain value. When the ruthenium is contacted with the ruthenium difluoride gas for a certain period of time, such as 3-30 seconds, the etch chamber is evacuated and the by-products of the reaction are discharged into the chamber. This completes a "loop" in pulse mode. And the cycle can be repeated as many times as needed until the barrier layer of the ruthenium sheet is tantalum/nitridium It is removed to expose the dielectric layer. The ruthenium difluoride etch system of the present invention is also unstressed.

Although a large number of specific examples of objects, methods, and applications are mentioned in the description of the present invention, the present invention is not limited thereto.

101, 201, 301, 401‧‧ ‧ semiconductor substrate

102, 202, 302, 402‧‧‧ dielectric layers

103, 203, 303, 403‧‧ ‧ barrier

104, 204, 304, 404‧‧‧ metal layers

205‧‧‧Oxide film

602‧‧‧Unstressed electrochemical polishing system

604‧‧‧Oxidized film removal system

606‧‧‧Block etching system

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic cross-sectional view of an interconnect structure on a semiconductor wafer prior to copper stress free electrochemical polishing.

2 is a schematic cross-sectional view of an interconnect structure on a semiconductor wafer after copper stressless electrochemical polishing. A film of ruthenium oxide or titanium oxide is formed on the surface of the barrier layer during polishing.

Figure 3 is a cross-sectional view of the interconnect structure after the yttrium oxide or titanium oxide film on the semiconductor wafer is removed.

4 is a schematic cross-sectional view of a semiconductor germanium barrier layer of tantalum/niobium nitride or titanium/titanium nitride after vapor phase etching of germanium difluoride.

Figure 5 is an illustration of a process flow diagram in the present invention.

Figure 6 is a diagram showing an example of a block of the apparatus of the present invention.

Figure 7 is a top view of a scanning electron microscope (SEM) of a sample after stress free polishing. The sample was directly etched with germanium difluoride without removing the cerium oxide on the surface of the barrier layer in advance.

Figure 8 is a top view of a scanning electron microscope (SEM) of a sample after stress free polishing. The sample was treated with a strong cerium oxide etchant.

Figure 9 is a top view of a scanning electron microscope (SEM) of a sample after stress-free polishing, which is first removed with yttrium oxide and then with xenon difluoride. The body removes the barrier layer.

201‧‧‧Semiconductor substrate

202‧‧‧ dielectric layer

203‧‧‧Block

204‧‧‧metal layer

205‧‧‧Oxide film

Claims (13)

A method of processing a semiconductor structure, wherein the semiconductor structure comprises a substrate, a dielectric layer, a barrier layer on the dielectric layer, a metal layer on the barrier layer, and the structure has a pattern, and the metal layer is filled in the pattern, the processing method includes the following Several steps: removing the metal layer above the barrier layer by a stress-free electrochemical polishing method; removing the oxide film layer generated on the surface of the barrier layer during the electrochemical polishing process without stress, the oxide film being tantalum or titanium As the oxide film, a buffer solution (BHF) containing hydrofluoric acid (HF) or hydrofluoric acid is used as an etchant; the barrier layer is removed by vapor phase etching of germanium difluoride, and the pattern structure is completely separated. The method of claim 1, wherein the barrier layer is composed of one or more of the following materials: bismuth, titanium monoliths, and compounds thereof with nitrogen or hydrazine. The method of claim 1, wherein at least a portion of the tantalum or titanium oxide film is formed during stress free polishing of the metal on the semiconductor wafer. The method of claim 1, wherein the metal layer is a copper film. The method of claim 1, wherein the dielectric layer material has a dielectric constant greater than 1.2 and less than 4.2. The method of claim 1, wherein the etchant has a concentration ranging from 0.1% to 30% and a temperature ranging from 0 °C to 50 °C. The method of claim 1, wherein the dithizone gas has a pressure in the range of 0.1 Torr to 100 Torr. The method of claim 7, wherein the substrate has a temperature ranging from 0 ° C to 300 ° C. A device for processing a semiconductor structure, wherein the semiconductor structure comprises a substrate, a dielectric layer, a barrier layer on the dielectric layer, a metal layer on the barrier layer, and the structure has a pattern, the metal layer is filled in the pattern, and the device comprises the following parts : a stress-free electrochemical polishing system for removing a metal layer on the barrier layer; a removal system for removing an oxide film generated on the surface of the barrier layer during the stress-free electrochemical polishing process, the oxide film being 钽Or a titanium oxide film, the etchant used in the removal system contains a hydrofluoric acid (HF) or hydrofluoric acid buffer solution (BHF); used to completely separate the pattern structure and remove the barrier layer Bismuth difluoride vapor phase etching system. The device of claim 9, wherein the barrier layer is composed of one or more of the following materials: bismuth, titanium monoliths, and compounds thereof with nitrogen or hydrazine. The device of claim 9, wherein the etchant has a concentration ranging from 0.1% to 30% and a temperature ranging from 0 °C to 50 °C. The apparatus of claim 9, wherein the ruthenium difluoride vapor phase etching system uses ruthenium difluoride gas to remove ruthenium/niobium nitride or titanium/titanium nitride, and ruthenium difluoride gas. The pressure ranges from 0.1 Torr to 100 Torr. The device of claim 12, wherein the substrate has a temperature in the range of 0 ° C to 300 ° C.