TWI452719B - Iii-n semiconductor nanostructure and nano-light emitting diode thereof - Google Patents

Description

Three-n-nitrogen semiconductor nanostructures and their light-emitting diodes

The present invention relates to a tri-n-nitrogen semiconductor nanostructure and a light-emitting diode thereof, particularly to a tri-n-nitrogen semiconductor nanostructure and a light-emitting diode having a nanorod structure.

At present, the tri-nitrogen semiconductor nanocolum [line] and its composite materials can be applied to various electronic components, for example, a tri-n-nitrogen semiconductor nano-light emitting diode. In general, the molecular beam epitaxy (MBE) technique can be used to form a tri-n-nitrogen semiconductor nanocolum [line] on a substrate. Regarding the molecular beam epitaxy technology, it is also disclosed in the technical content of many national patents. For example, U.S. Patent No. 6,387,781, METHOD OF FORMING THREE-DIMENSIONAL SEMICONDUCTORS STRUCTURES, discloses a method of forming a three-dimensional semiconductor structure. This U.S. patent is only a reference to the technical background of the present invention and the state of the art is not intended to limit the scope of the present invention.

Regarding the tri-n-cell semiconductor nano-light emitting diode, it is also disclosed in the technical content of many domestic patents. For example, the technique of the related tri-n-semiconductor nano-luminescence diode is disclosed in the Republic of China Patent Publication No. 200731563, the Republic of China Patent Publication No. 200420492, and the Republic of China Patent Publication No. 595015. The foregoing China Patent is only a reference to the technical background of the present invention and the state of the art is not intended to limit the scope of the present invention.

At present, the semiconductor process generally applies resist etch back (REB) technology, which deposits cerium oxide [SiO ₂ ] on a wafer to form a thin film [thin layer]; An anisotropic etch technique etches the cerium oxide film to a predetermined thickness. In fact, the traditional tri-n-nitrogen semiconductor nanowire [line] process also chose to use photoresist etchback technology, which deposits a SiO ₂ layer on a substrate and then uses anisotropic An etching process etches the cerium oxide layer to a predetermined thickness. However, the anisotropic etching process additionally requires multiple repetitions of the mask and etching process steps, and the vacuum operation must be interrupted, thereby having the disadvantage of poor process efficiency.

In view of this, the tri-n-nitrogen semiconductor nanocolumn [line] process will have to abandon the original photoresist etchback technology method, and adopt other process methods to improve the shortcomings of poor process efficiency. In addition, the current semiconductor process also uses spin-on-glass or spin-on-glass (SOG Coating) technology to form a ruthenium dioxide film, that is, to form an insulating layer. Rotating coated glass technology is a major localized planarization technique in semiconductor processes with good trench filling properties. The spin-on-glass technology utilizes a spin coating method to uniformly apply a liquid solvent containing a dielectric material on the surface of the wafer to fill the holes in which the dielectric layer is recessed; then, a heat treatment step is performed to remove the solvent; Only the dielectric material of the near-cerium oxide after curing remains on the surface of the wafer.

In view of the above, in order to improve the above disadvantages, the present invention provides a tri-n-nitrogen semiconductor nanostructure and a light-emitting diode thereof, the tri-n-nitrogen semiconductor nanostructure comprising a substrate, a plurality of nano-pillars and an insulation a layer which is directly formed by a spin-on glass method, which can be directly formed under a vacuum environment, that is, it does not need to interrupt the vacuum operation, thereby improving the process efficiency; and the insulating layer can be surely filled in the formation Between the nano columns, to strengthen the overall structure of the nano column.

The main object of the present invention is to provide a tri-n-nitrogen semiconductor nanostructure and a light-emitting diode thereof, the tri-n-nitrogen semiconductor nanostructure comprising a substrate, a plurality of nano columns and an insulation The layer is directly formed between the nano-pillars by a spin-on glass method to achieve the purpose of improving process efficiency.

Another object of the present invention is to provide a tri-n-nitrogen semiconductor nanostructure and a light-emitting diode thereof, the tri-n-nitrogen semiconductor nanostructure comprising a substrate, a plurality of nano-pillars and an insulating layer, the insulating layer The method is formed by a spin-on glass method, and the insulating layer is filled in between the nano columns to achieve the purpose of strengthening the overall structure.

In order to achieve the above object, the trivalent-nitrogen semiconductor nanostructure of the present invention comprises a substrate, a plurality of nano-pillars and an insulating layer. The substrate has a first surface, the nano column is grown on the first surface of the substrate, and the insulating layer is formed on the first surface of the substrate by a spin-on glass method, and the insulating layer is filled in and formed. Between the nanopillars, an insulating portion is formed between the nanopillars.

In a preferred embodiment of the invention, the nanocolumn is formed on the first surface of the substrate by molecular beam epitaxy.

In a preferred embodiment of the invention, the nanocolum is grown vertically on the first surface of the substrate.

In a preferred embodiment of the invention, the nanocolumn has an indium gallium nitride/gallium nitride double heterostructure.

In a preferred embodiment of the invention, the diameter of the nanocolumn is between 10 nm and 1 μm.

In a preferred embodiment of the invention, the height of the nanocolumn is less than 10 [mu]m.

In a preferred embodiment of the invention, the top surface of the nanocolumn can be formed into one of a flat surface, a beveled surface, a tapered shape and a crown shape.

In a preferred embodiment of the invention, the insulating layer is made of a SOG-600 material.

A preferred embodiment of the invention is a structure of the nanocolumn forming a trivalent-nitrogen semiconductor nanoluminescent dipole.

A preferred embodiment of the invention has a nanocolumn density of between 10 ⁶ cm ^-2 and 10 ¹¹ cm ^-2 .

In order to fully understand the present invention, the preferred embodiments of the present invention are described in detail below and are not intended to limit the invention.

The tri-n-nitrogen semiconductor nanostructure of the preferred embodiment of the present invention can be applied to the field of optoelectronic related technology, and is exemplified herein for the manufacture of the tri-n-nitrogen semiconductor nano-light emitting diode of the preferred embodiment of the present invention, which is not It is used to define the application range of the tri-n-nitrogen semiconductor nanostructure of the present invention.

Fig. 1 is a view showing the structure of a tri-n-nitrogen semiconductor nanostructure according to a first preferred embodiment of the present invention. Referring to FIG. 1, the tri-n-nitrogen semiconductor nanostructure of the first preferred embodiment of the present invention comprises a substrate 10, a plurality of nano-pillars 11 and an insulating layer 12. The top of the tri-n-nitrogen semiconductor nanostructure of the first preferred embodiment of the present invention preferably has a nickel contact layer [thickness about 5 nm] 13a and a gold contact layer [thickness about 50 nm] 13b as p-type nitrogen. An ohmic contact of gallium, which is not intended to define the tri-n-nitrogen semiconductor nanostructure of the present invention; and the bottom and side portions of the tri-n-nitrogen semiconductor nanostructure of the first preferred embodiment of the present invention It is preferred to have an aluminum contact layer 14a and an indium contact layer 14b as ohmic contacts of n-type gallium nitride, which are not intended to define the tri-n-nitrogen semiconductor nanostructure of the present invention.

Referring again to FIG. 1, the substrate 10 is preferably made of tantalum and has a first surface as the growth surface of the nano-pillars 11. The nanocolumn 11 is grown on the first surface of the substrate 10, and the second surface of the substrate 10 constitutes the bottom of the trivalent-nitrogen semiconductor nanostructure of the present invention. The insulating layer 12 is formed on the first surface of the substrate 10, and the insulating layer 12 is filled between the nano-pillars 11 so as to form a boundary between the nano-pillars 11 The edge portion, that is, the insulating layer 12 is overlaid around the nano-pillars 11.

Fig. 1A is a schematic view showing the structure of a single column of a three-nitride-nitride nanostructure of the first preferred embodiment of the present invention. The trivalent-nitrogen semiconductor nanostructure of the present invention is exemplified herein by an indium gallium nitride/gallium nitride double heterostructure to illustrate the nanopillar structure of the present invention, which is not intended to limit the present invention to indium gallium nitride/ The range of the gallium nitride double heterostructure, that is, the nanocolumn structure of the present invention can be selectively applied to the tri-n-nano-column structure of a single material or other composite materials, and details are not described herein. Referring to FIG. 1A, the nano-pillar 11 includes a p-type gallium nitride layer 11a, an indium gallium nitride layer 11b, and an n-type gallium nitride layer 11c. The p-type gallium nitride layer 11a is formed. On the indium gallium nitride layer 11b, the indium gallium nitride layer 11b is formed on the n-type gallium nitride layer 11c to form an indium gallium nitride/gallium nitride double heterostructure of the nano column 11. [double heterostructure]. The structure of the nanocolumn 11 forms the trivalent-nitrogen semiconductor nanoluminescent dipole of the present invention.

Attachment 1 discloses a top electron microscope image of a three-nano-semiconductor nanostructure of the first preferred embodiment of the present invention, which is amplified by a field emission scanning electron microscope by 40,000 times microscopy. image. Referring to FIG. 1A and FIG. 1 , the top of the nano-pillar 11 has a symmetrical shape of a hexagonal shape and a slightly hexagonal star shape, and is substantially the same as a hexagonal star-shaped symmetrical shape of n-type gallium nitride. The nanocolumn 11 is preferably grown on the first surface of the substrate 10 by molecular beam epitaxy. The molecular beam epitaxy method is a preferred embodiment of the present invention and is not intended to limit the present invention. The molecular beam epitaxy method achieves the growth operating condition portion of the nanocolumn 11, such as a metal source, a growth temperature, a nitrogen/gallium flux ratio, and the like, and will not be described herein.

Attachment 2 discloses an electron micrograph of a plurality of nanopillars of a tri-n-nitrogen semiconductor nanostructure according to a first preferred embodiment of the present invention, which is obtained by a field emission scanning electron microscope to magnify 40,000 times of a microscopic image. Please refer to Figure 1 and Attachment 2, in a vacuum environment, The nano-pillar 11 is vertically grown on the first surface of the substrate 10. Referring to FIG. 2 again, the top surface of the nano-pillar 11 can be formed into various shapes including a flat surface, a sloped surface, a tapered shape, a crown shape, and the like.

Referring to FIG. 1A and FIG. 2 again, the nano column 11 of the first preferred embodiment of the present invention has a diameter of less than 500 nm, preferably between 300 nm and 500 nm or between 10 nm and 1 μm. The above specification range is not intended to limit the present invention; the height of the nano-pillar 11 is less than 750 nm or 10 μm, preferably between 600 nm and 750 nm, and the above specification range is not intended to limit the present invention. Referring to FIG. 1A again, the thickness of the p-type gallium nitride layer 11a of the nano-pillar 11 is about 150 nm; and the thickness of the n-type gallium nitride layer 11c of the nano-pillar 11 is about 400 nm or more. The scope of the specification is not intended to limit the invention.

Referring to FIG. 1 again, the insulating layer 12 of the first preferred embodiment of the present invention is formed on the first surface of the substrate 10 by a spin-on glass method, which can be directly formed under a vacuum environment. That is, it does not need to interrupt the vacuum operation, so it can improve the process efficiency and simplify the process. Further, the insulating layer 12 is made of a SOG-600 material, which has an excellent adhesion effect to the substrate of the substrate 10, and has stable storage stability at room temperature. The spin-on glass method is a localized planarization technique which has a good effect for filling the fine gap between the nano-pillars 11, and it can be strengthened when the density of the nano-pillars 11 is low. The structure of the nano column 11.

Fig. 2 is a view showing a microphotoluminescence curve of a tri-n-nitrogen semiconductor nanostructure according to a first preferred embodiment of the present invention in a microphotoluminescence experiment. Please refer to Figure 2 for the microphoton fluorescence experiment using a 325 nm excitation laser at room temperature in a micro-fluorescence [Micro-PL] measurement experiment, which shows nitridation at about 370 nm. The gallium signal, which shows the indium gallium nitride signal at about 475 nm, shows that the tri-n-nitrogen semiconductor nanostructure of the present invention has an indium gallium nitride/gallium nitride double heterostructure.

Fig. 3 is a graph showing the indium/gallium profile of the trivalent-nitrogen semiconductor nanostructure in the energy dispersive analysis experiment of the first preferred embodiment of the present invention. Referring to FIG. 2, in the measurement experiment of the energy dispersive analyzer, the signal of indium and gallium is simultaneously displayed at a position of about 140 nm, which shows that the tri-n-nitrogen semiconductor nanostructure of the present invention has indium gallium nitride/nitrogen. Gallium double heterostructure. The experimental data of the above 2nd and 3rd drawings is for the purpose of easy understanding or reference to the technical content of the present invention, and is not intended to limit the scope of the present invention.

Attachment 3 discloses a luminescence image of a tri-n-nitrogen semiconductor nano-light emitting diode according to a first preferred embodiment of the present invention. Referring to the attached photo 3, in the electroluminescence experiment, the tri-n-cell semiconductor light-emitting diode of the present invention forms a light spot at a suitable voltage, that is, a nano-light emitting diode.

Fig. 4 is a view showing the structure of a tri-n-nitrogen semiconductor nanostructure according to a second preferred embodiment of the present invention. Referring to FIG. 4, the tri-n-nitrogen semiconductor nanostructure of the second preferred embodiment of the present invention comprises a substrate 10 and a plurality of nano-pillars 11. With respect to the first preferred embodiment of the present invention, the tri-n-nitrogen semiconductor nanostructure of the second preferred embodiment of the present invention omits the insulating layer of the first preferred embodiment, and thus has a simplified configuration.

Referring to FIG. 4 again, the substrate 10 is preferably made of tantalum and has a first surface, that is, a growth surface of the nano-pillars 11. The nano column 11 is grown on the first surface of the substrate 10.

Attachment 4 discloses an electron micrograph of a plurality of nanopillars of a tri-n-nitrogen semiconductor nanostructure according to a second preferred embodiment of the present invention, which is obtained by a field emission scanning electron microscope to amplify 40,000 times of microscopy. image. Referring to FIG. 4 and the attached picture 4, the nano-pillar 11 is vertically grown on the first surface of the substrate 10 in a vacuum environment. Referring to FIG. 4 again, the top surface of the nano-pillar 11 can be formed into various shapes including a flat surface, a sloped surface, a tapered shape, a crown shape, and the like.

Attachment 5 discloses another electron micrograph of several nano-column-nitrogen semiconductor nanostructures of the second preferred embodiment of the present invention, which is amplified by a field emission scanning electron microscope by 40,000 times microscopy. image. Please refer to the attached picture 5, the density of the nano column is 10 ⁹ cm ^-2 in a vacuum environment. A preferred embodiment of the invention has a nanocolumn density of between 10 ⁶ cm ^-2 and 10 ¹¹ cm ^-2 .

Fig. 5 is a graph showing a cathode ray fluorescence curve of a tri-n-nitrogen semiconductor nanostructure according to a second preferred embodiment of the present invention in a cathode ray fluorescence experiment. Referring to Figure 5, in the cathode ray fluorescence [CL] measurement experiment, a cathode ray fluorescence experiment was performed using electron beam excitation at room temperature, which showed a signal of gallium nitride at about 365 nm, and The 490 nm shows the signal of indium gallium nitride, which shows that the tri-n-nitrogen semiconductor nanostructure of the present invention has an indium gallium nitride/gallium nitride double heterostructure.

The foregoing preferred embodiments are merely illustrative of the invention and the technical features thereof, and the techniques of the embodiments can be carried out with various substantial equivalent modifications and/or alternatives; therefore, the scope of the invention is subject to the appended claims. The scope defined by the scope shall prevail.

10‧‧‧Substrate

11‧‧‧Neizhu

11a‧‧‧p-type gallium nitride layer

11b‧‧‧Indium gallium nitride layer

11c‧‧‧n type gallium nitride layer

12‧‧‧Insulation

13a‧‧‧ Nickel contact layer

13b‧‧‧ gold contact layer

14a‧‧‧Aluminum contact layer

14b‧‧‧Indium contact layer

Fig. 1 is a schematic view showing the structure of a tri-n-nitrogen semiconductor nanostructure according to a first preferred embodiment of the present invention.

Fig. 1A is a schematic view showing the structure of a single column of a three-nitride-nitride nanostructure of the first preferred embodiment of the present invention.

Attachment 1: A top electron microscopic image of a single column of a three-n-nitrogen semiconductor nanostructure of the first preferred embodiment of the present invention.

Attachment 2: Electron microscopic image of several nanocolumns of the tri-n-nitrogen semiconductor nanostructure of the first preferred embodiment of the present invention.

Attachment 3: A luminescence image of a tri-n-nitrogen semiconductor nano-light emitting diode according to a first preferred embodiment of the present invention.

Fig. 2 is a diagram showing the microphotoluminescence curve of the tri-n-cell semiconductor nanostructure of the first preferred embodiment of the present invention in a microphotoluminescence experiment.

Fig. 3 is a graph showing the indium/gallium profile of the trivalent-nitrogen semiconductor nanostructure of the first preferred embodiment of the present invention in an energy dispersive analysis experiment.

Fig. 4 is a schematic view showing the structure of a tri-n-nitrogen semiconductor nanostructure according to a second preferred embodiment of the present invention.

Attachment 4: Electron microscopic image of several nanocolumns of the tri-n-nitrogen semiconductor nanostructure of the second preferred embodiment of the present invention.

Attachment 5: Another electron micrograph of several nanocolumns of the tri-n-nitrogen semiconductor nanostructure of the second preferred embodiment of the present invention.

Fig. 5 is a graph showing a cathode ray fluorescence curve of a trigonal-nitrogen semiconductor nanostructure according to a second preferred embodiment of the present invention in a cathode ray fluorescence experiment.

10‧‧‧Substrate

11‧‧‧Neizhu

12‧‧‧Insulation

13a‧‧‧ Nickel contact layer

13b‧‧‧ gold contact layer

14a‧‧‧Aluminum contact layer

14b‧‧‧Indium contact layer

Claims (17)

A tri-n-nitrogen semiconductor nanostructure comprising: a substrate having a first surface; a plurality of nano-pillars grown on a first surface of the substrate, the nano-column utilizing molecular beam epitaxy Formed on the first surface of the substrate, the nano column includes a p-type gallium nitride layer, an indium gallium nitride layer and an n-type gallium nitride layer; the p-type gallium nitride layer is formed on the nitrogen On the indium gallium layer, the indium gallium nitride layer is formed on the n-type gallium nitride layer; and an insulating layer formed on the first surface of the substrate by a spin-on glass method; An insulating layer is formed between the nanopillars to form an insulating portion between the nanopillars. A tri-n-nitrogen semiconductor nanostructure comprising: a substrate having a first surface; at least one nanocolumn grown on a first surface of the substrate, the nanocolumn utilizing molecular beam epitaxy Formed on the first surface of the substrate, the nano column includes a p-type gallium nitride layer, an indium gallium nitride layer and an n-type gallium nitride layer; the p-type gallium nitride layer is formed on the nitrogen On the indium gallium layer, the indium gallium nitride layer is formed on the n-type gallium nitride layer; and an insulating layer formed on the first surface of the substrate by a spin-on glass method; An insulating layer is formed between the nanopillars to form an insulating portion between the nanopillars. The tri-n-nitrogen semiconductor nanostructure according to claim 1 or 2, wherein the nano-pillar is vertically grown on the first surface of the substrate. a tri-n-nitrogen semiconductor nanostructure as described in claim 1 or 2 of the patent application, wherein The nanocolumn has an indium gallium nitride/gallium nitride double heterostructure. The tri-n-nitrogen semiconductor nanostructure according to claim 1 or 2, wherein the diameter of the nanocolumn is between 10 nm and 1 μm. The tri-n-nitrogen semiconductor nanostructure according to claim 1 or 2, wherein the height of the nanocolumn is less than 10 μm. The tri-n-nitrogen semiconductor nanostructure according to claim 1 or 2, wherein the top surface of the nano-column forms one of a plane, a bevel, a tapered shape and a crown. The tri-n-nitrogen semiconductor nanostructure described in claim 1 or 2, wherein the insulating layer is made of a SOG-600 material. The tri-n-nitrogen semiconductor nanostructure according to claim 1 or 2, wherein the nano-column density is between 10 ⁶ cm ^-2 and 10 ¹¹ cm ^-2 . A tri-n-cell semiconductor nano-light emitting diode comprising: a substrate having a first surface; a nano-column grown on a first surface of the substrate, the nano-column utilizing a molecular beam a crystallization method is formed on the first surface of the substrate, the nano-column comprises a p-type gallium nitride layer, an indium gallium nitride layer and an n-type gallium nitride layer; the p-type gallium nitride layer is formed on The indium gallium nitride layer is formed on the n-type gallium nitride layer; and an insulating layer is formed on the first surface of the substrate by a spin-on glass method. The insulating layer is filled between the nano-pillars to form an insulating portion between the nano-pillars; wherein the structure of the nano-pillar forms a tri-n-nitrogen semiconductor nano-light emitting diode. The tri-n-cell semiconductor light-emitting diode according to claim 10, wherein the nano-pillar is vertically grown on the first surface of the substrate. The tri-n-cell semiconductor light-emitting diode according to claim 10, wherein the nano-column has an indium gallium nitride/gallium nitride double heterostructure. The tri-n-cell semiconductor light-emitting diode according to claim 10, wherein the diameter of the nano-column is between 10 nm and 1 μm. The tri-n-cell semiconductor light-emitting diode according to claim 10, wherein the height of the nano-column is less than 10 μm. The tri-n-cell semiconductor light-emitting diode according to claim 10, wherein the top surface of the nano-column forms one of a plane, a bevel, a tapered shape and a crown. The tri-n-cell semiconductor light-emitting diode according to claim 10, wherein the insulating layer is made of SOG-600 material. The tri-n-cell semiconductor light-emitting diode according to claim 10, wherein the nano-column density is between 10 ⁶ cm ^-2 and 10 ¹¹ cm ^-2 .