TWI441202B - Low capacitance multilayer chip varistor and overvoltage protection layer being used within the same - Google Patents
Low capacitance multilayer chip varistor and overvoltage protection layer being used within the same Download PDFInfo
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本發明涉及一種低電容層積型晶片變阻器,尤其是涉及電容值在1MHz下小於0.3pF且用於抑制過電壓、忍耐靜電衝擊及保護電子線路的低容層積型晶片變阻器。BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a low capacitance stacked type wafer varistor, and more particularly to a low capacitance layered wafer varistor having a capacitance value of less than 0.3 pF at 1 MHz and for suppressing overvoltage, endurance of electrostatic shock, and protection of electronic circuits.
如圖1所示,一種在高頻範圍下使用的變阻器10,其結構包含一陶瓷本體11、一對表面電極12a和12b、一對端電極13a和13b、及一絕緣層20。其中,所述表面電極12a和12b是以薄膜技術製作在該陶瓷本體11的外層或內層同一平面上,而所述端電極13a和13b分別覆蓋在該陶瓷本體11的兩個端部上,且與所述表面電極12a和12b分別構成電性連接;而且,所述絕緣層20填滿所述表面電極12a和12b之間的間隙14。As shown in FIG. 1, a varistor 10 for use in a high frequency range includes a ceramic body 11, a pair of surface electrodes 12a and 12b, a pair of terminal electrodes 13a and 13b, and an insulating layer 20. Wherein, the surface electrodes 12a and 12b are formed on the same plane of the outer layer or the inner layer of the ceramic body 11 by a thin film technique, and the end electrodes 13a and 13b are respectively covered on both ends of the ceramic body 11, And electrically connected to the surface electrodes 12a and 12b, respectively; moreover, the insulating layer 20 fills the gap 14 between the surface electrodes 12a and 12b.
所述絕緣層20是一種具有過電壓保護特性的絕緣材料,其微觀結構的特點,如圖2所示,是以高分子材料(或稱高分子聚合物)21作為絕緣材料的基材(matrix)22,在該高分子基材22的組織中,以一級分散(first dispersion)將粒徑介於0.1~100μm的微米級導體及半導體微粒23均勻散佈其中,並且在一級分散的微米級導體或半導體微粒23之間,以二級分散(secondary dispersion)將粒徑介於1~100nm的奈米級導體及半導體微粒24散佈其間,以縮小微米級導體及半導體微粒23與奈米級導體及半導體微粒24之間的間距。The insulating layer 20 is an insulating material having an overvoltage protection characteristic, and its microscopic structure, as shown in FIG. 2, is a substrate of a polymer material (or polymer) 21 as an insulating material (matrix) 22, in the microstructure of the polymer substrate 22, a micron-sized conductor having a particle diameter of 0.1 to 100 μm and semiconductor fine particles 23 are uniformly dispersed therein by first dispersion, and are dispersed in a first-order dispersed micron-sized conductor or Between the semiconductor fine particles 23, a nano-conductor having a particle diameter of 1 to 100 nm and semiconductor fine particles 24 are dispersed therebetween by a second dispersion to reduce the micro-scale conductor and the semiconductor fine particles 23 and the nano-conductor and the semiconductor. The spacing between the particles 24.
所述變阻器10的電容值極低,在1MHz下小於0.3pF,當受到異常過電壓時,藉著所述絕緣層20的高分子基材22中的微米級導體及半導體微粒23與奈米級導體及半導體微粒24之間的間距極小,在導體及半導體微粒之間電子會產生隧道效應,而具有極佳的抑制過電壓及耐靜電能力,故可作為高頻線路中的保護元件使用。The varistor 10 has a very low capacitance value of less than 0.3 pF at 1 MHz, and when subjected to an abnormal overvoltage, the micron-sized conductor and the semiconductor fine particles 23 in the polymer substrate 22 of the insulating layer 20 and the nano-scale The distance between the conductor and the semiconductor fine particles 24 is extremely small, and electrons are tunneled between the conductor and the semiconductor fine particles, and have excellent suppression of overvoltage and static electricity resistance, so that they can be used as a protective element in a high frequency line.
但,所述變阻器10的缺點,也在於其絕緣層20是由高分子材料21所組成,材質會因為高熱而發生碳化。當所述變阻器10在高頻線路中作為抑制過電壓的保護元件使用時,所述絕緣層20的高分子基材22常因靜電衝擊或突波過電壓產生的高熱而發生碳化,進而造成所述變阻器10發生電性導通而失去對電子線路或元件的保護作用。所以,這種變阻器10的耐靜電衝擊的壽命較短,若以8KV靜電直接衝擊,最多只能耐500次衝擊,就會產生失效的情形。However, the varistor 10 has the disadvantage that the insulating layer 20 is composed of the polymer material 21, and the material is carbonized due to high heat. When the varistor 10 is used as a protection element for suppressing an overvoltage in a high frequency line, the polymer substrate 22 of the insulating layer 20 is often carbonized by the high heat generated by an electrostatic shock or a surge overvoltage, thereby causing The varistor 10 is electrically conductive and loses protection of the electronic circuit or component. Therefore, the varistor 10 has a short life of electrostatic shock resistance. If it is directly impacted by 8KV static electricity, it can only withstand 500 impacts at a time, and a failure will occur.
此外,如圖1及圖3所示,另一種變阻器15的陶瓷主體11如果選用具有微孔結構19的過電壓保護材料製成,其微觀結構具相當高比例的孔隙度,包含3~50wt%無機玻璃組成及50~97wt%粒徑大於0.1微米的半導體或導體微粒16;其中,所述的半導體或導體微粒16的表面包覆一層無機玻璃薄膜17,且所述的無機玻璃薄膜17中,含有二級分散且粒徑小於1微米的亞微米或奈米級半導體微粒或導體微粒18。In addition, as shown in FIG. 1 and FIG. 3, the ceramic body 11 of the other varistor 15 is made of an overvoltage protection material having a microporous structure 19, and the microstructure thereof has a relatively high proportion of porosity, including 3 to 50% by weight. An inorganic glass composition and 50 to 97 wt% of semiconductor or conductor particles 16 having a particle diameter of more than 0.1 μm; wherein the surface of the semiconductor or conductor particles 16 is coated with an inorganic glass film 17, and the inorganic glass film 17 is Submicron or nano-sized semiconductor particles or conductor particles 18 having a secondary dispersion and having a particle size of less than 1 micron.
這種陶瓷主體15的缺點,又在於所述陶瓷主體11含高含量 的半導體或導體微粒16,除造成成本費用高昂外,也因為具微孔結構19容易受潮而導致所述變阻器10發生電性導通而沒有防護功能,不利在高濕環境中使用。The disadvantage of such a ceramic body 15 is that the ceramic body 11 contains a high content. The semiconductor or conductor particles 16 are expensive, and because the microporous structure 19 is easily wetted, the varistor 10 is electrically conductive without a protective function, which is disadvantageous for use in a high-humidity environment.
本發明的主要目的在於提供一種過電壓保護材料,以多孔陶瓷材料為基材,應用於高頻電子線路的正負電極之間,有抑制過電壓(或稱暫態突波電壓)及耐數千次以上的8KV靜電衝擊的能力,其組成包含10~30 wt%多孔陶瓷基材、65~80 wt%粒徑介於0.1~100μm的微米級導體及半導體微粒及5~10 wt%粒徑介於1~100nm的奈米級導體或半導體微粒;且該多孔陶瓷基材的組織中佈滿微細開孔,所述微米級導體及半導體微粒以一級分散均勻散佈於該多孔陶瓷基材的組織中,所述奈米級導體及半導體微粒以二級分散散佈於所述微細開孔之間以及一級分散的微米級導體或半導體微粒之間。The main object of the present invention is to provide an over-voltage protection material, which is applied to a porous ceramic material as a substrate, and is applied between positive and negative electrodes of a high-frequency electronic circuit, and has an overvoltage (or transient surge voltage) and a resistance of several thousand. More than 8KV electrostatic shock capability, the composition consists of 10~30 wt% porous ceramic substrate, 65~80 wt% micron-sized conductor with 0.1-100 μm particle size and semiconductor particles and 5~10 wt% particle size. a nano-conductor or a semiconductor microparticle of 1 to 100 nm; and the microstructure of the porous ceramic substrate is covered with fine openings, and the micro-scale conductor and the semiconductor microparticle are uniformly dispersed in a first-order dispersion in the structure of the porous ceramic substrate The nano-scale conductor and the semiconductor fine particles are dispersed in a two-stage dispersion between the fine openings and between the first-order dispersed micro-scale conductors or semiconductor fine particles.
所述過電壓保護材料的多孔陶瓷基材,可選自剛玉砂、碳化矽、堇青石、氧化鋁、氧化鋯或矽酸鈣的其中一種或一種以上所組成。The porous ceramic substrate of the overvoltage protection material may be selected from one or more of corundum sand, tantalum carbide, cordierite, alumina, zirconia or calcium silicate.
所述過電壓保護材料的微米級及奈米級導體微粒,可選自鉑(Pt)、鈀(Pd)、鎢(W)、金(Au)、鋁(Al)、銀(Ag)、鎳(Ni)、銅(Cu)或其合金的其中一種或一種以上。The micron-sized and nano-sized conductor particles of the overvoltage protection material may be selected from the group consisting of platinum (Pt), palladium (Pd), tungsten (W), gold (Au), aluminum (Al), silver (Ag), and nickel. One or more of (Ni), copper (Cu), or an alloy thereof.
所述過電壓保護材料的微米級及奈米級半導體微粒,可選自氧化鋅、氧化鈦、氧化錫、矽、鍺、碳化矽、矽-鍺(Si-Ge)合金、 銻化銦、砷化鎵、磷化銦、磷化鎵、硫化鋅、硒化鋅、碲化鋅、鈦酸鍶或鈦酸鋇的其中一種。The micron-sized and nano-sized semiconductor microparticles of the overvoltage protection material may be selected from the group consisting of zinc oxide, titanium oxide, tin oxide, antimony, bismuth, niobium carbide, bismuth-tellurium (Si-Ge) alloy, One of indium antimonide, gallium arsenide, indium phosphide, gallium phosphide, zinc sulfide, zinc selenide, zinc telluride, barium titanate or barium titanate.
本發明的另一目的在於提供一種低電容層積型晶片變阻器,具極佳的靜電防護效果及突波抑制能力,適用在高濕環境或/和高頻電路中使用,在1MHz下電容值小於0.3 pF,包含一陶瓷本體、一對相向的內電極、一對端電極及一過電壓保護層,其中,所述陶瓷主體的組織結構緻密性極佳且不具微孔結構,故不易受潮;所述相向的內電極佈置在所述陶瓷主體的內層的同一平面上或上下交錯的不同平面上,且彼此相互間隔一間隙,並使用本發明的電壓保護材料填滿該間隙後形成所述過電壓保護層,兼具耐高溫、抑制過電壓及耐數千次以上的8KV靜電衝擊的能力;所述的成對端電極分別覆蓋在該陶瓷本體的左右兩側端部上,且與所對應的其中一個內電極構成電性連接。Another object of the present invention is to provide a low-capacitance laminated wafer varistor with excellent electrostatic protection effect and surge suppression capability, which is suitable for use in a high-humidity environment or/and a high-frequency circuit, and has a capacitance value less than 1 MHz. 0.3 pF, comprising a ceramic body, a pair of opposing inner electrodes, a pair of terminal electrodes and an overvoltage protection layer, wherein the ceramic body has excellent compact structure and no microporous structure, so it is not easily damp; The opposite inner electrodes are disposed on the same plane of the inner layer of the ceramic body or on different planes staggered up and down, and are spaced apart from each other by a gap, and are formed by filling the gap with the voltage protection material of the present invention. The voltage protection layer has the capability of resisting high temperature, suppressing overvoltage and resisting 8KV electrostatic shock of several thousand times or more; the pair of end electrodes respectively covering the left and right end portions of the ceramic body, and corresponding thereto One of the internal electrodes constitutes an electrical connection.
本發明的低電容層積型晶片變阻器,由於所使用的過電壓保護層受到組織結構緻密性極佳的所述陶瓷主體完全密封及包覆,故本發明的低容層積型晶片變阻器在高濕環境或/和高頻電路中使用都不會失去防護功能。In the low-capacitance laminated type wafer varistor of the present invention, since the over-voltage protective layer used is completely sealed and coated by the ceramic body excellent in compactness of the structure, the low-capacity laminated type wafer varistor of the present invention is high. No protection is lost in wet or / or high frequency circuits.
所述陶瓷主體以低介電材質製成,且不具有微孔結構,可選自矽酸鹽玻璃、矽鋁酸鹽玻璃、硼酸鹽玻璃、磷酸鹽玻璃、鉛酸鹽玻璃、氧化鋁或碳化矽的其中一種;所述陶瓷主體的內電極,可選用由鉑(Pt)、鈀(Pd)、金(Au)、銀(Ag)或鎳(Ni)製成。The ceramic body is made of a low dielectric material and has no microporous structure, and may be selected from the group consisting of silicate glass, strontium aluminate glass, borate glass, phosphate glass, lead phosphate glass, aluminum oxide or carbonization. One of the crucibles; the inner electrode of the ceramic body may be made of platinum (Pt), palladium (Pd), gold (Au), silver (Ag) or nickel (Ni).
所述陶瓷主體的端電極,可選用由銀(Ag)、銅(Cu)或銀鈀合金製成。The terminal electrode of the ceramic body may be made of silver (Ag), copper (Cu) or silver-palladium alloy.
本發明的又一目的在於提供一種陣列式低電容變阻器,其結構與所述低電容變阻器類同,包含一陶瓷本體、一對以上相向的內電極、一對端電極及一過電壓保護層,其中,所述陶瓷主體的每對相向的內電極,設於該陶瓷主體的內層同一平面上,且彼此之間以並排方式佈置;每對相向的內電極相互間隔一間隙,並使用本發明的電壓保護材料填滿該間隙後形成所述過電壓保護層,兼具耐高溫、抑制過電壓及耐數千次以上的8KV靜電衝擊的能力;所述的成對端電極分別覆蓋在該陶瓷本體的左右兩側端部上,且與所對應的並排內電極構成電性連接。Another object of the present invention is to provide an array type low capacitance varistor having the same structure as the low capacitance varistor, comprising a ceramic body, a pair of opposite inner electrodes, a pair of terminal electrodes, and an overvoltage protection layer. Wherein each pair of opposing inner electrodes of the ceramic body are disposed on the same plane of the inner layer of the ceramic body, and are arranged side by side with each other; each pair of opposing inner electrodes are spaced apart from each other by a gap, and the invention is used The voltage protection material fills the gap to form the overvoltage protection layer, and has the capability of resisting high temperature, suppressing overvoltage and resisting 8KV electrostatic shock of several thousand times or more; the pair of terminal electrodes respectively covering the ceramic The left and right end portions of the body are electrically connected to the corresponding side-by-side internal electrodes.
如圖4及圖5所示,本發明的低電容層積型晶片變阻器(以下簡稱為低電容變阻器)30,是以層積製程(multilayer technology)製作,再經過高溫燒結而製成,包含一陶瓷本體31、一對相向的內電極32a和32b、一對端電極33a和33b、及一過電壓保護層(或稱過電壓保護材料)40。As shown in FIG. 4 and FIG. 5, the low-capacitance laminated wafer varistor (hereinafter referred to as a low-capacitance varistor) 30 of the present invention is produced by a multilayer technology and then sintered at a high temperature, and includes one. The ceramic body 31, a pair of opposing inner electrodes 32a and 32b, a pair of terminal electrodes 33a and 33b, and an overvoltage protection layer (or overvoltage protection material) 40.
所述相向的內電極32a和32b有二種佈置方式,其中一種佈置方式,如圖4所示,是製作在該陶瓷本體31的內層同一平面上的兩側,且彼此之間相互間隔一間隙34;另一種佈置方式,如圖5所示,是製作在該陶瓷本體31的內層,但上下交錯不在同一平面上,且彼此之間相互間隔一間隙35;所述端電極33a和 33b分別覆蓋在該陶瓷本體31的左右兩側的端部上,且與所述內電極32a和32b分別構成電性連接;而且,所述過電壓保護層40填滿所述內電極32a和32b之間的間隙34及35。The opposite inner electrodes 32a and 32b are arranged in two ways, one of which is arranged on the same plane on the same plane as the inner layer of the ceramic body 31, as shown in FIG. a gap 34; another arrangement, as shown in FIG. 5, is formed on the inner layer of the ceramic body 31, but the upper and lower staggered are not on the same plane, and are spaced apart from each other by a gap 35; the end electrode 33a and 33b respectively covering the left and right ends of the ceramic body 31, and electrically connecting with the inner electrodes 32a and 32b, respectively; and, the overvoltage protection layer 40 fills the inner electrodes 32a and 32b Between the gaps 34 and 35.
所述陶瓷主體31是由低介電材質製成,可選自矽酸鹽玻璃、矽鋁酸鹽玻璃、硼酸鹽玻璃、磷酸鹽玻璃、鉛酸鹽玻璃、氧化鋁或碳化矽的其中一種。而且,所述陶瓷主體31經過高溫燒結後緻密性極佳,不具有微孔結構,可以承受因為靜電衝擊或突波過電壓所產生的高熱,對於電路中不受歡迎的雜散電容的產生有抑制的效果,故適用在高濕環境或/和高頻電路中使用。The ceramic body 31 is made of a low dielectric material and may be selected from the group consisting of silicate glass, strontium aluminate glass, borate glass, phosphate glass, lead phosphate glass, aluminum oxide or tantalum carbide. Moreover, the ceramic body 31 is excellent in compactness after high-temperature sintering, has no microporous structure, can withstand high heat generated by electrostatic shock or surge overvoltage, and has an undesired generation of stray capacitance in the circuit. The effect of suppression is suitable for use in high humidity environments or/and high frequency circuits.
所述內電極32a和32b可以是鉑(Pt)、鈀(Pd)、金(Au)、銀(Ag)或鎳(Ni)等金屬材料。The internal electrodes 32a and 32b may be metal materials such as platinum (Pt), palladium (Pd), gold (Au), silver (Ag), or nickel (Ni).
所述端電極33a和33b可以是銀(Ag)、銅(Cu)或銀鈀合金等金屬材料。The terminal electrodes 33a and 33b may be metal materials such as silver (Ag), copper (Cu) or silver palladium alloy.
所述過電壓保護層40是一種具過電壓保護特性的多孔性絕緣材料,其成分包含10~30 wt%多孔陶瓷材料41、65~80 wt%粒徑介於0.1~100μm的微米級導體及半導體微粒44及5~10 wt%粒徑介於1~100nm的奈米級導體或半導體微粒45;而且,所述電壓保護層40是應用在電子線路或電子元件的正負電極之間,具有抑制暫態突波電壓及忍耐靜電衝擊的能力。The overvoltage protection layer 40 is a porous insulating material with overvoltage protection characteristics, and the composition thereof comprises 10 to 30 wt% of porous ceramic material 41, 65 to 80 wt% of micron-sized conductors having a particle diameter of 0.1 to 100 μm and The semiconductor fine particles 44 and 5 to 10 wt% of nano-conductor or semiconductor fine particles 45 having a particle diameter of 1 to 100 nm; moreover, the voltage protective layer 40 is applied between positive and negative electrodes of an electronic circuit or an electronic component, and has suppression Transient surge voltage and the ability to withstand electrostatic shock.
所述多孔陶瓷材料41可選自剛玉砂、碳化矽、堇青石、氧化鋁、氧化鋯或矽酸鈣的其中一種或一種以上,其特性為耐高溫、耐高壓、抗酸、抗鹼、耐腐蝕及使用壽命長,尤其,經過高溫 燒結後,其組織會因為熱脹冷縮的變化而具有高比例的微細開孔的特徵。The porous ceramic material 41 may be selected from one or more of corundum sand, tantalum carbide, cordierite, alumina, zirconia or calcium silicate, and has the characteristics of high temperature resistance, high pressure resistance, acid resistance, alkali resistance and resistance. Corrosion and long service life, especially after high temperature After sintering, its structure will have a high proportion of fine openings due to changes in thermal expansion and contraction.
所述微米級導體微粒44及奈米級導體微粒45可選自鉑(Pt)、鈀(Pd)、鎢(W)、金(Au)、鋁(Al)、銀(Ag)、鎳(Ni)、銅(Cu)或其合金的其中一種或一種以上。The micron-sized conductor particles 44 and the nano-conductor particles 45 may be selected from the group consisting of platinum (Pt), palladium (Pd), tungsten (W), gold (Au), aluminum (Al), silver (Ag), and nickel (Ni). One or more of copper (Cu) or an alloy thereof.
所述微米級半導體微粒44及奈米級半導體微粒45可選自氧化鋅、氧化鈦、氧化錫、矽、鍺、碳化矽、矽-鍺(Si-Ge)合金、銻化銦、砷化鎵、磷化銦、磷化鎵、硫化鋅、硒化鋅、碲化鋅、鈦酸鍶或鈦酸鋇的其中一種。The micron-sized semiconductor microparticles 44 and the nano-semiconductor microparticles 45 may be selected from the group consisting of zinc oxide, titanium oxide, tin oxide, antimony, bismuth, antimony carbide, antimony-tellurium (Si-Ge) alloy, indium antimonide, gallium arsenide. One of indium phosphide, gallium phosphide, zinc sulfide, zinc selenide, zinc telluride, barium titanate or barium titanate.
如圖6所示,所述過電壓保護層40的微觀結構,是以多孔陶瓷材料41作為絕緣材料的基材(matrix)42,該多孔陶瓷基材42的組織中,具有高比例的微細開孔43,且包含一級分散(first dispersion)的微米級導體及半導體微粒44均勻散佈其中,以及二級分散(secondary dispersion)的奈米級導體及半導體微粒45散佈在一級分散的微米級導體或半導體微粒44之間。As shown in FIG. 6, the microstructure of the overvoltage protection layer 40 is a matrix 42 having a porous ceramic material 41 as an insulating material, and the porous ceramic substrate 42 has a high proportion of micro-opening in the structure of the porous ceramic substrate 42. The holes 43, and including the first dispersion of the micron-sized conductors and the semiconductor particles 44 are uniformly dispersed therein, and the secondary dispersion of the nano-scale conductors and the semiconductor particles 45 are dispersed in the first-order dispersed micro-scale conductors or semiconductors. Between the particles 44.
更重要的是,所述過電壓保護層40的多孔陶瓷基材42的材質特性,不會因為承受高熱而發生物理變化,故可以忍耐靜電衝擊或突波過電壓時所產生的高熱;而且,該多孔陶瓷基材42的組織中,除有高比例的微細開孔43及高含量的微米級導體及半導體微粒44均勻散佈其中之外,還具有高含量的二級分散的奈米級導體及半導體微粒45均勻散佈於所述微細開孔43之間或所述微細開孔43與微米級導體及半導體微粒44之間。尤其,當所 述過電壓保護層40應用於電路的正負電極之間,且受到異常過電壓時,因為其組織中的所述微細開孔43之間、所述微細開孔43與所述奈米級導體及半導體微粒45之間或所述奈米級導體及半導體微粒45之間的間距都十分的極小,有利於電子產生強烈隧道效應,故本發明的過電壓保護層40具有極佳的抑制過電壓及耐靜電能力,且壽命長。More importantly, the material properties of the porous ceramic substrate 42 of the overvoltage protection layer 40 do not undergo physical changes due to high heat, and thus can endure the high heat generated by electrostatic shock or surge overvoltage; The porous ceramic substrate 42 has a high proportion of finely dispersed micropores 43 and a high content of micron-sized conductors and semiconductor microparticles 44 uniformly dispersed therein, and has a high content of two-stage dispersed nano-scale conductors and The semiconductor fine particles 45 are uniformly dispersed between the fine openings 43 or between the fine openings 43 and the micro-scale conductors and the semiconductor fine particles 44. Especially, when The voltage protection layer 40 is applied between the positive and negative electrodes of the circuit, and is subjected to an abnormal overvoltage because of the microvias 43 in the structure, the microvias 43 and the nanoscale conductors and The spacing between the semiconductor particles 45 or between the nano-conductor and the semiconductor particles 45 is extremely small, which facilitates strong tunneling of electrons, so that the over-voltage protection layer 40 of the present invention has excellent suppression of overvoltage and Resistant to static electricity and long life.
如圖4及圖5所示,本發明的低電容變阻器30的特點,是將左右兩側的內電極32a和32b佈置在緻密性極佳且不易受潮的所述陶瓷主體31的內層同一平面上或上下交錯的平面上,而且,所述內電極32a和32b與填滿於所述內電極32a和32b之間的間隙34及35的過電壓保護層40,是一起受到該陶瓷主體31的完全密封包覆,這種結構將使得所述過電壓保護層40既耐高熱又完全不會受到周圍環境變化的影響。As shown in FIG. 4 and FIG. 5, the low capacitance varistor 30 of the present invention is characterized in that the inner electrodes 32a and 32b on the left and right sides are arranged on the same plane of the inner layer of the ceramic body 31 which is excellent in density and is not easily damp. On the upper or upper and lower staggered planes, and the overvoltage protection layers 40 of the inner electrodes 32a and 32b and the gaps 34 and 35 filled between the inner electrodes 32a and 32b are received by the ceramic body 31 together. Completely sealed, this structure will allow the overvoltage protection layer 40 to withstand high heat and be completely unaffected by changes in the surrounding environment.
所以,本發明的低電容變阻器30,具極低電容值特性,在1MHz下電容值小於0.3pF,尤其,具有耐數千次以上的8kv靜電衝擊的特性,經過數千次靜電衝擊後,還是保持原來功能,十分適合在高濕環境或/和高頻線路中作為抑制過電壓及抑制靜電衝擊的保護元件。Therefore, the low-capacitance varistor 30 of the present invention has a very low capacitance characteristic, and has a capacitance value of less than 0.3 pF at 1 MHz, and particularly has an 8 kV electrostatic shock resistance of several thousand times or more, after thousands of electrostatic shocks, Maintaining the original function is ideal for protecting against overvoltage and suppressing electrostatic shock in high-humidity environments or/and high-frequency lines.
如圖7所示,本發明的另一種陣列式低電容變阻器50,其材質、結構及使用功能都與所述低電容變阻器30相同,但,將佈置在所述陶瓷主體31的內層同一平面上的左右兩側內電極32a和32b,由一對內電極32a和32b改良為二對以上並排的內電極 32a和32b,而且都使用所述過電壓保護層40將每一對內電極32a和32b之間的間隙34填滿。As shown in FIG. 7, another array type low capacitance varistor 50 of the present invention has the same material, structure and function as the low capacitance varistor 30, but will be disposed on the same plane of the inner layer of the ceramic body 31. The upper left and right inner electrodes 32a and 32b are modified by a pair of inner electrodes 32a and 32b into two or more pairs of inner electrodes side by side. 32a and 32b, and both use the overvoltage protection layer 40 to fill the gap 34 between each pair of inner electrodes 32a and 32b.
以下舉實施例及比較例來闡明本發明的效果,但本發明的權利範圍不是僅限於實施例的範圍。The effects of the present invention will be clarified by the following examples and comparative examples, but the scope of the invention is not limited to the scope of the examples.
依照表1的組成配方製成實施例1-3及比較例1-3的過電壓保護材料;再分別應用於結構如圖4的相同規格低電容變阻器30的內電極32a和32b之間的間隙34。而且,低電容變阻器30的陶瓷主體31的結構為不生孔隙,將所使用的過電壓保護材料完全密封及包覆。The overvoltage protection materials of Examples 1-3 and Comparative Examples 1-3 were prepared according to the composition of Table 1, and were respectively applied to the gaps between the internal electrodes 32a and 32b of the same-sized low capacitance varistor 30 having the structure shown in FIG. 34. Further, the ceramic body 31 of the low capacitance varistor 30 has a structure in which pores are not formed, and the overvoltage protection material used is completely sealed and coated.
測試時,實施例1-3及比較例1-3的變阻器是並聯在相同高頻電路中的正負極之間,測量項目包括崩潰電壓(breakdown voltage)、最高箝制電壓(maximum clamp voltage)及電容值(Capacitor),以及經8KV靜電衝擊1000次後的崩潰電壓偏移量,結果如表2所示。During the test, the varistor of Examples 1-3 and Comparative Examples 1-3 were connected in parallel between the positive and negative electrodes in the same high-frequency circuit, and the measurement items included a breakdown voltage, a maximum clamp voltage, and a capacitance. The value of (Capacitor), and the breakdown voltage offset after 1000 times of electrostatic shock by 8KV, the results are shown in Table 2.
根據表2的實施例1-3及比較例1-3的測試結果後,可以得到以下結論:According to the test results of Examples 1-3 and Comparative Examples 1-3 of Table 2, the following conclusions can be obtained:
1.經過8KV靜電衝擊1000次之後,實施例1-3的低電容變阻器的崩潰電壓變化(△V/V1mA )不超過10%;而比較例1-3的低電容變阻器的崩潰電壓變化(△V/V1mA )超過10%。1. The breakdown voltage change (ΔV/V 1mA ) of the low capacitance varistor of Example 1-3 does not exceed 10% after 1000 times of electrostatic shock of 8 kV; and the breakdown voltage of the low capacitance varistor of Comparative Example 1-3 ( ΔV/V 1mA ) exceeds 10%.
此結果證實:實施例1-3的低電容變阻器的電壓保護材料,以多孔陶瓷材料為基材,具備耐靜電放電(ESD)衝擊能力,且可以忍耐靜電衝擊或暫態突波電壓時所產生的高熱。This result confirms that the voltage protection material of the low capacitance varistor of Embodiment 1-3 is based on a porous ceramic material, has an electrostatic discharge resistant (ESD) impact capability, and can withstand an electrostatic shock or a transient surge voltage. High fever.
2.實施例1-3的低電容變阻器特性,包括崩潰電壓介於200~800V,最高箝制電壓小於150V,電容值在1MHz下小於0.3pF,且經過8KV靜電衝擊1000次之後崩潰電壓變化(△V/V1mA )不超過10%。2. The low capacitance varistor characteristics of Embodiment 1-3, including a breakdown voltage of 200 to 800 V, a maximum clamping voltage of less than 150 V, a capacitance value of less than 0.3 pF at 1 MHz, and a breakdown voltage change after 1000 times of electrostatic shock of 8 KV (Δ) V/V 1mA ) does not exceed 10%.
實施例1-3與比較例1-3相較,實施例1-3的低電容變阻器特性,在崩潰電壓及最高箝制電壓方面是相對比較低,且所述△V/V1mA 的變化不超過10%,故實施例1-3的低電容變阻器是適用在高頻電子線路中作為抑制暫態突波電壓及耐靜電衝擊的保護元件。In Examples 1-3, the low capacitance varistor characteristics of Examples 1-3 were relatively low in terms of breakdown voltage and maximum clamping voltage, and the variation of ΔV/V 1 mA did not exceed that of Comparative Examples 1-3. 10%, so the low capacitance varistor of Embodiment 1-3 is suitable for use as a protection element for suppressing transient surge voltage and electrostatic shock resistance in high frequency electronic circuits.
3.實施例3與比較例1相較,兩者只是電壓保護材料是使用多孔陶瓷材料或使用玻璃材料為基材的差異。3. Example 3 Compared with Comparative Example 1, the difference between the voltage protection material is the use of a porous ceramic material or the use of a glass material as a substrate.
而實施例3與比較例2相較,比較例2的電壓保護材料除了使用玻璃材料為基材外,其玻璃材料中亦不包含二級分散的奈米級導體及半導體微粒(以下簡稱奈米級微粒)。In the third embodiment, compared with the second comparative example, the voltage protective material of the comparative example 2 does not include the second-order dispersed nano-conductor and the semiconductor microparticle (hereinafter referred to as nanometer) except for the glass material. Grade particles).
根據比較的結果,實施例3的低電容變阻器特性,在崩潰電壓及最高箝制電壓方面卻相對較低。然而,比較例2的低電容變阻器特性最差。According to the result of the comparison, the low capacitance varistor characteristic of Embodiment 3 is relatively low in terms of breakdown voltage and maximum clamp voltage. However, the low capacitance varistor of Comparative Example 2 has the worst characteristics.
此結果證實:低電容變阻器的特性,與所使用的電壓保護材料相關,且低電容變阻器的特性,以電壓保護材料是使用多孔陶瓷材料較佳,而使用玻璃材料較差。This result confirms that the characteristics of the low capacitance varistor are related to the voltage protection material used, and the characteristics of the low capacitance varistor, the voltage protection material is preferably a porous ceramic material, and the glass material is inferior.
4.實施例3與比較例3相較,兩者只是電壓保護材料的多孔陶瓷材料中是否包含二級分散的奈米級微粒的差異。但,實施例3的低電容變阻器特性,在崩潰電壓及最高箝制電壓方面卻相對較低。4. Compared with Comparative Example 3, Example 3 is only a difference in whether or not the porous ceramic material of the voltage protective material contains secondary dispersed nano-sized particles. However, the low capacitance varistor characteristic of Embodiment 3 is relatively low in terms of breakdown voltage and maximum clamping voltage.
此結果證實:低電容變阻器的特性,與所使用的電壓保護材料中是否包含二級分散的奈米級微粒相關,且根據實施例1-3的數據,所述電壓保護材料的多孔陶瓷材料中包含二級分散的奈米級微粒的含量愈多,低電容變阻器的崩潰電壓及最高箝制電壓愈低,低電容變阻器的特性更佳。This result confirms that the characteristics of the low capacitance varistor are related to whether or not the second-phase dispersed nano-sized particles are contained in the voltage-protecting material used, and according to the data of Examples 1-3, the porous ceramic material of the voltage-protecting material is The higher the content of the second-order dispersed nano-sized particles, the lower the breakdown voltage and the highest clamping voltage of the low-capacitance varistor, and the characteristics of the low-capacitance varistor are better.
10‧‧‧變阻器10‧‧‧Resistor
11‧‧‧陶瓷本體11‧‧‧Ceramic body
12a、12b‧‧‧表面電極12a, 12b‧‧‧ surface electrode
13a、13b‧‧‧端電極13a, 13b‧‧‧ terminal electrode
14‧‧‧間隙14‧‧‧ gap
15‧‧‧變阻器15‧‧‧Resistor
16‧‧‧微米級導體或半導體微粒16‧‧‧micron conductors or semiconductor particles
17‧‧‧無機玻璃薄膜17‧‧‧Inorganic glass film
18‧‧‧奈米級導體或半導體微粒18‧‧‧Nano-scale conductors or semiconductor particles
19‧‧‧多孔結構19‧‧‧Porous structure
20‧‧‧過電壓保護材料20‧‧‧Overvoltage protection materials
21‧‧‧高分子材料21‧‧‧ Polymer materials
22‧‧‧基材22‧‧‧Substrate
23‧‧‧微米級導體或半導體微粒23‧‧‧micron conductors or semiconductor particles
24‧‧‧奈米級導體或半導體微粒24‧‧‧Nano-level conductors or semiconductor particles
30‧‧‧低電容層積型晶片變阻器30‧‧‧Low capacitance laminated wafer varistor
31‧‧‧陶瓷本體31‧‧‧Ceramic body
32a‧‧‧內電極32a‧‧‧ internal electrode
32b‧‧‧內電極32b‧‧‧ internal electrode
33a‧‧‧端電極33a‧‧‧ terminal electrode
33b‧‧‧端電極33b‧‧‧ terminal electrode
34‧‧‧間隙34‧‧‧ gap
35‧‧‧間隙35‧‧‧ gap
40‧‧‧過電壓保護層40‧‧‧Overvoltage protection layer
41‧‧‧多孔陶瓷材料41‧‧‧Porous ceramic materials
42‧‧‧基材42‧‧‧Substrate
43‧‧‧微細開孔43‧‧‧Micro-opening
44‧‧‧微米級導體或半導體微粒44‧‧‧micron conductor or semiconductor particles
45‧‧‧奈米級導體或半導體微粒45‧‧‧Nano-scale conductors or semiconductor particles
50‧‧‧陣列式變阻器50‧‧‧Array varistor
圖1為一種變阻器的示意圖。Figure 1 is a schematic illustration of a varistor.
圖2為圖1的變阻器所使用的過電壓保護材料的微觀結構示意圖。2 is a schematic view showing the microstructure of an overvoltage protection material used in the varistor of FIG. 1.
圖3為圖1的變阻器在A區域的陶瓷主體微觀結構示意圖。3 is a schematic view showing the microstructure of the ceramic body of the varistor of FIG. 1 in the A region.
圖4為本發明的低電容變阻器的部分剖面圖,顯示相向的內電極是在同一平面上且彼此之間間隔一間隙。4 is a partial cross-sectional view of the low capacitance varistor of the present invention, showing that the opposing inner electrodes are on the same plane with a gap therebetween.
圖5為本發明的低電容變阻器的部分剖面圖,顯示相向的內電極不在同一平面上但彼此上下交錯間隔一間隙。5 is a partial cross-sectional view of the low capacitance varistor of the present invention, showing that the opposing inner electrodes are not on the same plane but are spaced apart from each other by a gap.
圖6為圖4或圖5的變阻器所使用的過電壓保護材料的微觀結構示意圖。FIG. 6 is a schematic view showing the microstructure of the overvoltage protection material used in the varistor of FIG. 4 or 5.
圖7為本發明的陣列式低電容變阻器的部分剖面圖。Figure 7 is a partial cross-sectional view showing the array type low capacitance varistor of the present invention.
40‧‧‧過電壓保護層40‧‧‧Overvoltage protection layer
41‧‧‧多孔陶瓷材料41‧‧‧Porous ceramic materials
42‧‧‧基材42‧‧‧Substrate
43‧‧‧微細開孔43‧‧‧Micro-opening
44‧‧‧微米級導體或半導體微粒44‧‧‧micron conductor or semiconductor particles
45‧‧‧奈米級導體或半導體微粒45‧‧‧Nano-scale conductors or semiconductor particles
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