TWI422061B - Light emitting diode and fabricating method thereof - Google Patents

Description

Light-emitting diode chip and method for manufacturing light-emitting diode wafer

The present invention relates to a light emitting diode chip (LED chip) and a method of fabricating the same, and more particularly to a light emitting diode chip having a buffer layer and a method of fabricating the same.

With the advancement of semiconductor technology, today's light-emitting diodes have high-intensity output, and the light-emitting diodes have the advantages of power saving, small size, low voltage driving, and no mercury, so the light-emitting diode has Widely used in the field of display and lighting. In general, the luminous efficiency of a light-emitting diode wafer mainly depends on the internal quantum efficiency of the light-emitting layer, and the improvement of the internal quantum efficiency is related to the epitaxial quality of the semiconductor layer and the film layer stacking manner of the semiconductor layer. When the epitaxial quality of the light-emitting diode chip is not good, such as a large number of defects and dislocations, internal stress exists in the light-emitting diode wafer, resulting in component reliability and photoelectricity. Characteristics and component life are affected.

In order to improve the defects and lattice misalignment, the prior art forms a buffer layer on the substrate before forming the N-type semiconductor layer, the light-emitting layer and the P-type semiconductor layer, so as to avoid defects and lattice misalignment as much as possible. . However, the GaN-based buffer layer is still facing serious defects and lattice misalignment problems. Therefore, the selection of the buffer layer is still an important issue in the fabrication of current LED chips. one.

The invention provides a light emitting diode wafer which has good photoelectric characteristics and reliability.

The invention provides a method for manufacturing a light-emitting diode wafer, which has good photoelectric characteristics and reliability of a light-emitting diode wafer.

The invention provides a light emitting diode chip comprising a substrate, a buffer layer, a semiconductor element layer and a plurality of electrodes. The buffer layer is disposed on the substrate, the semiconductor device layer is disposed on the buffer layer, and the electrode is electrically connected to the semiconductor device layer, wherein the buffer layer material comprises a germanium doped III-V compound semiconductor (silicon doped III-V group) Compound semiconductor) or a magnesium doped III-V group compound semiconductor.

In an embodiment of the invention, the substrate comprises an alumina substrate.

In an embodiment of the invention, the material of the buffer layer comprises SiAlN, SiAlGaN, SiAlGaInN, SiAlInN, SiAlInBGaN, MgAlN, MgAlGaN, MgAlGaInN, MgAlInN or MgAlInBGaN.

In an embodiment of the invention, the buffer layer includes an epitaxial layer and a plurality of randomly distributed tantalum islands (SiNx islands). The tantalum nitride island pattern is disposed on the substrate and covered by the epitaxial layer.

In an embodiment of the invention, the buffer layer includes an epitaxial layer and a plurality of randomly distributed tantalum island patterns. Wherein, the epitaxial layer is disposed on the substrate, and the plurality of randomly distributed tantalum island patterns It is disposed between the epitaxial layer and the semiconductor device layer.

In an embodiment of the invention, the semiconductor device layer includes a first type semiconductor layer, a light emitting layer, and a second type semiconductor layer. The first type semiconductor layer is disposed on the buffer layer, the light emitting layer is disposed on a partial region of the first type semiconductor layer, and the second type semiconductor layer is disposed on the light emitting layer.

In an embodiment of the invention, the first type semiconductor layer is an N type semiconductor layer, and the second type semiconductor layer is a P type semiconductor layer. Of course, the first type semiconductor layer may also be a P type semiconductor layer, and the second type semiconductor layer is an N type semiconductor layer.

In an embodiment of the invention, the light emitting layer is a multiple quantum light emitting layer (Multiple Quantum Well light-emitting layer).

In an embodiment of the invention, the electrode includes a first electrode and a second electrode. The first electrode is disposed on the first type semiconductor layer not covered by the light emitting layer to be electrically connected to the first type semiconductor layer. The second electrode is disposed on the second type semiconductor layer to be electrically connected to the second type semiconductor layer.

The present invention provides a method of fabricating a light emitting diode wafer. First, a buffer layer is formed on a substrate, and the buffer layer is made of a germanium-doped III-V compound semiconductor or a magnesium-doped III-V compound semiconductor. Next, a semiconductor element layer is formed on the buffer layer, and then a plurality of electrodes are formed on the semiconductor element layer.

In an embodiment of the invention, the material of the buffer layer comprises SiAlN, SiAlGaN, SiAlGaInN, SiAlInN, SiAlInBGaN, MgAlN, MgAlGaN, MgAlGaInN, MgAlInN or MgAlInBGaN.

In an embodiment of the invention, the method for forming a buffer layer includes forming a plurality of beaconized hafnium island patterns on a substrate, and then forming an epitaxial layer on the substrate. To cover the tantalum nitride island pattern.

In an embodiment of the invention, the method for forming a buffer layer includes forming an epitaxial layer on a substrate, and then forming a plurality of randomly distributed tantalum island patterns on the epitaxial layer.

In an embodiment of the invention, the method for forming a tantalum nitride island pattern includes an epitaxial process.

In an embodiment of the invention, the method for forming the semiconductor device layer includes sequentially forming a first type semiconductor material layer, a luminescent material layer, and a second type semiconductor material layer on the buffer layer. Thereafter, the second type semiconductor material layer, the luminescent material layer, and the first type semiconductor material layer are patterned to form a first type semiconductor layer, a light emitting layer, and a second type semiconductor, wherein the light emitting layer is disposed on the first type semiconductor The partial semiconductor layer is disposed on the luminescent layer.

In an embodiment of the invention, the method of forming an electrode includes forming a first electrode on a first type semiconductor layer not covered by the light emitting layer to be electrically connected to the first type semiconductor layer. Thereafter, a second electrode is formed on the second type semiconductor layer to be electrically connected to the second type semiconductor layer.

Since the present invention employs an antimony-doped group III-V compound semiconductor or a magnesium-doped group III-V compound semiconductor as a material of the buffer layer, defects and lattice misalignment in the light-emitting diode wafer of the present invention are employed. It is relatively slight, and the photoelectric characteristics and reliability of the light-emitting diode wafer of the present invention are good.

The above described features and advantages of the present invention will be more apparent from the following description.

First embodiment

1A to 1C are flowcharts showing a method of manufacturing a light-emitting diode wafer according to a first embodiment of the present invention. This embodiment provides a method for manufacturing a light-emitting diode wafer. Referring to FIG. 1A, a substrate 110 is first provided. The commonly used substrate is a sapphire substrate (alumina, Al ₂ O ₃ ). Next, a buffer layer 120 is formed on the substrate 110. The material of the buffer layer 120 includes a germanium-doped III-V compound semiconductor or a magnesium-doped III-V compound semiconductor. In this embodiment, the buffer layer The material of 120 is, for example, SiAlN, SiAlGaN, SiAlGaInN, SiAlInN, SiAlInBGaN, MgAlN, MgAlGaN, MgAlGaInN, MgAlInN or MgAlInBGaN.

Next, referring to FIG. 1B, a semiconductor device layer 130 is formed on the buffer layer 120. The semiconductor device layer 130 is composed of a III-V element compound semiconductor material, and the steps of forming the semiconductor device layer 130 are described in detail below. First, a first type semiconductor material layer 132a, a light emitting material layer 134a, and a second type semiconductor material layer 136a are sequentially formed on the buffer layer 120 in an epitaxial manner. Next, the second type semiconductor material layer 136a, the luminescent material layer 134a, and the first type semiconductor material layer 132a are patterned to form the second type semiconductor layer 136b, the light emitting layer 134b, and the first half The conductor 132b, wherein the light-emitting layer 134b is disposed on a partial region of the first-type semiconductor layer 132b, and the second-type semiconductor layer 136b is disposed on the light-emitting layer 134b. The above method of patterning the second type semiconductor material layer 136a, the luminescent material layer 134a, and the first type semiconductor material layer 132a is, for example, a photolithography process or other suitable patterning method.

Referring to FIG. 1C, after completing the above-described patterning process, the present embodiment selectively forms a current dispersion layer 140 on the second type semiconductor layer 136b. The current dispersion layer 140 helps to introduce current dispersion into the first layer. The second type semiconductor layer 136b further enhances luminous efficiency. Next, a first electrode 150 is formed on the first type semiconductor layer 132b not covered by the light emitting layer 134b, and the first electrode 150 is electrically connected to the first type semiconductor layer 132b and forms a good ohmic contact. Further, while the first electrode 150 is formed, the second electrode 152 may be formed on the second type semiconductor layer 136b, and the second electrode 152 is electrically connected to the second type semiconductor layer 136b and forms a good ohmic contact.

It can be clearly seen from FIG. 1C that the LED assembly 100 manufactured by the above manufacturing method includes a substrate 110, a buffer layer 120, a semiconductor layer 130, a current dispersion layer 140, and a plurality of electrodes 150, 152. The semiconductor element layer 130 includes a first type semiconductor layer 132b, a light emitting layer 134b, and a second type semiconductor layer 136b. When the first type semiconductor layer 132b is an N type semiconductor layer, the second type semiconductor layer 136b is a P type semiconductor layer; otherwise, when the first type semiconductor layer 132b is a P type semiconductor layer, the second type semiconductor layer 136b It is an N-type semiconductor layer. In addition, the light-emitting layer 134b is a multiple quantum well light-emitting layer. Since the material of the buffer layer 120 comprises a germanium doped III-V compound semiconductor or a magnesium doped The III-V compound semiconductor, and thus the buffer layer 120 of the present invention can effectively reduce lattice misalignment and defect occurrence. Compared with the conventional light-emitting diode chip, the light-emitting diode chip 100 provided in this embodiment has better epitaxial quality and the component stress is relatively slight, so the light-emitting diode chip 100 has high reliability. Degree and good photoelectric properties.

Second embodiment

2A is a schematic view of a buffer layer according to a second embodiment of the present invention. Referring to FIG. 2A, the buffer layer 220a of the present embodiment includes a plurality of randomly distributed tantalum nitride island patterns 222a and an epitaxial layer 224a, and the buffer layer 220a is manufactured as follows. First, a plurality of randomly distributed tantalum island patterns 222a are formed on the substrate 210 by an epitaxial process, and then an epitaxial layer 224a is formed on the substrate 210 to cover the tantalum island pattern 222a. In this embodiment, the material of the epitaxial layer 224a is, for example, an antimony-doped III-V compound semiconductor or a magnesium-doped III-V compound semiconductor. In detail, the material of the epitaxial layer 224a may be SiAlN, SiAlGaN, SiAlGaInN, SiAlInN, SiAlInBGaN, MgAlN, MgAlGaN, MgAlGaInN, MgAlInN or MgAlInBGaN.

2B is a schematic view of a light emitting diode wafer according to a second embodiment of the present invention. Referring to FIG. 2B, the LED array 200a of the present embodiment includes a substrate 210, a buffer layer 220a, a semiconductor device layer 230, a current dispersion layer 240, and a plurality of electrodes 250, 252. The light-emitting diode wafer 200a is similar in structure to the light-emitting diode wafer 100 of the first embodiment, but the main difference is the structure of the buffer layer 220a.

Third embodiment

3A is a schematic view of a buffer layer according to a third embodiment of the present invention; Figure. Referring to FIG. 3A, the buffer layer 220b of the embodiment includes an epitaxial layer 224b and a plurality of tantalum nitride island patterns 222b. The manufacturing method of the buffer layer 220b is as follows. First, an epitaxial layer 224b is formed on the substrate 210 by epitaxy, and then a plurality of randomly formed tantalum nitride island patterns 222b are formed on the epitaxial layer 224b.

3B is a schematic view of a light emitting diode wafer according to a third embodiment of the present invention. Referring to FIG. 3B, the LED package 200b of the present embodiment includes a substrate 210, a buffer layer 220b, a semiconductor device layer 230, a current dispersion layer 240, and a plurality of electrodes 250, 252. The light-emitting diode wafer 200b is similar in structure to the light-emitting diode wafer 100a of the second embodiment, but the two main differences are in the structure of the buffer layer 220b.

The tantalum nitride island pattern mentioned in the second and third embodiments described above has a function of increasing the light extraction rate of the light emitting diode wafer from the structural viewpoint. In detail, when a forward bias is applied between the first electrode and the second electrode, the light emitted by the light-emitting layer diverges in various directions. When the light happens to be totally reflected and cannot penetrate the light-emitting diode wafer, the light extraction rate of the light-emitting diode wafer is lowered. The structure of the tantalum nitride island pattern can effectively reduce the probability of total reflection of light, so that most of the light can leave the light emitting diode chip to increase the light extraction rate of the light emitting diode chip, and thus the light emitting diode chip The luminous efficiency will also increase.

In summary, the present invention uses a buffer layer material to greatly reduce lattice misalignment and defects. In addition, the structure of the tantalum nitride island pattern in the buffer layer can increase the light extraction rate of the light emitting diode wafer. Compared with the conventional light-emitting diode chip, the light-emitting diode chip provided by the invention has good performance because of relatively few lattice misalignments and defects. It has epitaxial quality and high light extraction rate, so it has good photoelectric characteristics, high reliability and long service life.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100, 200a, 200b‧‧‧Light Emitter Wafer

110, 210‧‧‧ substrate

120, 220a, 220b‧‧‧ buffer layer

130, 230‧‧‧ semiconductor device layer

132a‧‧‧First type semiconductor material layer

132b, 232‧‧‧ first type semiconductor layer

134a‧‧‧ luminescent material layer

134b, 234‧‧‧ luminescent layer

136a‧‧‧Second type semiconductor material layer

136b, 236‧‧‧ second type semiconductor layer

140, 240‧‧‧current dispersion layer

150, 250‧‧‧ first electrode

152, 252‧‧‧ second electrode

222a, 222b‧‧‧ nitride island pattern

224a, 224b‧‧‧ epitaxial layer

1A to 1C are flowcharts showing a method of manufacturing a light-emitting diode wafer according to a first embodiment of the present invention.

2A is a schematic view of a buffer layer according to a second embodiment of the present invention.

2B is a schematic view of a light emitting diode wafer according to a second embodiment of the present invention.

3A is a schematic view of a buffer layer according to a third embodiment of the present invention.

3B is a schematic view of a light emitting diode wafer according to a third embodiment of the present invention.

200a‧‧‧Light Diode Wafer

210‧‧‧Substrate

220a‧‧‧buffer layer

222a‧‧‧ nitride island pattern

224a‧‧‧ epitaxial layer

230‧‧‧Semiconductor component layer

232‧‧‧First type semiconductor layer

234‧‧‧Lighting layer

236‧‧‧Second type semiconductor layer

240‧‧‧current dispersion layer

250‧‧‧first electrode

252‧‧‧second electrode

Claims (15)

A light-emitting diode chip includes: a substrate; a buffer layer disposed on the substrate, wherein the buffer layer is made of a germanium-doped III-V compound semiconductor or a magnesium-doped III-V group a compound semiconductor; a semiconductor device layer disposed on the buffer layer; and a plurality of electrodes electrically connected to the semiconductor device layer; wherein the buffer layer comprises: an epitaxial layer; and a plurality of randomly distributed tantalum nitride layers An island pattern, wherein the tantalum nitride island patterns are disposed on the substrate and covered by the epitaxial layer. A light-emitting diode chip includes: a substrate; a buffer layer disposed on the substrate, wherein the buffer layer is made of a germanium-doped III-V compound semiconductor or a magnesium-doped III-V group a compound semiconductor layer; a semiconductor device layer disposed on the buffer layer; and a plurality of electrodes electrically connected to the semiconductor device layer; wherein the buffer layer comprises: an epitaxial layer disposed on the substrate; A randomly distributed tantalum nitride island pattern is disposed between the epitaxial layer and the semiconductor element layer. The light-emitting diode wafer of claim 1 or 2, wherein the substrate comprises an alumina substrate. The light-emitting diode wafer according to claim 1 or 2, wherein the material of the buffer layer comprises SiAlN, SiAlGaN, SiAlGaInN, SiAlInN, SiAlInBGaN, MgAlN, MgAlGaN, MgAlGaInN, MgAlInN or MgAlInBGaN. The illuminating diode chip of claim 1 or 2, wherein the semiconductor device layer comprises: a first type semiconductor layer disposed on the buffer layer; and a light emitting layer disposed on the first type semiconductor And a second type semiconductor layer disposed on the light emitting layer. The light-emitting diode chip according to claim 5, wherein the first-type semiconductor layer is an N-type semiconductor layer, and the second-type semiconductor layer is a P-type semiconductor layer. The light-emitting diode chip according to claim 5, wherein the first-type semiconductor layer is a P-type semiconductor layer, and the second-type semiconductor layer is an N-type semiconductor layer. The illuminating diode chip of claim 5, wherein the luminescent layer is a multiple quantum well luminescent layer. The illuminating diode chip of claim 5, wherein the electrodes comprise: a first electrode disposed on the first type semiconductor layer not covered by the luminescent layer, and the first type The semiconductor layer is electrically connected; and a second electrode is disposed on the second type semiconductor layer to be electrically connected to the second type semiconductor layer. A method of manufacturing a light emitting diode wafer, comprising: Forming a buffer layer on a substrate, the buffer layer material comprises a germanium-doped III-V compound semiconductor or a magnesium-doped III-V compound semiconductor; forming a semiconductor device layer on the buffer layer; And forming a plurality of electrodes on the semiconductor device layer; wherein the method for forming the buffer layer comprises: forming a plurality of randomly distributed tantalum island patterns on the substrate; and forming an epitaxial layer on the substrate, To cover the tantalum island pattern. A method for manufacturing a light-emitting diode wafer, comprising: forming a buffer layer on a substrate, the buffer layer material comprising a germanium-doped III-V compound semiconductor or a magnesium-doped III-V compound semiconductor Forming a semiconductor device layer on the buffer layer; and forming a plurality of electrodes on the semiconductor device layer; wherein the method of forming the buffer layer comprises: forming an epitaxial layer on the substrate; and forming the epitaxial layer on the epitaxial layer A plurality of randomly distributed tantalum nitride island patterns are formed. The method for manufacturing a light-emitting diode wafer according to claim 10, wherein the material of the buffer layer comprises SiAlN, SiAlGaN, SiAlGaInN, SiAlInN, SiAlInBGaN, MgAlN, MgAlGaN, MgAlGaInN, MgAlInN or MgAlInBGaN. A light-emitting diode as described in claim 10 or 11 A method of manufacturing a wafer, wherein the method of forming the tantalum nitride island pattern comprises an epitaxial process. The method for manufacturing a light-emitting diode wafer according to claim 10 or 11, wherein the method of forming the semiconductor device layer comprises: sequentially forming a first type semiconductor material layer and a luminescent material on the buffer layer. a layer and a second type semiconductor material layer; and patterning the second type semiconductor material layer, the luminescent material layer and the first type semiconductor material layer to form a first type semiconductor layer, a light emitting layer, and a second A semiconductor in which the light-emitting layer is disposed on a partial region of the first-type semiconductor layer, and the second-type semiconductor layer is disposed on the light-emitting layer. The method for fabricating a light-emitting diode wafer according to claim 10 or 11, wherein the method of forming the electrodes comprises: forming a first electrode on the first type semiconductor layer not covered by the light-emitting layer And electrically connecting to the first type semiconductor layer; and forming a second electrode on the second type semiconductor layer to be electrically connected to the second type semiconductor layer.