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TWI421837B - A driver circuit and a pixel circuit with the driver circuit - Google Patents

A driver circuit and a pixel circuit with the driver circuit Download PDF

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TWI421837B
TWI421837B TW99120252A TW99120252A TWI421837B TW I421837 B TWI421837 B TW I421837B TW 99120252 A TW99120252 A TW 99120252A TW 99120252 A TW99120252 A TW 99120252A TW I421837 B TWI421837 B TW I421837B
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transistor
switch
control
electrically connected
light emitting
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TW99120252A
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Chinese (zh)
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TW201201178A (en
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Chih Lung Lin
Chia Che Hung
Chia Sheng Li
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Univ Nat Cheng Kung
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Description

驅動電路及具有該驅動電路之畫素電路Driving circuit and pixel circuit having the same

本發明是有關於一種驅動電路及具有該驅動電路之畫素電路,特別是指一種可以改善臨界電壓漂移效應及發光元件老化之驅動電路及具有該驅動電路之畫素電路。The present invention relates to a driving circuit and a pixel circuit having the same, and particularly to a driving circuit capable of improving a threshold voltage drift effect and aging of a light emitting element, and a pixel circuit having the driving circuit.

一有機發光二極體(OLED)的亮度是與其驅動電流I OLED 成一正比例關係的。而目前當應用OLED於一顯示系統時,其與對應之驅動電路的連結仍普遍存在著以下的問題:一為驅動電路中的電晶體的臨界電壓可能因為製程變異的關係而造成漂移現象,導致OLED的驅動電流不穩定,進而使得OLED的亮度隨之發生不穩定的現象,其二為OLED因為材料老化或是長時間操作下,容易發生OLED兩端跨壓逐漸上升導致發光效率下降的問題,因為跨壓的上升會影響OLED的驅動電流發生衰減現象,而驅動電流衰減就會造成OLED亮度衰減。此外,現今技術中對於畫素補償電路的設計多半使用過多的電晶體,這將會使得畫素內開口率出現衰減甚至過低的現象,因此有必要找出一種可以有效抑制因電晶體臨界電壓漂移及OLED老化所造成的驅動電流衰減現象,使得OLED亮度得以保持穩定的方法,同時,又必須利用精簡的電路設計使得畫素開口率得以保持。The brightness of an organic light emitting diode (OLED) is proportional to its driving current I OLED . At present, when the OLED is applied to a display system, the connection with the corresponding driving circuit still has the following problems: First, the critical voltage of the transistor in the driving circuit may cause drift phenomenon due to the variation of the process, resulting in a drift phenomenon. The driving current of the OLED is unstable, which in turn causes the brightness of the OLED to be unstable. The second is that the OLED is prone to gradual increase in the luminous efficiency due to the aging of the OLED due to aging of the material or long-time operation. Because the rise of the across voltage will affect the attenuation of the driving current of the OLED, and the attenuation of the driving current will cause the brightness of the OLED to decay. In addition, in today's technology, the design of the pixel compensation circuit mostly uses too many transistors, which will cause the aperture ratio in the pixel to be attenuated or even too low. Therefore, it is necessary to find a kind of effective threshold voltage for the transistor. The driving current decay caused by drift and OLED aging makes the OLED brightness stable, and at the same time, the pixel aperture ratio must be maintained by using a simplified circuit design.

因此,本發明之目的,即在提供一種畫素電路,包含:一發光單元,具有一第一端與一第二端;及一驅動電路,包括:一第一電晶體,具有一第一端、一第二端,及一決定該第一端及該第二端是否導通的控制端;一電容;一第一開關,具有一第一端與一第二端;及一第二開關,具有一第一端與一第二端;其中,該發光單元之第一端接收一第一電源電壓及該第一電晶體之第二端接收一第二電源電壓,該第一開關之第一端與該第一電晶體之第一端電連接,該第一開關之第二端與該第一電晶體之控制端電連接,且該第一開關接收一第一控制訊號,以決定該第一電晶體之第一端、及控制端是否電連接,而該第二開關之第一端與該發光單元之第二端電連接,該第二開關之第二端與該第一電晶體之第一端電連接,且該第二開關接收一第二控制訊號,以決定該發光單元之第二端與該第一電晶體之第一端是否電連接,該電容之一端與該第一電晶體之控制端電連接,且該電容之另一端接收一資料電壓,並根據該第一開關及該第二開關之導通狀態以控制該發光單元之一驅動電流。Therefore, an object of the present invention is to provide a pixel circuit comprising: a light emitting unit having a first end and a second end; and a driving circuit comprising: a first transistor having a first end a second end, and a control end that determines whether the first end and the second end are conductive; a capacitor; a first switch having a first end and a second end; and a second switch having a first end and a second end; wherein the first end of the light emitting unit receives a first power voltage and the second end of the first transistor receives a second power voltage, the first end of the first switch The first end of the first switch is electrically connected to the first end of the first transistor, and the second end of the first switch is electrically connected to the control end of the first transistor, and the first switch receives a first control signal to determine the first The first end of the transistor and the control end are electrically connected, and the first end of the second switch is electrically connected to the second end of the light emitting unit, and the second end of the second switch is opposite to the first transistor One end is electrically connected, and the second switch receives a second control signal to determine the The second end of the unit is electrically connected to the first end of the first transistor, one end of the capacitor is electrically connected to the control end of the first transistor, and the other end of the capacitor receives a data voltage, and according to the first A switch and an on state of the second switch to control a driving current of one of the light emitting units.

此外,本發明另外提供一種驅動電路,用以控制一具有一第一端與一第二端之發光單元,其包含:一第一電晶體,具有一第一端、一第二端,及一決定 該第一端及該第二端是否導通的控制端;一電容;一第一開關,具有一第一端與一第二端;及一第二開關,具有一第一端與一第二端;一發光單元,具有一第一端與一第二端;及一驅動電路,包括:一第一電晶體,具有一第一端、一第二端,及一決定該第一端及該第二端是否導通的控制端;一電容;一第一開關,具有一第一端與一第二端;及一第二開關,具有一第一端與一第二端;其中,該發光單元之第一端接收一第一電源電壓及該第一電晶體之第二端接收一第二電源電壓,該第一開關之第一端與該第一電晶體之第一端電連接,該第一開關之第二端與該第一電晶體之控制端電連接,且該第一開關接收一第一控制訊號,以決定該第一電晶體之第一端、及控制端是否電連接,而該第二開關之第一端與該發光單元之第二端電連接,該第二開關之第二端與該第一電晶體之第一端電連接,且該第二開關接收一第二控制訊號,以決定該發光單元之第二端與該第一電晶體之第一端是否電連接,該電容之一端與該第一電晶體之控制端電連接,且該電容之另一端接收一資料電壓,並根據該第一開關及該第二開關之導通狀態以控制該發光單元之一驅動電流。In addition, the present invention further provides a driving circuit for controlling a light emitting unit having a first end and a second end, comprising: a first transistor having a first end, a second end, and a Decide a control end of the first end and the second end; a capacitor; a first switch having a first end and a second end; and a second switch having a first end and a second end An illuminating unit having a first end and a second end; and a driving circuit comprising: a first transistor having a first end and a second end, and a determining the first end and the first a second terminal is a conductive terminal; a capacitor; a first switch having a first end and a second end; and a second switch having a first end and a second end; wherein the light emitting unit The first end receives a first power voltage and the second end of the first transistor receives a second power voltage, and the first end of the first switch is electrically connected to the first end of the first transistor, the first The second end of the switch is electrically connected to the control end of the first transistor, and the first switch receives a first control signal to determine whether the first end of the first transistor and the control end are electrically connected, and the The first end of the second switch is electrically connected to the second end of the light emitting unit, and the second end of the second switch is The first end of the first transistor is electrically connected, and the second switch receives a second control signal to determine whether the second end of the light emitting unit is electrically connected to the first end of the first transistor. The control terminal of the first transistor is electrically connected, and the other end of the capacitor receives a data voltage, and controls the driving current of one of the light emitting units according to the conduction states of the first switch and the second switch.

此外,本發明另外提供一種畫素電路,包含: 一發光單元,具有一第一端與一第二端;及一驅動電路,包括:一第一電晶體,具有一第一端、一第二端,及一決定該第一端及該第二端是否導通的控制端;一電容;一第一開關,具有一第一端與一第二端;一第二開關,具有一第一端與一第二端;一第三開關,具有一第一端與一第二端;其中,該發光單元之第一端接收一第一電源電壓及該第一電晶體之第二端接收一第二電源電壓,該第一開關之第一端與該第一電晶體之第一端電連接,該第一開關之第二端與該第一電晶體之控制端電連接,且該第一開關接收一第一控制訊號,以決定該第一電晶體之第一端、及控制端是否電連接,而該第二開關之第一端與該發光單元之第二端電連接,該第二開關之第二端與該第一電晶體之第一端電連接,且該第二開關接收一第二控制訊號,以決定該發光單元之第二端與該第一電晶體之第一端是否電連接,該第三開關之第一端接收一資料電壓,且該第三開關之第二端與該第二開關之第一端、該發光單元之第二端電連接,該第三開關接收一第三控制訊號以決定該第三開關之第一端與第二端是否電連接,該電容之一端與該第一電晶體之控制端電連接,且該電容之另一端接收一資料電壓,並根據該第一開關之導通狀態以控制該發光單元之一驅動電流。In addition, the present invention further provides a pixel circuit comprising: An illuminating unit having a first end and a second end; and a driving circuit comprising: a first transistor having a first end and a second end, and a determining the first end and the second end a control terminal that is turned on; a capacitor; a first switch having a first end and a second end; a second switch having a first end and a second end; and a third switch having a first One end and a second end; wherein the first end of the light emitting unit receives a first power voltage and the second end of the first transistor receives a second power voltage, the first end of the first switch The first end of the first transistor is electrically connected, the second end of the first switch is electrically connected to the control end of the first transistor, and the first switch receives a first control signal to determine the first transistor The first end and the control end are electrically connected, and the first end of the second switch is electrically connected to the second end of the light emitting unit, the second end of the second switch and the first end of the first transistor Electrically connected, and the second switch receives a second control signal to determine the second end of the light emitting unit Whether the first end of the first transistor is electrically connected, the first end of the third switch receives a data voltage, and the second end of the third switch and the first end of the second switch, the first of the light emitting unit The second switch is electrically connected, and the third switch receives a third control signal to determine whether the first end and the second end of the third switch are electrically connected, and one end of the capacitor is electrically connected to the control end of the first transistor, and The other end of the capacitor receives a data voltage and controls a driving current of one of the light emitting units according to an on state of the first switch.

此外,本發明另外提供一種驅動電路,用以控制一具有一第一端與一第二端之發光單元,其包含:一第一電晶體,具有一第一端、一第二端,及一決定該第一端及該第二端是否導通的控制端;一電容;一第一開關,具有一第一端與一第二端;一第二開關,具有一第一端與一第二端;及一第三開關,具有一第一端與一第二端;其中,該發光單元之第一端接收一第一電源電壓及該第一電晶體之第二端接收一第二電源電壓,該第一開關之第一端與該第一電晶體之第一端電連接,該第一開關之第二端與該第一電晶體之控制端電連接,且該第一開關接收一第一控制訊號,以決定該第一電晶體之第一端、及控制端是否電連接,而該第二開關之第一端與該發光單元之第二端電連接,該第二開關之第二端與該第一電晶體之第一端電連接,且該第二開關接收一第二控制訊號,以決定該發光單元之第二端與該第一電晶體之第一端是否電連接,該第三開關之第一端接收一資料電壓,且該第三開關之第二端與該第二開關之第一端、該發光單元之第二端電連接,該第三開關接收一第三控制訊號以決定該第三開關之第一端與第二端是否電連接,該電容之一端與該第一電晶體之控制端電連接,且該電容之另一端接收一資料電壓,並根據該第一開關之導通狀態以控制該發光單元之一驅動電流。In addition, the present invention further provides a driving circuit for controlling a light emitting unit having a first end and a second end, comprising: a first transistor having a first end, a second end, and a a control end that determines whether the first end and the second end are conductive; a capacitor; a first switch having a first end and a second end; and a second switch having a first end and a second end And a third switch having a first end and a second end; wherein the first end of the light emitting unit receives a first power voltage and the second end of the first transistor receives a second power voltage The first end of the first switch is electrically connected to the first end of the first transistor, the second end of the first switch is electrically connected to the control end of the first transistor, and the first switch receives a first Controlling a signal to determine whether the first end of the first transistor and the control end are electrically connected, and the first end of the second switch is electrically connected to the second end of the light emitting unit, and the second end of the second switch Electrically connected to the first end of the first transistor, and the second switch receives a second control a signal to determine whether the second end of the light emitting unit is electrically connected to the first end of the first transistor, the first end of the third switch receives a data voltage, and the second end of the third switch The first end of the second switch is electrically connected to the second end of the light emitting unit, and the third switch receives a third control signal to determine whether the first end and the second end of the third switch are electrically connected, and the one end of the capacitor is The control terminal of the first transistor is electrically connected, and the other end of the capacitor receives a data voltage, and controls a driving current of one of the light emitting units according to an on state of the first switch.

有關本發明之前述及其他技術內容、特點與功效,在以下配合參考圖式之二個較佳實施例的詳細說明中,將可清楚的呈現。The above and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments of the invention.

在本發明被詳細描述之前,要注意的是,在以下的說明內容中,類似的元件是以相同的編號來表示。Before the present invention is described in detail, it is noted that in the following description, similar elements are denoted by the same reference numerals.

第一較佳實施例First preferred embodiment

在一面板中具有多數個畫素,並依其解析度的不同而有不同數量的列,舉例來說,一1920×1080解析度之面板具有1080個列,每一列上具有1920個畫素,而位於同一列的該等畫素電路是於同一週期資料輸入對應之資料電壓,因此,本實施例是一面板之第N列中的一畫素之畫素電路。There are a plurality of pixels in a panel, and there are different numbers of columns depending on the resolution. For example, a panel of 1920×1080 resolution has 1080 columns, and each column has 1920 pixels. The pixel circuits in the same column are the data voltages corresponding to the data input in the same period. Therefore, this embodiment is a pixel pixel in the Nth column of a panel.

參閱圖1,本發明之第一較佳實施例包含:一發光單元1、一驅動電路2,其中,該驅動電路2包括:一第一電晶體21、一第一開關、一第二開關,及一電容24,在本實施例中該發光單元1是一有機發光二極體(OLED),且該第一開關及第二開關分別以一第二電晶體22及一第三電晶體23據以實施之,下面說明針對上述該等電晶體皆以N型薄膜電晶體形式進行說明,但在本發明中舉凡P型薄膜電晶體、N型金屬氧化物半導體、P型金屬氧化物半導體皆得以簡易修改而據以實施之,因此不以N型薄膜電晶體為限。Referring to FIG. 1 , a first preferred embodiment of the present invention includes: a light emitting unit 1 and a driving circuit 2, wherein the driving circuit 2 includes: a first transistor 21, a first switch, and a second switch. And a capacitor 24, in the embodiment, the light-emitting unit 1 is an organic light-emitting diode (OLED), and the first switch and the second switch are respectively a second transistor 22 and a third transistor 23. In the following description, the above-mentioned transistors are all described in the form of N-type thin film transistors, but in the present invention, all of the P-type thin film transistors, N-type metal oxide semiconductors, and P-type metal oxide semiconductors are available. It is simply modified and implemented accordingly, so it is not limited to N-type thin film transistors.

每一電晶體21、22、23皆具有一第一端、一第二端,及一用以決定該第一端與該第二端是否導通之控制端。而 該發光單元具有一與一第一電源電壓V DD 電連接之第一端及一與該第三電晶體23之第一端電連接之第二端,該第一電晶體21之第一端與該第二電晶體22之第二端、該第三電晶體23之第二端電連接,該第一電晶體21之第二端電連接於一第二電源電壓V SS ,該第一電晶體21之控制端分別與該第二電晶體22之第一端及該電容24之一端電連接,該第二、第三電晶體22、23之控制端分別接收一第一控制訊號及一第二控制訊號,該電容24之另一端電連接於一資料電壓V DATA Each of the transistors 21, 22, 23 has a first end, a second end, and a control end for determining whether the first end and the second end are conductive. The light emitting unit has a first end electrically connected to a first power voltage V DD and a second end electrically connected to the first end of the third transistor 23, and the first end of the first transistor 21 The second end of the second transistor 22 is electrically connected to the second end of the second transistor 22, and the second end of the first transistor 21 is electrically connected to a second power voltage V SS , the first The control terminals of the second transistor 22 are electrically connected to the first end of the second transistor 22 and the one end of the capacitor 24. The control terminals of the second and third transistors 22 and 23 respectively receive a first control signal and a first The second control signal, the other end of the capacitor 24 is electrically connected to a data voltage V DATA .

其中,值得說明的是,因為該第二、第三電晶體22、23皆為一N型薄膜電晶體,因此,當該第一、第二控制訊號為高電位時,其對應之第二、第三電晶體22、23之第一端與第二端為導通狀態,反之,當該第一、第二控制訊號為低電位時,其對應之第二、第三電晶體22、23之第一端與第二端為不導通狀態。若是該等電晶體是以P型電晶體實現時,其控制訊號的電位狀態與對應之P型電晶體之關係即為反向之關係。It should be noted that, since the second and third transistors 22 and 23 are all N-type thin film transistors, when the first and second control signals are high, the corresponding second, The first end and the second end of the third transistor 22, 23 are in an on state; and when the first and second control signals are at a low level, the second and third transistors 22, 23 are corresponding One end and the second end are non-conductive. If the transistors are implemented in a P-type transistor, the relationship between the potential state of the control signal and the corresponding P-type transistor is inverse.

本實施例之畫素電路的操作模式說明如下:聯合參閱圖1、2,首先,該第一、第二控制訊號皆被設定為高電位,因此,該第二、第三電晶體22、23皆被導通,其中該第一電晶體21之第一端及其控制端上的電壓皆為V DD -V OLED V OLED 為該發光單元1(即為一有機發光二極體)之第一端及第二端間的跨壓,因此該電容24之兩端電壓差為V DATA -(V DD -V OLED ),V DATA 為該資料電壓。The operation mode of the pixel circuit of this embodiment is as follows: Referring to FIG. 1 and FIG. 2 together, first, the first and second control signals are all set to a high potential, and therefore, the second and third transistors 22, 23 All of the first transistor 21 and the voltage at the control terminal thereof are V DD - V OLED , and the V OLED is the first of the light-emitting unit 1 (ie, an organic light-emitting diode) The voltage across the terminal and the second terminal is such that the voltage difference across the capacitor 24 is V DATA -( V DD - V OLED ), and V DATA is the data voltage.

當該電容24充電至V DATA -(V DD -V OLED )後,該畫素電路將操作於一補償模式,此時第二控制訊號被設定為低電位,使得該第三電晶體23不導通,因此該電容24透過該第一電晶體21開始進行放電,直到該第一電晶體21之控制端的電壓放電至V SS +V TH 1 時(V TH 1 為該第一電晶體21之臨界電壓),該第一電晶體21切換為不導通狀態,此時該電容24之兩端電壓差為V DATA -(V SS +V TH 1 ),然後,該第一控制訊號被設定為低電位,使得該第二電晶體22不導通,因此,該電容24因沒有放電路徑使得其兩端電壓差被保持於V DATA -(V SS +V TH 1 ),故該畫素電路中的電容24二端電壓可以保持不變,也就是說,第N列之該等畫素電路中的電容二端電壓皆保持不變。When the capacitor 24 is charged to V DATA -( V DD - V OLED ), the pixel circuit will operate in a compensation mode, at which time the second control signal is set to a low potential, so that the third transistor 23 is not turned on. , so that the capacitor 2421 begins to discharge through the first transistor until the voltage of the control terminal 21 of the first transistor is discharged to V SS + V TH 1 when (V TH 1 for the first transistor 21 of the voltage threshold The first transistor 21 is switched to a non-conducting state. At this time, the voltage difference between the capacitors 24 is V DATA -( V SS + V TH 1 ), and then the first control signal is set to a low potential. The second transistor 22 is made non-conducting. Therefore, the capacitor 24 has a voltage difference between the two terminals because the voltage difference is maintained at V DATA -( V SS + V TH 1 ), so the capacitor 24 in the pixel circuit The terminal voltage can be kept constant, that is, the voltages at the two terminals of the pixel circuits in the Nth column remain unchanged.

然後,第N+1列畫素電路所對應之第二、第一控制訊號依序被設定為低電位,使其電容24的兩端電壓差可以保持固定,依次類推,直到最後一列畫素電路的電容24的兩端電壓差保持固定。Then, the second and first control signals corresponding to the N+1th column pixel circuit are sequentially set to a low potential, so that the voltage difference between the two ends of the capacitor 24 can be kept fixed, and so on, until the last column of pixel circuits The voltage difference across the capacitor 24 remains fixed.

然後,該畫素電路操作於一發光模式,每一列畫素電路的第二控制訊號同時被設定為高電位,使得對應之第三電晶體23導通,而資料電壓同時亦增加一發光電壓△V ,此時,該第一電晶體21之控制端電壓為V SS +V TH 1 +△V ,因此,根據下列方程式得以計算出該發光單元1之驅動電流I OLED 如下:I OLED =K (V GS -V TH 1 )2 =K (V SS +V TH 1 +△V -V SS -V TH 1 )2I OLED =K (△V )2 .....(F .1)Then, the pixel circuit operates in a light emitting mode, a second control signal in each pixel circuit row is set to the high potential simultaneously, so that the crystal 23 corresponding to the third electrically conductive, and a data voltage emission but also increases a voltage △ V At this time, the control terminal voltage of the first transistor 21 is V SS + V TH 1 + Δ V . Therefore, the driving current I OLED of the light-emitting unit 1 is calculated according to the following equation: I OLED = K ( V GS - V TH 1 ) 2 = K ( V SS + V TH 1 + Δ V - V SS - V TH 1 ) 2I OLED = KV ) 2 ..... ( F .1)

由上式可知,該發光單元1之驅動電流I OLED 與該發光電壓之平方成正比例關係,因此,該發光單元1之驅動電流I OLED 與該第一電晶體21之臨界電壓V TH 1 無關,所以可以避免該第一電晶體21因為製程上的差異或是其長時間操作導致發生變異後,其臨界電壓V TH 1 對於該驅動電流I OLED 的影響。此外,在本電路中,由於僅使用三個電晶體,故可以大幅提昇畫素開口率。From the above equation, the square drive of the light emitting unit 1 and the emission current I OLED voltage proportional relationship, therefore, the light emitting unit of a driving current I OLED of the first transistor and the threshold voltage V TH 1 21 independent, Therefore, the influence of the threshold voltage V TH 1 on the driving current I OLED after the first transistor 21 is mutated due to a difference in process or long-term operation thereof can be avoided. Further, in the present circuit, since only three transistors are used, the aperture ratio of the pixel can be greatly improved.

第二較佳實施例Second preferred embodiment

參閱圖3,該第二較佳實施例與第一較佳實施例最大的不同在於,本實施例增加一第三開關,相同於該第一、第二開關22、23,本實施例中該第三開關是以一第四電晶體25實現,其中,該第四電晶體25亦為一N型薄膜電晶體,但不以此為限。Referring to FIG. 3, the second preferred embodiment is different from the first preferred embodiment in that a third switch is added in the embodiment, which is the same as the first and second switches 22 and 23. In this embodiment, The third switch is implemented by a fourth transistor 25, wherein the fourth transistor 25 is also an N-type thin film transistor, but is not limited thereto.

該第四電晶體25具有一與該電容24一端電連接之第一端、一分別與該發光單元1之第二端與該第三電晶體23之第一端電連接之第二端,及一接收並根據一第三控制訊號以決定其第一端與第二端是否導通之控制端。The fourth transistor 25 has a first end electrically connected to one end of the capacitor 24, a second end electrically connected to a second end of the light emitting unit 1 and a first end of the third transistor 23, and A control terminal that receives and determines whether the first end and the second end are conductive according to a third control signal.

本實施例在該畫素電路操作於補償模式之前,先執行一偵錯模式如下:當一具有該第三開關之畫素電路操作於該偵錯模式時,該第一、第二控制訊號設定為低電位、該第三控制訊號設定為高電位,因此,該第二、第三電晶體22、23為不導通狀態,該第四電晶體25為導通狀態,此時,當該第四電 晶體25之第一端接收一資料電壓(此時該資料電壓為輸入的一參考電壓值V REF )時,換句話說,當該畫素電路操作於偵錯模式時,會先輸入一參考電壓值V REF 至該第四電晶體25以對該發光單元進行偵錯,此時,該發光單元1之兩端跨壓為V DD -V REF ,此時,根據該發光單元1之跨壓即可計算出該發光單元1之驅動電流I REAL ,然後再根據該發光單元1之理想驅動電流I IDEAL 即可計算出一電流衰減率如下: In this embodiment, before the pixel circuit operates in the compensation mode, a debug mode is first executed as follows: when a pixel circuit having the third switch operates in the debug mode, the first and second control signals are set. For the low potential, the third control signal is set to a high potential. Therefore, the second and third transistors 22 and 23 are in a non-conducting state, and the fourth transistor 25 is in a conducting state. At this time, when the fourth electrode is When the first end of the crystal 25 receives a data voltage (when the data voltage is an input reference voltage value V REF ), in other words, when the pixel circuit operates in the debug mode, a reference voltage is input first. The value V REF is applied to the fourth transistor 25 to detect the light-emitting unit. At this time, the voltage across the light-emitting unit 1 is V DD - V REF , and at this time, according to the voltage across the light-emitting unit 1 The driving current I REAL of the light-emitting unit 1 can be calculated, and then a current decay rate can be calculated according to the ideal driving current I IDEAL of the light-emitting unit 1 as follows:

其中,α 為電流衰減率。Where α is the current decay rate.

因此,當該發光單元1因為材料老化或是使用時間過長等因素造成驅動電流出現衰減現象時,可以利用上述之電流衰減率進行補償,其補償方式如下所述:舉例來說,假設該發光單元1之亮度衰減率為0.6,則該發光單元1之驅動電流修正公式如下: Therefore, when the driving unit 1 is attenuated due to factors such as aging of materials or excessive use time, the current attenuation rate can be compensated by the above-mentioned current attenuation rate, and the compensation method is as follows: for example, the illuminating is assumed The brightness decay rate of the unit 1 is 0.6, and the driving current correction formula of the light-emitting unit 1 is as follows:

其中,為修正後的驅動電流。among them, For the corrected drive current.

根據方程式(F .1),驅動電流是跟發光電壓的平方成正比例關係,因此,方程式(F .3)可以修改成如下所示: The equation (F .1), with the square of the light emission drive current is a voltage proportional relationship, therefore, the equation (F .3) can be modified as follows:

因為,△V =V peak -V DATA ,且△V * =V peak -V DATA * ,其中,V peak 為該資料電壓V DATA 加上該發光電壓△V 之和。Because Δ V = V peak - V DATA , and Δ V * = V peak - V DATA * , where V peak is the sum of the data voltage V DATA plus the illuminating voltage Δ V .

所以,方程式(F .4)可以修改成如下所示: Therefore, the equation (F .4) can be modified as follows:

因此,該發光單元1操作於該偵錯模式,即可得知為因應其材料老化等因素所造成的驅動電流衰減現象,該資料電壓的修正方程式,故藉由本實施例可以避免該發光單元的老化導致的驅動電流衰減,造成該發光單元1的亮度同步出現衰減的現象。Therefore, the illumination unit 1 is operated in the debug mode, and the drive current attenuation phenomenon caused by factors such as aging of the material is obtained, and the correction formula of the data voltage is used. Therefore, the illumination unit can be avoided by the embodiment. Attenuation of the driving current caused by aging causes a phenomenon in which the luminance of the light-emitting unit 1 is simultaneously attenuated.

最後,該第三控制訊號設定為低電位,使該第四電晶體25不導通,然後輸入該資料電壓並同時設定該第一、第二控制訊號為高電位,使得該畫素電路如同該第一較佳實施例所述依序執行於該補償模式、發光模式,以驅動該發光單元1。Finally, the third control signal is set to a low potential, so that the fourth transistor 25 is not turned on, and then the data voltage is input and the first and second control signals are set to be high, so that the pixel circuit is like the first In a preferred embodiment, the compensation mode and the illumination mode are sequentially performed to drive the illumination unit 1.

綜上所述,藉由本發明之設計,可以有效避免因製程變異或是使用時間過長所造成的電晶體臨界電壓漂移效應,使得該畫素電路不會因為該臨界電壓漂移效應而影響發光效率,同時可以有效避免如一有機發光二極體的材料老化現象所造成驅動電流衰減,進而導致其發光亮度衰減的現象,此外,本發明之設計相當精簡,利用三至四顆電晶體及可達到上述目的,因此不會大幅影響開口率,故確實能達成本發明之目的。In summary, the design of the present invention can effectively avoid the critical voltage drift effect of the transistor caused by process variation or long use time, so that the pixel circuit does not affect the luminous efficiency due to the threshold voltage drift effect. At the same time, the driving current decay caused by the aging phenomenon of the organic light emitting diode can be effectively avoided, thereby causing the phenomenon that the light emitting brightness is attenuated. In addition, the design of the present invention is quite simple, and three to four transistors can be used to achieve the above purpose. Therefore, the aperture ratio is not greatly affected, so the object of the present invention can be achieved.

惟以上所述者,僅為本發明之較佳實施例而已,當不 能以此限定本發明實施之範圍,即大凡依本發明申請專利範圍及發明說明內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。However, the above is only the preferred embodiment of the present invention, when not The scope of the invention is to be construed as being limited by the scope of the invention and the scope of the invention.

1‧‧‧發光單元1‧‧‧Lighting unit

2‧‧‧驅動電路2‧‧‧Drive circuit

21‧‧‧第一電晶體21‧‧‧First transistor

22‧‧‧第二電晶體22‧‧‧Second transistor

23‧‧‧第三電晶體23‧‧‧ Third transistor

24‧‧‧電容24‧‧‧ Capacitance

25‧‧‧第四電晶體25‧‧‧ Fourth transistor

圖1是本發明之第一較佳實施例之電路圖;圖2是該第一較佳實施例之時序圖;及圖3是本發明之第一較佳實施例之電路圖。1 is a circuit diagram of a first preferred embodiment of the present invention; FIG. 2 is a timing diagram of the first preferred embodiment; and FIG. 3 is a circuit diagram of a first preferred embodiment of the present invention.

1‧‧‧發光單元1‧‧‧Lighting unit

2‧‧‧驅動電路2‧‧‧Drive circuit

21‧‧‧第一電晶體21‧‧‧First transistor

22‧‧‧第二電晶體22‧‧‧Second transistor

23‧‧‧第三電晶體23‧‧‧ Third transistor

24‧‧‧電容24‧‧‧ Capacitance

Claims (23)

一種畫素電路,包含:一發光單元,具有一第一端與一第二端;及一驅動電路,包括:一第一電晶體,具有一第一端、一第二端,及一決定該第一端及該第二端是否導通的控制端;一電容;一第一開關,具有一第一端與一第二端;一第二開關,具有一第一端與一第二端;一第三開關,具有一第一端與一第二端;其中,該發光單元之第一端接收一第一電源電壓及該第一電晶體之第二端接收一第二電源電壓,該第一開關之第一端與該第一電晶體之第一端電連接,該第一開關之第二端與該第一電晶體之控制端電連接,且該第一開關接收一第一控制訊號,以決定該第一電晶體之第一端、及控制端是否電連接,而該第二開關之第一端與該發光單元之第二端電連接,該第二開關之第二端與該第一電晶體之第一端電連接,且該第二開關接收一第二控制訊號,以決定該發光單元之第二端與該第一電晶體之第一端是否電連接,該第三開關之第一端接收一資料電壓,且該第三開關之第二端與該第二開關之第一端、該發光單元之第二端電連接,該第三開關接收一第三控制訊號以決定該第三開關之第一端與第二端是否電連接,該電容之一端與該第一電晶體之控制端電連接,且該電 容之另一端接收一資料電壓,並根據該第一開關之導通狀態以控制該發光單元之一驅動電流。 A pixel circuit includes: a light emitting unit having a first end and a second end; and a driving circuit comprising: a first transistor having a first end, a second end, and a determining a first end and a second end of the control end; a capacitor; a first switch having a first end and a second end; a second switch having a first end and a second end; The third switch has a first end and a second end; wherein the first end of the light emitting unit receives a first power voltage and the second end of the first transistor receives a second power voltage, the first The first end of the switch is electrically connected to the first end of the first transistor, the second end of the first switch is electrically connected to the control end of the first transistor, and the first switch receives a first control signal, Determining whether the first end of the first transistor and the control end are electrically connected, and the first end of the second switch is electrically connected to the second end of the light emitting unit, and the second end of the second switch a first end of a transistor is electrically connected, and the second switch receives a second control signal to determine The second end of the third switch is electrically connected to the first end of the first transistor, the first end of the third switch receives a data voltage, and the second end of the third switch and the second switch One end of the light emitting unit is electrically connected to the second end of the light emitting unit, and the third switch receives a third control signal to determine whether the first end and the second end of the third switch are electrically connected, and one end of the capacitor and the first end The control end of the crystal is electrically connected, and the electric The other end of the capacitor receives a data voltage and controls the driving current of one of the light emitting units according to the conduction state of the first switch. 依據申請專利範圍第1項所述之畫素電路,在一偵錯模式操作,其中,當該畫素電路操作於該偵錯模式時,分別設定該第一、第二、第三控制訊號,使得該第一、第二開關不導通、該第三開關導通,然後將一參考電壓傳送至該發光單元之第二端。 According to the pixel circuit of claim 1, in a debug mode, wherein the first, second, and third control signals are respectively set when the pixel circuit operates in the debug mode. The first switch and the second switch are not turned on, the third switch is turned on, and then a reference voltage is transmitted to the second end of the light emitting unit. 依據申請專利範圍第2項所述之畫素電路,在一補償模式及一發光模式操作,其中,當該畫素電路操作於該補償模式時,分別設定該第一、第二、第三控制訊號,使得該第一開關導通且該第二、第三開關不導通,直到該第一電晶體之控制端電壓放電至該第二電源電壓加上一臨界電壓值;當該畫素電路操作於該發光模式時,分別設定該第一、第二、第三控制訊號,使得該第一、第三開關不導通且該第二開關導通,並將該資料電壓增加一發光電壓,以控制該發光單元之驅動電流與該發光電壓之平方成正比例關係。 According to the pixel circuit of claim 2, the pixel circuit operates in a compensation mode and an illumination mode, wherein the first, second, and third controls are respectively set when the pixel circuit operates in the compensation mode. a signal, the first switch is turned on and the second and third switches are not turned on until the control terminal voltage of the first transistor is discharged to the second power voltage plus a threshold voltage value; when the pixel circuit operates In the illuminating mode, the first, second, and third control signals are respectively set, so that the first and third switches are not turned on and the second switch is turned on, and the data voltage is increased by a illuminating voltage to control the illuminating. The drive current of the unit is proportional to the square of the illuminating voltage. 依據申請專利範圍第3項所述之畫素電路,在一補償模式操作,其中更包括當該第一電晶體之控制端電壓降至該第二電源電壓加上一臨界電壓值後,設定該第一控制訊號使得該第一開關為不導通。 The pixel circuit of claim 3, operating in a compensation mode, further comprising setting the control terminal voltage of the first transistor to the second power voltage plus a threshold voltage value The first control signal makes the first switch non-conductive. 依據申請專利範圍第1項所述之畫素電路,其中,該第一開關包括一具有一第一端、一第二端、一控制端之第 二電晶體,該第二電晶體之第一、第二端分別與該第一電晶體之第一端、控制端電連接,且該第二電晶體之控制端用以接收該第一控制訊號。 The pixel circuit of claim 1, wherein the first switch comprises a first end, a second end, and a control end a second transistor, wherein the first end and the second end of the second transistor are respectively electrically connected to the first end and the control end of the first transistor, and the control end of the second transistor is configured to receive the first control signal . 依據申請專利範圍第1項所述之畫素電路,其中,該第二開關包括一具有一第一端、一第二端、一控制端之第三電晶體,該第三電晶體之第一、第二端分別與該發光單元之第二端、該第一電晶體之第一端電連接,且該第三電晶體之控制端用以接收該第二控制訊號。 The pixel circuit of claim 1, wherein the second switch comprises a third transistor having a first end, a second end, and a control end, the first of the third transistors The second end is electrically connected to the second end of the light emitting unit and the first end of the first transistor, and the control end of the third transistor is configured to receive the second control signal. 依據申請專利範圍第1項所述之畫素電路,其中,該第三開關包括一具有一第一端、一第二端、一控制端之第四電晶體,該第四電晶體之第一、第二端分別與該資料電壓及該發光單元之第二端電連接,且該第四電晶體之控制端用以接收該第三控制訊號。 The pixel circuit of claim 1, wherein the third switch comprises a fourth transistor having a first end, a second end, and a control end, the first of the fourth transistors The second end is electrically connected to the data voltage and the second end of the light emitting unit, and the control end of the fourth transistor is configured to receive the third control signal. 依據申請專利範圍第1項所述之畫素電路,其中,該發光單元為一有機發光二極體。 The pixel circuit of claim 1, wherein the light emitting unit is an organic light emitting diode. 依據申請專利範圍第1項所述之畫素電路,其中,該第一電晶體為N型薄膜電晶體。 The pixel circuit of claim 1, wherein the first transistor is an N-type thin film transistor. 依據申請專利範圍第1項所述之畫素電路,其中,該第一電晶體為P型薄膜電晶體。 The pixel circuit of claim 1, wherein the first transistor is a P-type film transistor. 依據申請專利範圍第1項所述之畫素電路,其中,該第一電晶體為N型金屬氧化物半導體。 The pixel circuit of claim 1, wherein the first transistor is an N-type metal oxide semiconductor. 依據申請專利範圍第1項所述之畫素電路,其中,該第一電晶體為P型金屬氧化物半導體。 The pixel circuit of claim 1, wherein the first transistor is a P-type metal oxide semiconductor. 一種驅動電路,用以控制一具有一第一端與一第二端之 發光單元,其包含:一第一電晶體,具有一第一端、一第二端,及一決定該第一端及該第二端是否導通的控制端;一電容;一第一開關,具有一第一端與一第二端;一第二開關,具有一第一端與一第二端;及一第三開關,具有一第一端與一第二端;其中,該發光單元之第一端接收一第一電源電壓及該第一電晶體之第二端接收一第二電源電壓,該第一開關之第一端與該第一電晶體之第一端電連接,該第一開關之第二端與該第一電晶體之控制端電連接,且該第一開關接收一第一控制訊號,以決定該第一電晶體之第一端、及控制端是否電連接,而該第二開關之第一端與該發光單元之第二端電連接,該第二開關之第二端與該第一電晶體之第一端電連接,且該第二開關接收一第二控制訊號,以決定該發光單元之第二端與該第一電晶體之第一端是否電連接,該第三開關之第一端接收一資料電壓,且該第三開關之第二端與該第二開關之第一端、該發光單元之第二端電連接,該第三開關接收一第三控制訊號以決定該第三開關之第一端與第二端是否電連接,該電容之一端與該第一電晶體之控制端電連接,且該電容之另一端接收一資料電壓,並根據該第一開關之導通狀態以控制該發光單元之一驅動電流。 a driving circuit for controlling a first end and a second end The light-emitting unit includes: a first transistor having a first end, a second end, and a control end determining whether the first end and the second end are conductive; a capacitor; a first switch having a first end and a second end; a second switch having a first end and a second end; and a third switch having a first end and a second end; wherein the light emitting unit is Receiving a first power voltage at one end and receiving a second power voltage at a second end of the first transistor, the first end of the first switch is electrically connected to the first end of the first transistor, the first switch The second end is electrically connected to the control end of the first transistor, and the first switch receives a first control signal to determine whether the first end of the first transistor and the control end are electrically connected, and the first The first end of the second switch is electrically connected to the second end of the light emitting unit, the second end of the second switch is electrically connected to the first end of the first transistor, and the second switch receives a second control signal. Determining whether the second end of the light emitting unit is electrically connected to the first end of the first transistor, The first end of the third switch receives a data voltage, and the second end of the third switch is electrically connected to the first end of the second switch and the second end of the light emitting unit, and the third switch receives a third control signal Determining whether the first end and the second end of the third switch are electrically connected, one end of the capacitor is electrically connected to the control end of the first transistor, and the other end of the capacitor receives a data voltage, and according to the first The on state of the switch controls the driving current of one of the light emitting units. 依據申請專利範圍第13項所述之驅動電路,在一偵錯模 式操作,其中,當該驅動電路操作於該偵錯模式時,分別設定該第一、第二、第三控制訊號,使得該第一、第二開關不導通、該第三開關導通,然後將一參考電壓傳送至該發光單元之第二端。 According to the driving circuit described in claim 13 of the patent application, in a debugging mode The operation, wherein when the driving circuit operates in the debugging mode, the first, second, and third control signals are respectively set, so that the first and second switches are not turned on, the third switch is turned on, and then A reference voltage is transmitted to the second end of the lighting unit. 依據申請專利範圍第14項所述之驅動電路,在一補償模式及一發光模式操作,其中,當該驅動電路操作於該補償模式時,分別設定該第一、第二、第三控制訊號,使得該第一開關導通且該第二、第三開關不導通,直到該第一電晶體之控制端電壓放電至該第二電源電壓加上一臨界電壓值;當該驅動電路操作於該發光模式時,分別設定該第一、第二、第三控制訊號,使得該第一、第三開關不導通且該第二開關導通,並將該資料電壓增加一發光電壓,以控制該發光單元之驅動電流與該發光電壓之平方成正比例關係。 The driving circuit according to claim 14 is operated in a compensation mode and an illumination mode, wherein when the driving circuit operates in the compensation mode, the first, second, and third control signals are respectively set. The first switch is turned on and the second and third switches are not turned on until the control terminal voltage of the first transistor is discharged to the second power voltage plus a threshold voltage value; when the driving circuit operates in the light emitting mode The first, second, and third control signals are respectively set, so that the first and third switches are not turned on and the second switch is turned on, and the data voltage is increased by a light-emitting voltage to control driving of the light-emitting unit. The current is proportional to the square of the illuminating voltage. 依據申請專利範圍第15項所述之驅動電路,在一補償模式操作,其中更包括當該第一電晶體之控制端電壓降至該第二電源電壓加上一臨界電壓值後,設定該第一控制訊號使得該第一開關為不導通。 The driving circuit according to claim 15 of the invention, operating in a compensation mode, further comprising: setting the first voltage of the first transistor to the second power voltage plus a threshold voltage value A control signal causes the first switch to be non-conducting. 依據申請專利範圍第13項所述之驅動電路,其中,該第一開關包括一具有一第一端、一第二端、一控制端之第二電晶體,該第二電晶體之第一、第二端分別與該第一電晶體之第一端、控制端電連接,且該第二電晶體之控制端用以接收該第一控制訊號。 The driving circuit of claim 13, wherein the first switch comprises a second transistor having a first end, a second end, and a control end, the first of the second transistors, The second end is electrically connected to the first end and the control end of the first transistor, and the control end of the second transistor is configured to receive the first control signal. 依據申請專利範圍第13項所述之驅動電路,其中,該第二開關包括一具有一第一端、一第二端、一控制端之第三電晶體,該第三電晶體之第一、第二端分別與該發光單元之第二端、該第一電晶體之第一端電連接,且該第三電晶體之控制端用以接收該第二控制訊號。 The driving circuit of claim 13, wherein the second switch comprises a third transistor having a first end, a second end, and a control end, the first of the third transistors, The second end is electrically connected to the second end of the light emitting unit and the first end of the first transistor, and the control end of the third transistor is configured to receive the second control signal. 依據申請專利範圍第13項所述之驅動電路,其中,該第三開關包括一具有一第一端、一第二端、一控制端之第四電晶體,該第四電晶體之第一、第二端分別與該資料電壓及該發光單元之第二端電連接,且該第四電晶體之控制端用以接收該第三控制訊號。 The driving circuit of claim 13, wherein the third switch comprises a fourth transistor having a first end, a second end, and a control end, the first of the fourth transistors, The second end is electrically connected to the data voltage and the second end of the light emitting unit, and the control end of the fourth transistor is configured to receive the third control signal. 依據申請專利範圍第13項所述之驅動電路,其中,該第一電晶體為一N型薄膜電晶體。 The driving circuit of claim 13, wherein the first transistor is an N-type thin film transistor. 依據申請專利範圍第13項所述之驅動電路,其中,該第一電晶體為一P型薄膜電晶體。 The driving circuit of claim 13, wherein the first transistor is a P-type thin film transistor. 依據申請專利範圍第13項所述之驅動電路,其中,該第一電晶體為一N型金屬氧化物半導體。 The driving circuit of claim 13, wherein the first transistor is an N-type metal oxide semiconductor. 依據申請專利範圍第13項所述之驅動電路,其中,該第一電晶體為一P型金屬氧化物半導體。 The driving circuit of claim 13, wherein the first transistor is a P-type metal oxide semiconductor.
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