TWI417888B - An embedded chip system, a method for burning a wafer, and a computer program product - Google Patents

Description

Embedded burning chip system, method for burning wafers and computer program product

The present invention relates to a method of burning a wafer, and more particularly to a method of burning a non-gate flash memory.

In today's computer architecture, the general motherboard is equipped with a plurality of wafers with Surface Mount Technology (SMT), which are flash memories with different programs or information. These programs and information are important software for the computer to perform various tasks, such as Basic Input Output System (BIOS), Media Access Control address (MAC address) and so on.

During the motherboard manufacturing process, these flash memory chips are usually burned and then laid out on the motherboard, but this method is only applicable to non-gate flash memory in flash memory (below) Referring to Nor Flash), when used in another non-gate flash memory (hereinafter referred to as Nand Flash), it is easy to have a bad area problem, so if you don't know the location of the bad area first, you can directly program the program. Into Nand Flash, it may burn into a defective program. When the central processing unit (CPU) executes the missing program in the future, it will have a chance of a fatal error and crash.

One of the ways to solve this problem is to first burn the program that executes part of the boot action and the program of the burn action into Nor Flash, and then deploy it on the motherboard along with many blank Nand Flash. The motherboard uses this Nor. Flash performs part of the boot initialization operation, then executes the burning program, checks the bad area of Nand Flash, and burns the software corresponding to these Nand Flash.

Although the above method can solve the problem that the program burned into the Nand Flash may be deficient, the Nor Flash of the program containing the partial boot action and the programming action will be burned after the Nand Flash is burned. Losing the effect is equivalent to installing a non-functional chip to increase costs.

In order to avoid burning out the defective program, there is another way to burn Nand Flash, which is to directly use a computer that has been connected to the socket for plugging in the Nand Flash to be burned. Flash performs the burning action, and then the Nand Flash is laid on the motherboard. However, this method has another problem. If the Nand Flash computer is programmed with the target motherboard, the software environment or hardware environment is different. Or incompatible, the motherboard produced will not be able to read the information stored in Nand Flash because of the specific formatted magnetic area or file management system required.

Accordingly, it is an object of the present invention to provide a method of programming a wafer that avoids burning out a non-gate flash memory carrying a defect program.

Therefore, the method for burning a wafer of the present invention is suitable for burning a software onto a non-gate flash memory to be attached to a target motherboard, the non-gate flash memory having a plurality of bad regions Block and a plurality of normal blocks, the method comprising the steps of: first checking physical addresses of the bad blocks of the non-gate flash memory; and then performing the normal areas of the non-gate flash memory The block is divided into a plurality of divided regions; then the divided regions are planned according to the specification requirements of the target motherboard; and then the software is loaded into the corresponding divided regions in the divided regions according to the specification requirements of the target motherboard in.

Another object of the present invention is to provide an embedded programming wafer system that avoids burning out the non-gate flash memory carrying the defect program.

Therefore, the embedded flash wafer system of the present invention is suitable for burning a software onto a non-gate flash memory to be attached to a target motherboard, the non-gate flash memory having a plurality of bad sectors And a plurality of normal blocks, the system comprising a memory unit, an input/output interface unit, and a processing unit electrically connecting the memory unit and the input/output interface unit respectively; the memory unit carries the software; the input and output The interface unit is configured to electrically connect the non-gate flash memory; the processing unit is configured to first check a physical address of the bad block of the non-gate flash memory, and the flash memory of the non-gate flash memory The normal blocks are divided into a plurality of divided regions, and then the divided regions are planned according to the specification requirements of the target motherboard, and then the software is loaded into the divided regions according to the specification requirements of the target motherboard. Corresponding to a divided area.

The effect of the invention is that before the software is burned in the flash memory of the non-gate flash memory, the bad block management of the non-gate flash memory is first performed, and it is checked which are the bad blocks and which are the normal areas. Blocks, when burning software, can avoid burning in bad blocks, resulting in the loss of information or programs read from non-gate flash memory.

The above and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments.

Referring to FIG. 1, FIG. 1 is a block diagram of a system of a preferred embodiment of an embedded flash wafer system 10 of the present invention. This embodiment is an embedded system dedicated to burning the software required for the operation of the computer in the non-gate flash memory (hereinafter referred to as Nand Flash), although the Nand Flash is faster than the non-gate or the gate. Flash memory (hereafter referred to as Nor Flash) has many advantages, such as low cost, fast writing speed, etc., but due to its process relationship, there will be about 1% of bad blocks, so it used to be burned in the past. Nor Flash burning device or burning method that does not have bad block problems is no longer suitable for burning Nand Flash.

The embedded programming chip system 10 includes a memory unit 13, an I/O interface unit, a network communication unit 11, a user interface unit (UI), and a separate power unit. A processing unit 14 is connected to the memory unit 13, the input/output interface unit 12, the network communication unit 11, and the user interface unit 15. In this embodiment, the input/output interface unit 12 is for unplugging and unplugging a Nand Flash 91 to be attached to a target motherboard (not shown), which can be software (program, information, etc.) Transfer to Nand Flash 91, or read the software burned in Nand Flash 91. It should be noted that the memory unit 13 of the present embodiment stores a booting program 133 that is useful for the processing unit 14 to read out and perform a booting operation, and a burning program for the processing unit 14 to read out and perform subsequent burning operations. The program 134 can be a non-volatile memory such as a hard disk drive (HDD), a solid state drive (SSD) or a read only memory (ROM) or a combination of a plurality of non-volatile memories, except the aforementioned program. In addition, the software 131 to be burned to the Nand Flash 91 is stored, and the cost and the space required for storing the software 131 and the associated record file 132 are selected to select a suitable and low-cost memory model.

In the embodiment, the user interface unit 15 includes an indicator light 151 and a button 152. The processing unit 14 can indicate the burning status of the non-gate flash memory 91 by controlling the blinking of the indicator light. In the embodiment, the button group 152 is used by the user (or the work machine) to select the button after the Nand Flash 91 is plugged into the input/output interface unit 12, so that the processing unit 14 receives an indication. The instruction of the corresponding flashing operation is performed on the non-gate flash memory 91. The meaning of the instruction is that the processing unit 14 is informed that the Nand Flash 91 has been plugged into the input/output interface unit 12, and the subsequent corresponding burning program is to be continued. It should be noted that there are many application modes of the user interface unit 15 in the embedded burning wafer system 10, and the main function thereof is to enable the user (or the working machine) to know the non-gate flash memory. The burning state of 91, and may also indicate the burning operation of the non-gate flash memory 91, the application state should not be limited to the embodiment and its corresponding drawings.

The network communication unit 11 can receive the instruction sent by the remote end 7 and the software corresponding to the instruction. After receiving the instruction, the processing unit 14 stores the software in the memory unit 13 for later burning. Therefore, the user can control the type of the software 131 to be burned by the embedded burning wafer system 10 through the remote end 7 corresponding to the different functions of the Nand Flash 91. The network communication unit 11 can also transmit the record 132 of the information about the embedded programming chip system 10 during the burning process to the remote end 7 for confirmation or debugging.

Refer to Figure 2 in conjunction with Figure 1. In the present embodiment, when the embedded programming die system 10 is to burn a Nand Flash 91 that is plugged in, the following steps are performed: the processing unit 14 receives the key set 151 transmitted by the user interface unit 15 After the incoming command, the processing unit 14 first performs step 201, reads the booting program 133 stored in the memory unit 13, and performs a booting operation; after the booting operation is performed, the processing unit 14 reads the memory unit 13, The programming program 134 corresponding to the command transmitted from the button group 151 is executed to execute the subsequent burning operation described in the programming program 134.

The processing unit 14 then executes step 21 according to the programming program 134, scans the inserted Nand Flash 91 through the input/output interface unit 12, and finds and reads the information area 911 (Information area) in the Nand Flash 91. The Bad Block Table (BBT), which has all the bad blocks and their physical addresses in the Nand Flash 91, is used for external reference information when storing information in the storage area 912. Any program or information is stored in a bad block.

Then, the processing unit 14 performs step 22, and the processing unit 14 selects each normal block in the storage area 912 of the Nand Flash 91 according to the BBT 81, that is, rejects the bad block.

Then, the processing unit 14 performs step 23, and divides the storage area 912 of the Nand Flash 91 into a plurality of partitions according to the specification requirements of the target motherboard. It should be noted that the number of divided regions in this embodiment is required. There are three, which are divided area A, divided area B, and divided area C. However, the number of divided areas and the size of individual parts are divided according to the specification requirements of the target motherboard to be produced. The embodiments and their corresponding figures are limiting.

Then, the processing unit 14 performs step 24 to perform corresponding planning on each of the divided areas A, B, and C divided by the storage area 912 of the Nand Flash 91 according to the specification requirements of the target motherboard. In detail, the processing unit 14 The corresponding partitioning areas A, B, and C are formatted correspondingly, and a corresponding file management system is established. In addition, the partitioning is performed according to the specification requirements of the target motherboard. Areas A, B, and C establish a corresponding set of Error Checking and Correction (ECC) mechanisms.

Then, the processing unit 14 performs step 25, the processing unit 14 reads the software 131 from the memory unit 13, and specifies that the software loads the divided area B according to the specification requirements of the target motherboard to use the software. The input/output interface unit 12 is loaded into the selected divided area B through the input/output interface unit 12, and becomes the software 131' burned in the Nand Flash 91. It should be noted that which partition area is to be loaded by the software 131 also needs to look at the specification requirements of the target motherboard, and is not limited to this embodiment.

In this embodiment, the processing unit 14 further performs a step 28, the category of the software 131, the specified logical address group, and the physical address of the blocks carrying the plug 131', and the like. The information related to the burning is written into a log 132 and stored in the memory unit 13 for the remote terminal 7 to fetch at any time through the network communication unit 11 for confirmation or further debugging.

In addition, in order to further verify the correctness of the software 131' burned in the Nand Flash 91, the processing unit 14 of the present embodiment performs steps 26 and 27 after performing step 25. In step 26, the processing unit 14 reads the software 131' in the divided area B through the input/output interface unit 12, and also from the divided area B, the strip carrying the plurality of data pages of the software 131'. In the outer area 913 (out of band, OOB for short), a plurality of error check and correction codes (ECC codes) corresponding to the software 131' are read. In step 27, the processing unit 14 checks whether the software 131' read by the divided area B matches the software 131 carried in the memory unit 13 according to the error check correction code 82, and if it matches, it judges If the verification result is correct, if it does not match, it is judged that the verification result is incorrect, and then the subsequent remedial action or destruction action is performed, which should be familiar to those skilled in the art, and will not be described here.

It is worth mentioning that there are many ways to check whether the software 131' read by the blocks conforms to the software 131 carried in the memory unit, except that the error correction check mentioned in this embodiment can be utilized ( In addition to the ECC) mechanism, there is also a parity check, etc., depending on the specification requirements of the target motherboard, or the agreement between the embedded programming die system 10 and the Nand Flash 91, which is not immediately implemented in this implementation. Its corresponding figure is limited.

In summary, the effect of the present invention is that before the software 131 is burned to the Nand Flash 91, the bad block management of the Nand Flash 91 is performed first, and it is checked which are bad blocks and which are normal blocks. When the software 131 is burned, it can be avoided in the bad block, so that the information or program read from the Nand Flash 91 is defective. In addition, the embedded burning chip system 10 is also burned. After the software 131, the software 131' burned in the Nand Flash 91 is checked against the software 131 of the memory unit 13 to check whether the software 131' in the Nand Flash 91 is correct. In addition, the embedded programming die system 10 can also properly separate and subsequently format the Nand Flash 91 according to different specifications of the target motherboard.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent.

10. . . Embedded programming chip system

11. . . Network communication unit

12. . . Input and output interface unit

13. . . Memory unit

131. . . software

131’. . . software

132. . . Log file (Log)

133. . . Boot program

134. . . Burning program

14. . . Processing unit

15. . . User interface unit (UI)

151. . . Button set

152. . . Indicator light

81. . . Damaged Block Table (BBT)

82. . . Error check correction code (ECC code)

91. . . Non-gate flash memory

911. . . Information area

912. . . Storage area

913. . . Out-of-band area (OOB)

7. . . remote

201, 202. . . step

21~28. . . step

1 is a system block diagram of a preferred embodiment of an embedded burn-in wafer system of the present invention;

2 is a flow chart of the steps of the embedded programming wafer system for burning a non-gate flash memory (Nand Flash).

201, 202. . . step

21~28. . . step

Claims (20)

A method for burning a wafer is suitable for burning a software to a non-gate flash memory to be attached to a target motherboard, the non-gate flash memory having a plurality of bad blocks and a plurality of a normal block, the method comprising: (A) checking a physical address of the bad block of the non-gate flash memory; (B) dividing the normal block of the non-gate flash memory into a plurality of divided regions; (C) planning the divided regions according to the specification requirements of the target motherboard; and (D) loading the software into a corresponding segment of the divided regions according to the specification requirements of the target motherboard In the area. According to the method for burning a wafer according to claim 1, in the step (C), each of the divided regions is formatted according to the specification requirements of the target motherboard, and a corresponding file is created. Management system. The method of burning a wafer according to claim 2, further comprising a step (E) of verifying the software loaded in the divided region. The method of burning a wafer according to claim 3, wherein the step (E) comprises: (E-1) reading the software in the divided region; and (E-2) verifying the step ( The software read out in E-1) matches the software loaded in step (D). If it matches, the checksum is checked. It is correct. According to the method for burning a wafer according to claim 4, in the step (C), a corresponding error checking and correcting mechanism is established for each of the divided regions according to the specification requirement of the target motherboard, and the step is performed. (E-2), in which a plurality of error check correction codes corresponding to a plurality of data pages carrying the software are read in the divided area, and the correction code is checked based on the error check, and the step (E) is checked. The software read out in -1) matches the software written in step (D). The method for burning a wafer according to claim 1 or 2 further comprises a step (F) of recording the relevant information in the step (D). The method of burning a wafer according to any one of claims 1 to 5, wherein the software is a program segment or a piece of information. A computer program product carrying a computer program for programming a wafer, the method of claims 1 to 7 can be completed after an embedded programming wafer system is loaded into the computer program and executed. An embedded burning chip system, which is suitable for burning a software to a non-gate flash memory to be attached to a target motherboard, the non-gate flash memory having a plurality of bad blocks and a plurality of normal blocks, the system comprising: a memory unit carrying the software; an input/output interface unit for electrically connecting the non-gate flash memory; and a processing unit electrically connecting the memory unit and The input/output interface unit is configured to first check physical addresses of the bad blocks of the non-gate flash memory, and divide the normal blocks of the non-gate flash memory into a plurality of divided regions. Then, the divided areas are planned according to the specification requirements of the target motherboard, and then the software is loaded into a corresponding divided area in the divided areas according to the specification requirements of the target motherboard. The embedded programming wafer system according to claim 9, wherein the processing unit formats the respective divided regions according to the specification requirements of the target motherboard when planning the divided regions. And establish a corresponding file management system. The embedded burning wafer system according to claim 10, wherein the processing unit further stores the software and the related information of the divided area carrying the software in the memory unit as a record file. The embedded programming chip system according to claim 11, further comprising a network communication unit electrically connected to the processing unit, and the processing unit further transmits the record file to the network communication unit remote. The embedded programming chip system according to any one of claims 9 to 11, further comprising a network communication unit electrically connected to the processing unit, the processing unit being permeable to the network communication unit The remote end receives the software and stores the software in the memory unit. The embedded programming wafer system according to claim 10, wherein the processing unit verifies whether the software loaded on the divided area is correct after the software is burned in the divided area. The embedded programming wafer system of claim 14, wherein the processing unit reads the software in the divided area through the input/output interface unit after loading the software into the divided area, and Check whether the software in the divided area matches the software contained in the memory unit. If they match, the verification result is correct. According to the embedded programming wafer system of claim 15, wherein the processing unit establishes a corresponding error for each of the divided regions according to the specification requirements of the target motherboard when planning the divided regions. Checking the correction mechanism, and after loading the software into the divided area, reading a plurality of error check correction codes corresponding to the plurality of data pages carrying the software in the divided area, and checking according to the errors Correct the code to check whether the software read from the block matches the software loaded in the memory unit. The embedded programming chip system of claim 9, further comprising a user interface unit electrically connected to the processing unit, wherein the processing unit can output a flash through the user interface unit to indicate that the non-gate flashes The message of the burning status of the memory. The embedded programming chip system of claim 17, wherein the user interface unit is an indicator light, and the processing unit can indicate the non-gate flash memory by controlling the indicator light to be extinguished. Burning status. The embedded programming chip system of claim 9, further comprising a user interface unit electrically connected to the processing unit, the processing unit receiving the user interface unit to indicate the non- And the flash flash memory is programmed to burn. The embedded burning wafer system according to any one of claims 9 to 12, wherein the software is a fragment of a program or a segment of information.