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TWI408833B - Light-emitting element manufacturing method and light-emitting element - Google Patents

Light-emitting element manufacturing method and light-emitting element Download PDF

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TWI408833B
TWI408833B TW098146286A TW98146286A TWI408833B TW I408833 B TWI408833 B TW I408833B TW 098146286 A TW098146286 A TW 098146286A TW 98146286 A TW98146286 A TW 98146286A TW I408833 B TWI408833 B TW I408833B
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substrate
light
plane
single crystal
emitting element
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TW201041177A (en
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Kenji Isomoto
Chisato Furukawa
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Toshiba Kk
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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/42Gallium arsenide
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/44Gallium phosphide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018Bonding of wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/817Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/8215Bodies characterised by crystalline imperfections, e.g. dislocations; characterised by the distribution of dopants, e.g. delta-doping

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Led Devices (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

A method for manufacturing a light emitting device, includes: preparing a first substrate by slicing a single crystal ingot pulled in a pulling direction tilted with respect to a first plane orientation, the slicing being in a direction substantially perpendicular to the pulling direction; preparing a second substrate including a major surface having a plane orientation substantially parallel to a plane orientation of a major surface of the first substrate; growing a stacked unit as a crystal on the major surface of the second substrate, the stacked unit including a light emitting layer; and removing the second substrate after bonding the stacked unit and the major surface of the first substrate by heating them in a joined state. A plane orientation of the major surface of the first substrate and a plane orientation of the major surface of the second substrate are one or another selected from a plane tilted from a (100) plane toward a [011] direction and a plane tilted from a (−100) plane toward a [0-1-1] direction, respectively.

Description

發光元件之製造方法及發光元件Light-emitting element manufacturing method and light-emitting element

本發明係有關發光元件之製造方法及發光元件。The present invention relates to a method of manufacturing a light-emitting element and a light-emitting element.

於GaAs基板上,將具有發光層之層積體進行結晶成長,在與GaP等所成之透明基板黏接之後,去除GaAs基板時,可得到降低在基板之光吸收的高亮度發光元件者。On the GaAs substrate, a laminate having a light-emitting layer is crystal grown, and after adhering to a transparent substrate made of GaP or the like, and removing the GaAs substrate, a high-luminance light-emitting element that reduces light absorption on the substrate can be obtained.

將InGaAlP系半導體,層積於GaAs基板上之情況,例如使用從(100)面至[011]方向,或至[01-1]方向傾斜之基板時,提昇對於p形層之摻雜效率,且控制自然超晶格者乃成為容易。When an InGaAlP-based semiconductor is laminated on a GaAs substrate, for example, when a substrate inclined from the (100) plane to the [011] direction or to the [01-1] direction is used, the doping efficiency for the p-type layer is improved. And it is easy to control the natural superlattice.

更且,將黏接之GaP基板的傾斜配合GaAs基板的傾斜時,成為均一之黏接界面,改善電性特性者乃成為容易。GaP基板係於(100)或(111)之面方位,使用LEC(Liquid Encapsulated Czochralski:液相包縛柴式法)法進行結晶成長,在切斷的工程而傾斜於所期望之角度方向者則為一般。此情況,因摻雜之不純物乃從單晶塊的晶種側至尾端側而隔離之故,在傾斜切斷之晶圓,含有晶種部及尾端部之範圍近傍,有特性不佳增加的問題。Further, when the inclination of the bonded GaP substrate is matched with the inclination of the GaAs substrate, it becomes a uniform bonding interface, and it is easy to improve electrical characteristics. The GaP substrate is in the plane orientation of (100) or (111), and is crystal grown by the LEC (Liquid Encapsulated Czochralski method), and is inclined to the desired angle direction in the cutting process. For the general. In this case, since the doped impurities are isolated from the seed side to the trailing end side of the single crystal block, the wafers which are obliquely cut have a range of the seed crystal portion and the tail end portion, and have poor characteristics. Increased problem.

有著關於安定緊密於形成在基板上之磊晶成長層之黏接型基板及發光元件的技術揭示例(JPA2008-252151(Kokai))。在此例中,於第1之基板上,形成含有活性層之第1之磊晶層。另外,於第2之基板上,形成第2之磊晶層,與第1之磊晶層一體地接合。在此結合工程中,第1之基板的主面之中,對於(111)A面與(111)B面之中任一方優先出現的面而言,第2之基板的主面之中,接合(111)A面與(111)B面之中任一另一方優先出現的面。There is a technical disclosure example (JPA 2008-252151 (Kokai)) on a bonded substrate and a light-emitting element which are stable to an epitaxial growth layer formed on a substrate. In this example, the first epitaxial layer containing the active layer was formed on the first substrate. Further, on the second substrate, a second epitaxial layer is formed and integrally bonded to the first epitaxial layer. In the bonding process, among the main faces of the first substrate, among the faces of the (111) A face and the (111) B face, the main faces of the second substrate are joined. (111) A face in which any one of the A face and the (111) B face preferentially appears.

但,即使如此作為,對於降低接合後之晶圓面內的特性分布之變動(不均),亦不能說是充分。However, even in this case, it is not sufficient to reduce the variation (unevenness) in the characteristic distribution in the wafer surface after bonding.

如根據本發明之一形態,提供具備:準備將對於第1之面方位而言傾斜之方向,作為拉起方向,將拉起之單結晶單晶塊,對於前述拉起方向而言,切斷於略垂直之方向加以切成之第1之基板的工程,和準備具有與前述第1之基板的主面略平行之面方位的主面之第2之基板的工程,和結晶成長具有發光層於前述第2之基板的前述主面上之層積體的工程,和重疊前述層積體與前述第1之基板的前述主面側,進行加熱黏接之後,去除前述第2之基板的工程;前述第1之傾斜基板的前述主面之面方位乃從(100)面傾斜於[011]方向的面及從(-100)面傾斜於[0-1-1]方向的面任一方,前述第2之基板的前述主面之面方位乃從(100)面傾斜於[011]方向的面及從(-100)面傾斜於[0-1-1]方向的面任一另一方者為特徵之發光元件的製造方法。According to an aspect of the present invention, there is provided a single crystal single crystal block which is to be pulled up in a direction in which the first surface orientation is inclined, and which is pulled up as a pulling direction, and is cut in the pulling direction. The substrate of the first substrate cut in the direction perpendicular to the vertical direction, and the second substrate of the main surface having the surface orientation slightly parallel to the main surface of the first substrate, and the crystal growth having the light-emitting layer In the process of laminating the main surface of the second substrate, and superposing the laminate and the main surface of the first substrate, heat-bonding and then removing the second substrate The surface orientation of the main surface of the first inclined substrate is one of a surface inclined from the (100) plane in the [011] direction and a surface inclined from the (-100) plane in the [0-1-1] direction. The surface orientation of the main surface of the second substrate is one from the (100) plane inclined to the [011] direction and the (-100) plane inclined to the [0-1-1] direction. A method of manufacturing a light-emitting element characterized by the following.

另外,如根據本發明之其他之一形態,提供具備:從將對於第1之面方位而言傾斜之方向,作為拉起方向所拉起之單結晶單晶塊,對於前述拉起方向而言,切斷於略垂直之方向加以切成,摻雜Zn與具有較Zn濃度為低濃度之Si的基板,和具有與前述基板的主面略平行之面方位的主面乃與前述基板之前述主面側加以黏接,且具有發光層之層積體;前述層積體的前述主面之面方位乃成為從(100)面傾斜於[011]方向的面及從(-100)面傾斜於[0-1-1]方向的面任一方,前述基板的前述主面之面方位乃成為從(100)面傾斜於[011]方向的面及從(-100)面傾斜於[0-1-1]方向的面任一另一方,前述基板係可透過來自前述發光層的放出光者為特徵之發光元件。Further, according to another aspect of the present invention, there is provided a single crystal single crystal block which is pulled up in a pulling direction from a direction inclined with respect to a first surface orientation, and the pulling direction is Cutting into a direction slightly orthogonal to the surface of the substrate doped with Zn and Si having a lower concentration of Zn, and a main surface having a plane orientation slightly parallel to the main surface of the substrate, and the aforementioned substrate The main surface side is bonded to each other and has a laminated body of the light-emitting layer; the surface orientation of the main surface of the laminated body is a surface inclined from the (100) plane in the [011] direction and inclined from the (-100) plane In one of the faces in the [0-1-1] direction, the surface orientation of the main surface of the substrate is a surface inclined from the (100) plane in the [011] direction and inclined from the (-100) plane to [0- In any one of the faces of the 1-1] direction, the substrate is a light-emitting element characterized by light emitted from the light-emitting layer.

另外,如根據本發明之又其他之一形態,提供具備:對於主面而言,於略垂直方向產生蝕坑列之基板,和具有與前述基板的前述主面略平行之面方位的主面乃與前述基板之前述主面側加以黏接,且具有發光層之層積體;前述層積體的前述主面之面方位乃成為從(100)面傾斜於[011]方向的面及從(-100)面傾斜於[0-1-1]方向的面任一方,前述基板的前述主面之面方位乃成為從(100)面傾斜於[011]方向的面及從(-100)面傾斜於[0-1-1]方向的面任一另一方,前述基板係可透過來自前述發光層的放出光者為特徵之發光元件。Further, according to still another aspect of the present invention, there is provided a substrate having a pit row which is slightly perpendicular to a main surface, and a main surface having a plane direction slightly parallel to the main surface of the substrate And a laminated body having a light-emitting layer bonded to the main surface side of the substrate; and a surface orientation of the main surface of the laminate is a surface inclined from the (100) plane in the [011] direction and (-100) The surface is inclined to one of the faces in the [0-1-1] direction, and the surface orientation of the main surface of the substrate is a surface inclined from the (100) plane in the [011] direction and from (-100) The substrate is inclined to any one of the faces in the [0-1-1] direction, and the substrate is a light-emitting element characterized by light emitted from the light-emitting layer.

以下,參照圖面同時,對於本發明之實施形態加以說明。Hereinafter, embodiments of the present invention will be described with reference to the drawings.

圖1乃有關本發明之第1實施形態的發光元件之模式剖面圖。Fig. 1 is a schematic cross-sectional view showing a light-emitting device according to a first embodiment of the present invention.

於p型GaP等所成之第1之傾斜基板10之上方,結晶成長p型GaP等所成之黏接層12。另一方,n型GaAs等所成之接觸層20、n型InGaAlP所成之電流擴散層22、n型InGaAlP所成之包覆層24、InGaAlP所成之發光層26、p型InGaAlP所成之包覆層28、及p型InGaAlP所成之黏接層30乃構成層積體32。然而,導電型係不限於此,例如,作為n型GaP基板,將層積體之導電型作為相反亦可。The adhesive layer 12 formed of p-type GaP or the like is grown on the upper side of the first inclined substrate 10 formed of p-type GaP or the like. On the other hand, a contact layer 20 made of n-type GaAs or the like, a current diffusion layer 22 made of n-type InGaAlP, a cladding layer 24 made of n-type InGaAlP, a light-emitting layer 26 made of InGaAlP, and p-type InGaAlP are formed. The adhesive layer 30 formed of the cladding layer 28 and the p-type InGaAlP constitutes the laminate 32. However, the conductivity type is not limited thereto. For example, as the n-type GaP substrate, the conductivity type of the laminate may be reversed.

然而,在本說明書中,「傾斜基板」係作為表示從基板的主面之面方位乃如(100)、(110)及(111)之低層次的結晶面偏移之基板者。However, in the present specification, the "inclined substrate" is used as a substrate indicating that the surface orientation of the principal surface of the substrate is a low-level crystal plane offset of (100), (110), and (111).

另外,在本說明書中,「InGaAlP」係指以Inx (Gay Al1-y )1-x P(但,0≦x≦1、0≦y≦1)而成的組成式所示之化合物半導體材料,作為亦包含摻雜為了控制導電性之不純物元素之構成者。In addition, in the present specification, "InGaAlP" means a composition formula represented by In x (Ga y Al 1-y ) 1-x P (however, 0≦x≦1, 0≦y≦1). The compound semiconductor material also includes a composition which is doped with an impurity element which is doped to control conductivity.

層積體32之黏接層30,和設置於傾斜基板10之黏接層12乃在黏接界面46加以黏接。由AuGe等所成之n側電極40係設置於略同一尺寸之接觸層20的上方。另外,AuZn等所成之p側電極44係設置於傾斜基板10之背面側。由如此作為,經由注入至縱方向的電流,發光層26係可放出綠~紅色波長範圍之可視光。然而,傾斜基板10,並不限定於透光性,當做為透光性時,對於來自發光層26的放出光而言,可降低在基板之光吸收而放出高輸出於外部之故,更為理想。The adhesive layer 30 of the laminate 32 and the adhesive layer 12 disposed on the inclined substrate 10 are bonded at the bonding interface 46. The n-side electrode 40 formed of AuGe or the like is disposed above the contact layer 20 of a slightly different size. Further, the p-side electrode 44 formed of AuZn or the like is provided on the back side of the inclined substrate 10. In this manner, the light-emitting layer 26 can emit visible light in the green to red wavelength range via the current injected into the longitudinal direction. However, the inclined substrate 10 is not limited to light transmissivity, and when it is translucent, the light emitted from the light-emitting layer 26 can reduce light absorption on the substrate and emit high output to the outside. ideal.

作為具有透光性,III-V族所成之傾斜基板10,雖亦依存於發光波長,但亦可使用AlGaAs或AlAs等者。另外,作為層積體32係亦可使用AlGaAs或GaAs者。As the light-transmitting, the inclined substrate 10 made of the III-V group depends on the light-emitting wavelength, but AlGaAs, AlAs or the like can also be used. Further, as the laminate 32, AlGaAs or GaAs may be used.

層積體32係例如從(100)面方位至[011]之方向,結晶成長於具有第1之傾斜角的第2之傾斜基板的上方。於傾斜基板之上方進行結晶成長時,不純物之導入率則提昇,可作為高濃度等之不純物控制乃成為容易,且發光波長之控制乃成為容易之故而為理想。將InGaAlP系材料,結晶成長於GaAs基板等之情況,傾斜角度係數度以上為佳,而15度附近乃更佳。當傾斜角度乃過大時,結晶成長乃成為困難。The laminate 32 is, for example, from the (100) plane orientation to the [011] direction, and the crystal is grown above the second inclined substrate having the first inclination angle. When the crystal growth is carried out above the inclined substrate, the introduction rate of the impurity is increased, and it is easy to control the impurity such as a high concentration, and it is preferable to control the emission wavelength. When the InGaAlP-based material is crystal grown on a GaAs substrate or the like, the inclination angle coefficient is preferably at least the degree, and more preferably at around 15 degrees. When the tilt angle is too large, crystal growth becomes difficult.

另一方,傾斜基板10係例如從(-100)面方位至[0-1-1]之方向,具有第2之傾斜角。結晶成長於傾斜基板10之上方的黏接層12亦可作為略同一之傾斜角。當第1之傾斜角,和第2之傾斜角之任一變大時,在界面的結晶性為混亂,界面阻抗則增大之故而並不理想。即,傾斜角的偏移為小者為佳,作為較1度為小者更佳。然而,傾斜角的偏移係表示面方位之偏移。在本說明書中,「略平行的面方位」係指:面方位之偏移乃較1度為小者。On the other hand, the inclined substrate 10 has a second inclination angle, for example, from a (-100) plane orientation to a [0-1-1] direction. The adhesive layer 12 in which the crystal grows above the inclined substrate 10 can also have a slightly inclined angle. When either the first inclination angle or the second inclination angle is increased, the crystallinity at the interface is disturbed, and the interface impedance is increased, which is not preferable. That is, it is preferable that the shift of the tilt angle is small, and it is preferable that it is smaller than 1 degree. However, the offset of the tilt angle is indicative of the offset of the plane orientation. In the present specification, "slightly parallel plane orientation" means that the offset of the plane orientation is smaller than 1 degree.

另外,在晶圓狀態黏接傾斜基板10與層積體32之情況,未藉由黏接層而亦可進行黏接者。但,藉由黏接層12時,可在與異種材料之間更確實地進行黏接者。Further, in the case where the inclined substrate 10 and the laminated body 32 are adhered in the wafer state, they are not bonded by the adhesive layer. However, by bonding the layer 12, it is possible to bond more reliably with the dissimilar materials.

圖2A~圖2D係有關本實施形態之發光元件的製造方法之工程剖面圖。2A to 2D are cross-sectional views showing the construction of a method of manufacturing a light-emitting device of the present embodiment.

摻雜有Si等之n型GaAs等所成之第2之傾斜基板34係作為從使用just seed所拉起之單結晶單晶塊加以切片之構成,但作為從使用off seed所拉起之單結晶單晶塊加以切片之構成亦可。The second inclined substrate 34 made of n-type GaAs or the like doped with Si or the like is formed by slicing a single crystal single crystal block pulled up using a just seed, but is used as a single sheet pulled from the off seed. The crystal single crystal block may be formed by slicing.

第2之傾斜基板34係例如具有從(100)面方位至[011]之方向作為略15度傾斜之主面,並於此面,結晶成長由黏接層36、接觸層20開始之層積體32。結晶成長係可使用例如MOCVD(Metal Organic Chemical Vapor Deposition)法或MBE(Molecular Beam Epitaxy)法。MOCVD法之情況,於裝置內之加熱台,載置第2之傾斜基板34,在AsH3 環境中升溫至略730℃。The second inclined substrate 34 has, for example, a main surface which is inclined at a slight angle of 15 degrees from the (100) plane orientation to the [011] direction, and the crystal growth is formed by the adhesion layer 36 and the contact layer 20 on the surface. Body 32. For the crystal growth, for example, a MOCVD (Metal Organic Chemical Vapor Deposition) method or an MBE (Molecular Beam Epitaxy) method can be used. In the case of the MOCVD method, the second inclined substrate 34 was placed on the heating stage in the apparatus, and the temperature was raised to 730 ° C in the AsH 3 environment.

將AsH3 (胂)取代為PH3 (膦),之後供給TMG(Trimethyl Gallium)、TMI(Trimethyl Indium)、及SiH4 (矽烷)時,形成Si摻雜InGaP所成之黏接層36。When AsH 3 (胂) is substituted with PH 3 (phosphine), and then TMG (Trimethyl Gallium), TMI (Trimethyl Indium), and SiH 4 (decane) are supplied, an adhesion layer 36 made of Si-doped InGaP is formed.

接著,將PH3 取代為AsH3 ,之後供給TMG及SiH4 時,形成Si摻雜GaAs所成之接觸層20。Next, when PH 3 is substituted for AsH 3 and then TMG and SiH 4 are supplied, a contact layer 20 made of Si-doped GaAs is formed.

接著,將AsH3 取代為PH3 ,之後供給TMG、TMI、TMA、及SiH4 時,形成Si摻雜InGaAlP所成之電流擴散層22。Next, when AsH 3 is substituted with PH 3 and then TMG, TMI, TMA, and SiH 4 are supplied, a current diffusion layer 22 made of Si-doped InGaAlP is formed.

接著,經由使用DMZ(Dimethyl Zinc)而摻雜Zn之時,可將發光層26,包覆層28,及黏接層30作為p型者。如此作為而形成層積體32之後,在PH3 環境中進行降溫,下降至室溫之後,停止PH3 的供給,置換成氮氣而結束結晶成長工程(圖2(a))。Next, when Zn is doped by using DMZ (Dimethyl Zinc), the light-emitting layer 26, the cladding layer 28, and the adhesive layer 30 can be made p-type. After the laminate 32 was formed in this manner, the temperature was lowered in the pH 3 atmosphere, and after the temperature was lowered to room temperature, the supply of the pH 3 was stopped, and the nitrogen gas was replaced by the nitrogen gas to complete the crystal growth process (Fig. 2 (a)).

如此,當使用MOCVD法時,將發光層26作為MQW構造則為容易。經由作為MQW(Multiple Quantum Well)構造之時,發光波長之控制及動作電流的降低等則變為容易。As described above, when the MOCVD method is used, it is easy to use the light-emitting layer 26 as the MQW structure. When it is configured as an MQW (Multiple Quantum Well) structure, it is easy to control the emission wavelength and reduce the operating current.

另一方,使用LEC法,例如將p型GaP單結晶單晶塊,在從(-100)面至[0-1-1]方向作略15度傾斜的面方向進行拉起。即,將單結晶單晶塊的拉起方向,作為從(-100)面至[0-1-1]方向作略15度傾斜的方向。此係可經由決定單結晶單晶塊之結晶方位的晶種(SEED)之面方位而控制。也就是,經由將晶種之從(-100)面至[0-1-1]方向作略15度傾斜的面方向,作為拉起方向之時,可使如此之結晶方位之單結晶單晶塊成長者。On the other hand, using the LEC method, for example, a p-type GaP single crystal single crystal block is pulled up in a plane direction inclined from the (-100) plane to the [0-1-1] direction by 15 degrees. That is, the pulling direction of the single crystal single crystal block is a direction which is slightly inclined by 15 degrees from the (-100) plane to the [0-1-1] direction. This can be controlled by determining the plane orientation of the seed crystal (SEED) of the crystal orientation of the single crystal single crystal block. That is, a single crystal single crystal having such a crystal orientation can be obtained by a direction in which the seed crystal is inclined at a slight angle of 15 degrees from the (-100) plane to the [0-1-1] direction as a pulling direction. Block grower.

然而,此情況,當控制Zn及Si之摻雜量時,可做成所期望之載體濃度。However, in this case, when the doping amount of Zn and Si is controlled, the desired carrier concentration can be made.

經由將單結晶單晶塊,於與其拉起方向略垂直交叉之方向,進行切薄(切片)之時,可得到將從(-100)面至[0-1-1]方向作略15度傾斜的面方位作為主面之第1之傾斜基板10者。然而,第1之傾斜基板10係在基板(尺寸5mm×5mm)之中心,例如Zn濃度乃略8.0×1017 cm-3 、Si濃度1.0×1017 cm-3 。另外,經由渦電流法而測定時,p型載體濃度乃略7.5×1017 cm-3When the single crystal single crystal block is thinned (sliced) in a direction perpendicularly perpendicular to the pulling direction thereof, a slight 15 degree from the (-100) plane to the [0-1-1] direction can be obtained. The inclined plane orientation is the first inclined substrate 10 of the main surface. However, the first inclined substrate 10 is at the center of the substrate (size 5 mm × 5 mm), for example, the Zn concentration is slightly 8.0 × 10 17 cm -3 , Si concentration 1.0 × 10 17 cm -3 . Further, when measured by the eddy current method, the p-type carrier concentration was slightly 7.5 × 10 17 cm -3 .

將第1之傾斜基板10載置於MOCVD裝置內的加熱台,在PH3 環境中,升溫至730℃,供給TMG及DMZ時,可形成p型GaP所成之黏接層12者(圖2(b))。The first inclined substrate 10 is placed on a heating stage in the MOCVD apparatus, and the temperature is raised to 730 ° C in a PH 3 environment, and when TMG and DMZ are supplied, an adhesive layer 12 made of p-type GaP can be formed (FIG. 2). (b)).

將圖2(a)及圖2(b)所示之層積構造,使用超音波洗淨裝置等而進行洗淨之後,在略200℃中,晶圓狀態重疊進行加熱黏接(圖2(c))。此情況,黏接第1之傾斜基板10側之黏接層12的主面12a,和層積體32之主面32a。之後,在氫環境中,以略400℃進行60分鐘的熱處理工程時,黏接工程則結束。The layered structure shown in Fig. 2 (a) and Fig. 2 (b) is washed with an ultrasonic cleaning device or the like, and then the wafer state is superimposed and heated and bonded at 200 ° C (Fig. 2 (Fig. 2 c)). In this case, the main surface 12a of the adhesive layer 12 on the side of the first inclined substrate 10 and the main surface 32a of the laminated body 32 are bonded. Thereafter, in the hydrogen environment, when the heat treatment process was performed at 400 ° C for 60 minutes, the bonding process was completed.

接著,將黏接的構造,浸漬於氨水:過氧化氫水乃成為1:15之混合溶液(25℃)時,例如以60分可去除GaAs所成之第2之傾斜基板34。之後,在氫環境中,以700℃進行60分鐘的熱處理時,更可提昇層積體32與第1之傾斜基板10之黏接層12的黏接強度者。更且,當浸漬於鹽酸時,可去除黏接層36。Next, when the bonded structure is immersed in ammonia water: hydrogen peroxide water is a 1:15 mixed solution (25 ° C), for example, the second inclined substrate 34 made of GaAs can be removed by 60 minutes. Thereafter, in the hydrogen atmosphere, when the heat treatment is performed at 700 ° C for 60 minutes, the adhesion strength between the laminate 32 and the adhesion layer 12 of the first inclined substrate 10 can be further improved. Further, when immersed in hydrochloric acid, the adhesive layer 36 can be removed.

將第1之傾斜基板10進行研磨,將其厚度,如以虛線所示,例如作為200μm等(圖2(d))。更且,形成p側電極44及n側電極40,進行熱處理工程而形成電阻接觸層。經由切割而可得到圖1之發光元件者。The first inclined substrate 10 is polished, and the thickness thereof is, for example, 200 μm as shown by a broken line (Fig. 2(d)). Further, the p-side electrode 44 and the n-side electrode 40 are formed and subjected to a heat treatment process to form a resistive contact layer. The light-emitting element of Fig. 1 can be obtained by cutting.

圖3(a)乃本實施形態之剖面圖、圖3(b)乃比較例之剖面圖、圖3(c)乃說明單結晶之概念圖、圖3(d)乃說明黏接面之剖面圖、圖3(e)乃有關本實施形態之單結晶之概念圖。3(a) is a cross-sectional view of the embodiment, FIG. 3(b) is a cross-sectional view of a comparative example, FIG. 3(c) is a conceptual view of a single crystal, and FIG. 3(d) is a cross-sectional view of the bonding surface. Fig. 3(e) is a conceptual diagram of a single crystal according to the present embodiment.

在圖3(a)之本實施形態的發光元件中,採用從使用偏位晶種而拉起之單結晶單晶塊所得到之基板10。In the light-emitting element of this embodiment of Fig. 3 (a), a substrate 10 obtained by using a single crystal single crystal block which is pulled up using a eccentric seed crystal is used.

另一方,在圖3(b)之比較例的發光元件中,使用例如將(100)面,或(111)面之最佳面作為晶種而拉起之單結晶單晶塊,只傾斜所期望的角度於(-100)面至[0-1-1]之方向而切片之傾斜基板110(圖3(c))。對於傾斜基板110上係設置有黏接層112,在層積層132,和黏接界面146加以黏接。On the other hand, in the light-emitting element of the comparative example of FIG. 3(b), for example, a single crystal single crystal block in which the optimum surface of the (100) plane or the (111) plane is pulled as a seed crystal is used, and only the tilted portion is used. The inclined substrate 110 (Fig. 3(c)) is sliced at a desired angle from the (-100) plane to the [0-1-1] direction. An adhesive layer 112 is disposed on the inclined substrate 110, and the laminated layer 132 is bonded to the bonding interface 146.

拉起GaP單結晶單晶塊之情況,在單晶塊8之晶種側,尾端側,及外緣附近之範圍中,蝕坑密度(EPD)乃容易變高。因此,當使用蝕坑密度相對低之單結晶單晶塊8之中間部的範圍L1時,提昇晶圓內之晶片良品率者則變為容易。但,在傾斜進行切片之情況,使用迴避晶種側及尾端側之範圍L1時,可保持高的晶片良品率者,但使用之範圍乃L2減少。另外,在尾端範圍中,Zn濃度乃容易變高。When the GaP single crystal single crystal block is pulled up, the pit density (EPD) is likely to become high in the range of the seed crystal side, the trailing end side, and the outer edge of the single crystal block 8. Therefore, when the range L1 of the intermediate portion of the single crystal single crystal block 8 having a relatively low pit density is used, it is easy to increase the yield of the wafer in the wafer. However, in the case of slicing and slicing, when the range L1 of the seed side and the trailing end side is avoided, the high wafer yield can be maintained, but the range of use is reduced by L2. In addition, in the tail end range, the Zn concentration is liable to become high.

在本實施形態中,如圖3(e),使用將對於(100)的面方位而言傾斜之方向所拉起之單結晶單晶塊,於略垂直於拉起方向之方向,進行切片而切成之第1之傾斜基板10。如此作為時,單結晶單晶塊之使用可能範圍係可加長L1之故,晶圓之產量則提昇。此情況,如圖3(d),設置於第1之傾斜基板10之黏接層12之主面12a的面方位係與第1之傾斜基板10之主面10a的面方位略一致。另外,層積體32之主面32a的面方位係與第2之傾斜基板34之主面34a的面方位略一致。In the present embodiment, as shown in Fig. 3(e), a single crystal single crystal block which is pulled up in a direction inclined with respect to the plane orientation of (100) is sliced in a direction slightly perpendicular to the pulling direction. The first inclined substrate 10 is cut into the first one. In this case, the use of the single crystal single crystal block may extend the length of L1, and the yield of the wafer is increased. In this case, as shown in FIG. 3(d), the plane orientation of the principal surface 12a of the adhesion layer 12 provided on the first inclined substrate 10 slightly matches the plane orientation of the principal surface 10a of the first inclined substrate 10. Further, the plane orientation of the principal surface 32a of the laminate 32 slightly coincides with the plane orientation of the principal surface 34a of the second inclined substrate 34.

第1之傾斜基板10之主面10a的面方位及黏接層12之主面12a的面方位係從(100)面傾斜於[011]方向的面方位及從(-100)面傾斜於[0-1-1]方向的面方位之任一方者為佳。另外,層積體32之主面32a的面方位係從(100)面傾斜於[011]方向的面方位及從(-100)面傾斜於[0-1-1]方向的面方位之任一另一方者為佳。經由如此之組合,改善摻雜控制性與發光特性之雙方者則成為容易。The plane orientation of the principal surface 10a of the first inclined substrate 10 and the plane orientation of the principal surface 12a of the adhesive layer 12 are inclined from the (100) plane to the plane orientation in the [011] direction and from the (-100) plane to [ Any one of the plane orientations of the 0-1-1] direction is preferred. Further, the plane orientation of the principal surface 32a of the laminate 32 is a plane orientation inclined from the (100) plane in the [011] direction and a plane orientation inclined from the (-100) plane in the [0-1-1] direction. One other party is better. By such a combination, it is easy to improve both the doping control property and the light-emitting property.

一般,在如GaP或GaAs之III-V族化合物半導體,經由從單結晶單晶塊,將基板進行切片之角度,在晶種側的面與尾端側的面,表現於表面之元素乃有不同之情況。另外,對於不同之基板或成長於其上方的層之表面,亦表現有與基板略同一之面方位。即,任一方乃如為「傾斜於III族面的面」,任一另一方係成為「傾斜於V族面的面」。例如,在圖3(d)中,在第1之傾斜基板10之主面10a與另一方的面10b,顯現相互不同的「面」。另外,在第2之傾斜基板34中,亦在主面34a與另一方的面34b,顯現不同的「面」。In general, in a group III-V compound semiconductor such as GaP or GaAs, the surface of the surface on the seed side and the side on the trailing end side are formed by the angle from which the substrate is sliced from the single crystal single crystal block. Different situations. In addition, the surface of the layer which is different from the substrate or the layer which is grown above is also slightly in the same plane orientation as the substrate. In other words, either one is "a surface inclined to the group III surface", and the other side is a "face inclined to the V group surface". For example, in FIG. 3(d), the "surface" different from each other is formed on the principal surface 10a of the first inclined substrate 10 and the other surface 10b. Further, in the second inclined substrate 34, a different "face" is also formed on the main surface 34a and the other surface 34b.

當相互重合如此不同的「面」而黏接時,III族與V族的比乃保持成略一定,降低懸浮鍵,在基板的全面成可均一地黏接,可降低界面阻抗的變動(不均)。When the "faces" which are so different from each other are bonded together, the ratio of the group III to the group V is kept slightly, the suspension key is lowered, and the entire substrate can be uniformly bonded, which can reduce the variation of the interface impedance (not All).

另外,由以下的方法,觀察蝕坑。首先,對於位向平面而言,平行地劈開晶圓時,其剖面係成為(01-1)面。接著,浸漬於氟酸、硫酸、及過氧化氫水的混合液,經由微分干擾顯微鏡而觀察其主面及(01-1)面。在圖3(a)之第1之傾斜基板10與圖3(b)之傾斜基板110中,未觀察到於在其主面之蝕坑密度顯著差異。另一方,在(01-1)面,在本實施型態中,如圖3(a),觀察到三角錘狀之蝕坑列11係對於第1之傾斜基板10之主面10a而言,沿著略垂直方向,而在比較例中,蝕坑列111係對於傾斜基板110之主面110a而言,沿著對於垂直方向傾斜之方向,容易加以配列者。如此,經由觀察蝕坑的配列方向之時,可明確知道傾斜基板之單結晶拉起方向者。In addition, the etch pit was observed by the following method. First, in the case of a planar plane, when the wafer is opened in parallel, the profile is a (01-1) plane. Next, the mixture was immersed in a mixture of hydrofluoric acid, sulfuric acid, and hydrogen peroxide, and the main surface and the (01-1) plane were observed through a differential interference microscope. In the inclined substrate 10 of the first embodiment of Fig. 3(a) and the inclined substrate 110 of Fig. 3(b), no significant difference in the pit density on the principal surface was observed. On the other hand, in the (01-1) plane, in the present embodiment, as shown in FIG. 3(a), the triangular hammer-shaped pit row 11 is observed for the main surface 10a of the first inclined substrate 10, In the slightly perpendicular direction, in the comparative example, the pit row 111 is easily aligned with respect to the main surface 110a of the inclined substrate 110 in the direction inclined with respect to the vertical direction. In this way, by observing the arrangement direction of the etch pits, it is possible to clearly know the direction in which the single crystal is pulled up by the inclined substrate.

圖4(a)係顯示本實施形態之光輸出的晶圓面內分布,圖4(b)係顯示比較例之光輸出的晶圓面內分布。X及Y係顯示在晶圓面中,相互垂直交叉之相對位置座標。另外,本實施形態及比較例均黏接「傾斜於III族面的面」與「傾斜於V族面的面」。Fig. 4(a) shows the in-plane distribution of the light output of the present embodiment, and Fig. 4(b) shows the in-plane distribution of the light output of the comparative example. The X and Y lines show the relative position coordinates that are perpendicular to each other in the wafer surface. Further, in the present embodiment and the comparative example, the "face inclined to the group III surface" and the "face inclined to the group V surface" were bonded.

在使用於本實施形態之從單晶塊切片之晶圓中,5mm×5mm之範圍的略中心之Zn濃度係如根據、SIMS(Secondary Ionization Mass Spectrometer)分析,為8.0×1017 cm-3 。然而,另外,使用渦電流法而測定時,p型載體濃度乃略7.5×1017 cm-3 。如圖4(a)所示,使用此基板之本實施形態的發光元件之光輸出Po係最大值乃3.41mW、最小值乃3.15mW、平均值乃3.3mW、及標準偏差乃0.06mW。In the wafer from the single crystal block slice used in the present embodiment, the Zn concentration in the center of the range of 5 mm × 5 mm is 8.0 × 10 17 cm -3 as analyzed by SIMS (Secondary Ionization Mass Spectrometer). However, in addition, when measured by the eddy current method, the p-type carrier concentration was slightly 7.5 × 10 17 cm -3 . As shown in Fig. 4 (a), the light output Po of the light-emitting element of the present embodiment using this substrate has a maximum value of 3.41 mW, a minimum value of 3.15 mW, an average value of 3.3 mW, and a standard deviation of 0.06 mW.

另一方,使用在比較例之基板,係將使用拉起方位作為[-100]而拉起之最佳晶種的單晶塊,從(-100)至[0-1-1]方向作略15度傾斜切片之構成。從其單晶塊切片之5mm×5mm之範圍的略中心之Zn濃度係7.8×1017 cm-3 ,而Si濃度係1.0×1016 cm-3 。在本比較例中,無關未摻雜Si而認為檢測出Si之情況係因從使用於拉起工程之石英構件之混入(基板係從晶種側附近範圍加以切片)。另外,使用渦電流法而測定時,p型載體濃度乃7.5×1017 cm-3On the other hand, in the substrate of the comparative example, a single crystal block of the optimum seed crystal which is pulled up using the pull-up orientation as [-100] is used, and the direction from (-100) to [0-1-1] is omitted. The composition of a 15 degree oblique slice. The Zn concentration in the center of the range of 5 mm × 5 mm from the single crystal block section was 7.8 × 10 17 cm -3 , and the Si concentration was 1.0 × 10 16 cm -3 . In the present comparative example, the case where Si was detected irrespective of undoped Si was caused by the mixing of the quartz member used for the pulling up (the substrate was sliced from the vicinity of the seed crystal side). Further, when measured by the eddy current method, the p-type carrier concentration was 7.5 × 10 17 cm -3 .

如圖4(b)所示,使用此基板之比較例的發光元件之光輸出Po係最大值乃3.51mW、最小值乃2.88mW、平均值乃3.22mW、及標準偏差乃0.15mW。即,在比較例中,光輸出Po之變動(不均)為大,其標準偏差乃本實施形態之略2.5倍。As shown in Fig. 4 (b), the light output Po of the light-emitting element of the comparative example using this substrate had a maximum value of 3.51 mW, a minimum value of 2.88 mW, an average value of 3.22 mW, and a standard deviation of 0.15 mW. That is, in the comparative example, the variation (unevenness) of the light output Po is large, and the standard deviation is slightly 2.5 times that of the embodiment.

圖5(a)乃在本實施形態之一定動作電流的動作電壓之晶圓面內分布,圖5(b)乃在比較例之一定動作電流的動作電壓之晶圓面內分布。X及Y係顯示在晶圓面中,相互垂直交叉之相對位置座標。Fig. 5(a) is distributed in the wafer surface of the operating voltage of the constant operating current of the present embodiment, and Fig. 5(b) is distributed in the wafer surface of the operating voltage of the constant operating current of the comparative example. The X and Y lines show the relative position coordinates that are perpendicular to each other in the wafer surface.

如圖5(a)所示,本實施形態之動作電壓VF 的最大值乃2.306V、最小值乃2.239V、平均值乃2.273V、及標準偏差乃0.019V。另一方,圖5(b)之比較例之動作電壓VF 的最大值乃2.375V、最小值乃2.189V、平均值乃2.270V、及標準偏差乃0.049V。即,在比較例中,動作電壓的變動為大,其標準偏差係本實施形態之略2.6倍。As shown in Fig. 5(a), the maximum value of the operating voltage V F of the present embodiment is 2.306 V, the minimum value is 2.239 V, the average value is 2.273 V, and the standard deviation is 0.019 V. On the other hand, the maximum value of the operating voltage V F of the comparative example of Fig. 5 (b) was 2.375 V, the minimum value was 2.189 V, the average value was 2.270 V, and the standard deviation was 0.049 V. That is, in the comparative example, the fluctuation of the operating voltage was large, and the standard deviation was slightly 2.6 times that of the present embodiment.

在本實施形態中,在第1之傾斜基板10與層積體32之黏接界面46,界面阻抗的不均係較在比較例之界面阻抗之不均為小。因此,在本實施形態中,在晶圓全體中,可更將動作電壓VF 作為均一,亦可降低光輸出Po之變動(不均)。In the present embodiment, the unevenness of the interface impedance at the bonding interface 46 between the first inclined substrate 10 and the laminated body 32 is smaller than the difference in the interface impedance of the comparative example. Therefore, in the present embodiment, the operating voltage V F can be made uniform even in the entire wafer, and the variation (unevenness) of the light output Po can be reduced.

然而,經由偏位晶種拉起之單結晶單晶塊,即使為n型GaP,當黏接傾斜於III族的面與傾斜於V族的面時,亦可降低動作電壓及光輸出的變動。However, even if the single crystal single crystal block pulled up by the eccentric seed crystal is n-type GaP, when the adhesion is inclined to the surface of the group III and the surface inclined to the group V, the fluctuation of the operating voltage and the light output can be reduced. .

即,經由圖2所示之製造方法,如圖4及圖5,降低特性變動,改善晶片良品率而提昇量產性,作為結果,價格降低乃變為容易。In other words, according to the manufacturing method shown in FIG. 2, as shown in FIG. 4 and FIG. 5, the characteristic variation is reduced, the yield of the wafer is improved, and the mass productivity is improved. As a result, the price is lowered.

圖6(a)係顯示比較例之光輸出變動的圖表,圖6(b)係顯示有關第2實施形態之發光元件的光輸出變動的圖表。在本圖中,縱軸係相對光輸出(%),橫軸係通電時間(h)。Fig. 6(a) is a graph showing changes in light output of a comparative example, and Fig. 6(b) is a graph showing changes in light output of the light-emitting element of the second embodiment. In the figure, the vertical axis is the relative light output (%), and the horizontal axis is the energization time (h).

然而,在本實施形態中,層積體係作為與圖1所示之第1實施形態相同形狀,但第1之傾斜基板10之摻雜則為不同。However, in the present embodiment, the laminated system has the same shape as that of the first embodiment shown in Fig. 1, but the doping of the first inclined substrate 10 is different.

在圖6(a)之比較例中,所使用之傾斜基板係從使用最佳晶種所拉起之單結晶單晶塊之尾端側(圖3(c)之範圍T附近)加以切片。通常,在尾端側中,結晶缺陷為多,容易促進Zn之擴散。然而,Zn濃度係設定成1.5×1018 cm-3 及2.0×1018 cm-3 之2個。In the comparative example of Fig. 6 (a), the inclined substrate used was sliced from the trailing end side (near the range T of Fig. 3 (c)) of the single crystal single crystal block pulled up using the optimum seed crystal. Generally, in the tail end side, there are many crystal defects, and it is easy to promote the diffusion of Zn. However, the Zn concentration was set to be two of 1.5 × 10 18 cm -3 and 2.0 × 10 18 cm -3 .

在從尾端附近加以切片之基板中,從在拉起工程所使用之石英構件的Si之自動摻入為少,為實際SIMS之檢測界限以下。比較例之情況,經過1000小時之光輸出係下降至初期值之75~81%之範圍內。然而,對於2個的Zn濃度之間的差異,未看到明顯差別。In the substrate sliced from the vicinity of the trailing end, the automatic doping of Si from the quartz member used in the pulling up process is small, and is below the detection limit of the actual SIMS. In the case of the comparative example, the light output after 1000 hours dropped to the range of 75 to 81% of the initial value. However, no significant difference was observed for the difference between the two Zn concentrations.

對此,發明者係在使用來自在圖3(c)之範圍S所示之晶種側的傾斜基板之發光元件中,即使蝕坑密度為高,亦得到光輸出下降少之見解。On the other hand, in the light-emitting element using the inclined substrate from the seed crystal side shown in the range S of FIG. 3(c), the inventors have obtained a view that the light output is less lowered even if the pit density is high.

在晶種側中,無關未摻雜Si,而從檢測出略1×1016 cm-3 之Si濃度的情況,認為Si對於Zn的擴散而言有抑制效果。In the seed crystal side, irrespective of undoped Si, and from the case where a Si concentration of slightly 1 × 10 16 cm -3 was detected, Si was considered to have an inhibitory effect on the diffusion of Zn.

依據此見解,在第2實施形態中,對於第1之傾斜基板10係摻雜Zn和較Zn濃度為低濃度之Si。即,各使用Zn設定濃度乃1.5×1018 cm-3 ,且Si設定濃度1.2×1016 cm-3 的基板,和Zn設定濃度乃2.0×1018 cm-3 ,且Si設定濃度1.4×1016 cm-3 的基板。其結果,如圖6(b),在經過1000小時,光輸出Po的變動係可縮小成初期值的±2%以下。然而,對於2個設定濃度之間的差異,未看到明顯差別。According to this finding, in the second embodiment, the first inclined substrate 10 is doped with Zn and Si having a relatively low concentration of Zn. That is, each of the substrates having a concentration of 1.5 × 10 18 cm -3 and a concentration of 1.2 × 10 16 cm -3 for Si is used, and the concentration of Zn is set to be 2.0 × 10 18 cm -3 , and the concentration of Si is set to 1.4 × 10 16 cm -3 substrate. As a result, as shown in FIG. 6(b), the fluctuation of the light output Po can be reduced to ±2% or less of the initial value after 1000 hours have elapsed. However, no significant difference was seen for the difference between the two set concentrations.

圖7係顯示對於光輸出Po的Si濃度之依存性的圖表。縱軸係初期相對亮度,橫軸係Si濃度(cm-3 )。Fig. 7 is a graph showing the dependence on the Si concentration of the light output Po. The vertical axis is the initial relative luminance, and the horizontal axis is the Si concentration (cm -3 ).

Zn濃度係作為7.0×1017 cm-3 ,Si濃度係作為5.0×1016 cm-3 、1.0×1017 cm-3 、1.5×1017 cm-3 、及2.0×1017 cm-3 。光輸出Po(亮度)係Si濃度乃越低而越高,在1.5×1017 cm-3 與2.0×1017 cm-3 之間急遽下降。即,Si濃度係略1.5×1017 cm-3 以下者為佳。然而,在任何Si濃度,在經過1000小時之光輸出Po的變動係為小的±2%以下。即,將Si濃度,作為較在單結晶單晶塊拉起之自動摻入為高,且1.5×1017 cm-3 以下時,作為保持光輸出Po同時,控制光輸出下降,進而控制晶圓面內特性變動(不均)之發光元件則變為容易。The Zn concentration was 7.0 × 10 17 cm -3 , and the Si concentration was 5.0 × 10 16 cm -3 , 1.0 × 10 17 cm -3 , 1.5 × 10 17 cm -3 , and 2.0 × 10 17 cm -3 . The light output Po (brightness) is the lower the Si concentration, the higher the ratio, and the sharp drop between 1.5 × 10 17 cm -3 and 2.0 × 10 17 cm -3 . That is, it is preferable that the Si concentration is slightly 1.5 × 10 17 cm -3 or less. However, at any Si concentration, the variation of the light output Po over 1000 hours is less than ±2%. That is, when the Si concentration is higher than the automatic incorporation of the single crystal single crystal block and is 1.5 × 10 17 cm -3 or less, the light output Po is controlled while the light output is lowered, and the wafer is controlled. A light-emitting element in which the in-plane characteristics vary (uneven) becomes easy.

如根據第1及第2實施形態,提供降低界面阻抗值之變動,進而改善在晶圓面內之動作電壓VF 及光輸出Po等之變動的發光元件。以上之發光元件係可廣泛應用於照明裝置、顯示裝置、信號機等。According to the first and second embodiments, it is possible to provide a light-emitting element which reduces fluctuations in the interface impedance value and further improves fluctuations in the operating voltage V F and the light output Po in the wafer surface. The above light-emitting elements can be widely applied to illumination devices, display devices, signal devices, and the like.

以上,參照圖面同時,已對於本發明之實施形態加以說明。但本發明則未加以限定於此等實施形態。關於構成本發明之單結晶單晶塊、基板、層積體、受主及供主等之不純物等之材質、尺寸、形狀、配置等,該業者即使有進行各種設計變更者,在不脫離本發明之主旨,均包含於本發明之範圍。The embodiments of the present invention have been described above with reference to the drawings. However, the present invention is not limited to the embodiments. The material, size, shape, arrangement, etc. of the single crystal single crystal block, the substrate, the laminate, the host, the donor, and the like which constitute the present invention are not changed from the design of the manufacturer. The gist of the invention is included in the scope of the invention.

10...第1之傾斜基板10. . . The first inclined substrate

12...黏接層12. . . Adhesive layer

20...接觸層20. . . Contact layer

22...電流擴散層twenty two. . . Current diffusion layer

24,28...包覆層24,28. . . Coating

26...發光層26. . . Luminous layer

30,36...黏接層30,36. . . Adhesive layer

34...第2之傾斜基板34. . . 2nd inclined substrate

32...層積體32. . . Laminated body

40...n側電極40. . . N-side electrode

44...p側電極44. . . P-side electrode

46...黏接界面46. . . Bonding interface

110...傾斜基板110. . . Tilting substrate

[圖1]乃有關第1實施形態的發光元件之模式剖面圖。Fig. 1 is a schematic cross-sectional view showing a light-emitting device of a first embodiment.

[圖2]乃有關本實施形態的發光元件之製造方法的工程剖面圖。Fig. 2 is an engineering sectional view showing a method of manufacturing a light-emitting element of the embodiment.

[圖3]乃說明傾斜基板的模式圖。FIG. 3 is a schematic view showing a tilted substrate.

[圖4]乃光輸出之晶圓面內分布。[Fig. 4] The in-plane distribution of the wafer of light output.

[圖5]乃動作電壓之晶圓面內分布。[Fig. 5] The in-plane distribution of the operating voltage.

[圖6]乃顯示在第2實施形態的光輸出變動之圖表Fig. 6 is a graph showing the variation of the light output in the second embodiment.

[圖7]乃顯示對於光輸出之Si濃度而言之依存性的圖。FIG. 7 is a graph showing the dependence on the Si concentration of the light output.

10...第1之傾斜基板10. . . The first inclined substrate

12...黏接層12. . . Adhesive layer

20...接觸層20. . . Contact layer

22...電流擴散層twenty two. . . Current diffusion layer

24,28...包覆層24,28. . . Coating

26...發光層26. . . Luminous layer

30...黏接層30. . . Adhesive layer

32...層積體32. . . Laminated body

40...n側電極40. . . N-side electrode

44...p側電極44. . . P-side electrode

46...黏接界面46. . . Bonding interface

Claims (4)

一種發光元件,其特徵係具備:摻雜鋅、和較前述鋅之濃度為低,且具有1×1016 cm-3 以上,5×1017 cm-3 以下之濃度的矽之GaP基板、和至少具有形成於前述GaP基板之發光層,包含Inx (Gay Al1-y )1-x P(惟0≦x≦1、0≦y≦1)之層積體;前述GaP基板係可透過來自前述發光層之放出光。A light-emitting element comprising: a zinc-doped, and a GaP substrate having a concentration lower than a concentration of zinc and having a concentration of 1 × 10 16 cm -3 or more and 5 × 10 17 cm -3 or less; a light-emitting layer formed on the GaP substrate, comprising a laminate of In x (Ga y Al 1-y ) 1-x P (only 0≦x≦1, 0≦y≦1); the GaP substrate may be Light is emitted from the luminescent layer. 如申請專利範圍第1項之發光元件,其中,前述GaP基板之導電型係p型者。 The light-emitting element of claim 1, wherein the conductive type of the GaP substrate is p-type. 如申請專利範圍第2項之發光元件,其中,更具備設於前述GaP基板與前述層積體間之黏著劑。 The light-emitting element according to claim 2, further comprising an adhesive provided between the GaP substrate and the laminate. 如申請專利範圍第1~3項之任一項之發光元件,其中,前述GaP基板係傾斜基板。 The light-emitting element according to any one of claims 1 to 3, wherein the GaP substrate is a tilted substrate.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62119191A (en) * 1985-11-19 1987-05-30 Nec Corp Production of semiconductor crystal
US20020050601A1 (en) * 2000-10-31 2002-05-02 Kabushiki Kaisha Toshiba Semiconductor light-emitting device and method of manufacturing the same
US20020185648A1 (en) * 1999-06-09 2002-12-12 Kabushiki Kaisha Toshiba Bonding type semiconductor substrate, semiconductor light emitting element, and preparation process thereof

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5624985A (en) * 1979-08-08 1981-03-10 Toshiba Corp Manufacture of gallium phosphide green light emitting element
JP2800954B2 (en) * 1991-07-29 1998-09-21 信越半導体 株式会社 Compound semiconductor single crystal
US6005258A (en) * 1994-03-22 1999-12-21 Toyoda Gosei Co., Ltd. Light-emitting semiconductor device using group III Nitrogen compound having emission layer doped with donor and acceptor impurities
JPH11116373A (en) * 1997-10-21 1999-04-27 Kobe Steel Ltd Compound semiconductor single crystal of low dislocation density, its production and apparatus for producing the same
JP4635079B2 (en) * 1999-06-09 2011-02-16 株式会社東芝 Manufacturing method of semiconductor light emitting device
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JP3737494B2 (en) * 2003-06-10 2006-01-18 株式会社東芝 Semiconductor light emitting device, method for manufacturing the same, and semiconductor light emitting device
JP2007123435A (en) * 2005-10-26 2007-05-17 Toshiba Corp Semiconductor light-emitting device and manufacturing method thereof
JP4953879B2 (en) * 2007-03-29 2012-06-13 スタンレー電気株式会社 Semiconductor device, manufacturing method thereof, and template substrate
JP5075786B2 (en) * 2008-10-06 2012-11-21 株式会社東芝 Light emitting device and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62119191A (en) * 1985-11-19 1987-05-30 Nec Corp Production of semiconductor crystal
US20020185648A1 (en) * 1999-06-09 2002-12-12 Kabushiki Kaisha Toshiba Bonding type semiconductor substrate, semiconductor light emitting element, and preparation process thereof
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