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TWI406070B - Thin film transistor substrate, display panel, display apparatus and manufacturing methods thereof - Google Patents

Thin film transistor substrate, display panel, display apparatus and manufacturing methods thereof Download PDF

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TWI406070B
TWI406070B TW97140070A TW97140070A TWI406070B TW I406070 B TWI406070 B TW I406070B TW 97140070 A TW97140070 A TW 97140070A TW 97140070 A TW97140070 A TW 97140070A TW I406070 B TWI406070 B TW I406070B
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substrate
conductive layer
forming
transmitting portion
light transmitting
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TW97140070A
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TW201017302A (en
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Bing Seng Wu
Bi Ly Lin
Chih Cheng Wang
Cheng Che Wu
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Innolux Corp
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Abstract

A thin film transistor substrate includes a plurality of data lines and a plurality of scan lines that define a plurality of pixel areas. Each pixel area has at least one pixel electrode, at least one storage electrode and a dielectric layer. The pixel electrode is disposed opposite to the storage electrode. The storage electrode has a transparent portion and a non-transparent portion. The dielectric layer is disposed between the storage electrode and the pixel electrode.

Description

薄膜電晶體基板、顯示面板、顯示裝置及其製造方法Thin film transistor substrate, display panel, display device and method of manufacturing same

本發明關於一種薄膜電晶體基板、顯示面板、顯示裝置及其製造方法。The present invention relates to a thin film transistor substrate, a display panel, a display device, and a method of fabricating the same.

請同時參考圖1A及圖1B,其中圖1A為習知之薄膜電晶體基板1的俯視圖,圖1B為圖1A中沿A-A線的剖面示意圖。薄膜電晶體基板1具有一畫素電極11、一儲存電極12、一介電層13及一基板14。儲存電極12設置於基板14上,畫素電極11設置於儲存電極12之上,而介電層13設置於畫素電極11及儲存電極12之間,使得畫素電極11及儲存電極12之間形成一儲存電容。1A and FIG. 1B, FIG. 1A is a plan view of a conventional thin film transistor substrate 1, and FIG. 1B is a cross-sectional view taken along line A-A of FIG. 1A. The thin film transistor substrate 1 has a pixel electrode 11, a storage electrode 12, a dielectric layer 13, and a substrate 14. The storage electrode 12 is disposed on the substrate 14, the pixel electrode 11 is disposed on the storage electrode 12, and the dielectric layer 13 is disposed between the pixel electrode 11 and the storage electrode 12, such that the pixel electrode 11 and the storage electrode 12 are disposed. A storage capacitor is formed.

由於儲存電容之電容值會影響畫面品質好壞,例如當電容值太小時畫面容易產生閃爍(flicker)及串音(cross-talk)等現象,因此,如何維持足夠之電容值係為必要之考量設計。常見的做法係利用不透光的金屬作為儲存電極,以提高儲存電容值,然而不透光的金屬將會導致畫素的開口率下降,進而對影像的顯示效果與品質造成影響。Since the capacitance value of the storage capacitor affects the quality of the picture, for example, when the capacitance value is too small, the picture is prone to flicker and cross-talk. Therefore, how to maintain sufficient capacitance is a necessary consideration. design. A common practice is to use an opaque metal as a storage electrode to increase the storage capacitance value. However, an opaque metal will cause a decrease in the aperture ratio of the pixel, thereby affecting the display effect and quality of the image.

有鑑於上述課題,本發明之目的為提供一種能提高電容值及開口率的薄膜電晶體基板、顯示面板、顯示裝置及 其製造方法。In view of the above problems, an object of the present invention is to provide a thin film transistor substrate, a display panel, and a display device capable of increasing a capacitance value and an aperture ratio. Its manufacturing method.

為達上述目的,依據本發明之一種薄膜電晶體基板包含複數行資料線以及複數列掃描線。該些資料線與該些掃描線定義出複數個畫素區域,其中每一畫素區域包含至少一畫素電極、至少一儲存電極以及一介電層。儲存電極與畫素電極相對而設,且儲存電極具有一透光部及一非透光部。介電層設置於儲存電極與畫素電極之間。To achieve the above object, a thin film transistor substrate according to the present invention comprises a plurality of rows of data lines and a plurality of columns of scan lines. The data lines and the scan lines define a plurality of pixel regions, wherein each pixel region includes at least one pixel electrode, at least one storage electrode, and a dielectric layer. The storage electrode is opposite to the pixel electrode, and the storage electrode has a light transmitting portion and a non-light transmitting portion. The dielectric layer is disposed between the storage electrode and the pixel electrode.

為達上述目的,依據本發明之一種顯示面板包含一對向基板及一薄膜電晶體基板。薄膜電晶體基板與對向基板相對而設,且薄膜電晶體基板具有複數行資料線及複數列掃描線,該些資料線與該些掃描線定義出複數個畫素區域,其中每一畫素區域內包含至少一畫素電極、至少一儲存電極及一介電層。儲存電極與畫素電極相對而設,且儲存電極具有一透光部及一非透光部。介電層設置於儲存電極與畫素電極之間。To achieve the above object, a display panel according to the present invention comprises a pair of substrates and a thin film transistor substrate. The thin film transistor substrate is opposite to the opposite substrate, and the thin film transistor substrate has a plurality of rows of data lines and a plurality of columns of scan lines, and the data lines and the scan lines define a plurality of pixel regions, wherein each pixel The area includes at least one pixel electrode, at least one storage electrode, and a dielectric layer. The storage electrode is opposite to the pixel electrode, and the storage electrode has a light transmitting portion and a non-light transmitting portion. The dielectric layer is disposed between the storage electrode and the pixel electrode.

為達上述目的,依據本發明之一種顯示裝置包含一背光模組及一顯示面板。顯示面板係鄰設於背光模組,其中顯示面板包含一對向基板及一薄膜電晶體基板。薄膜電晶體基板與對向基板相對而設,且薄膜電晶體基板包含至少一畫素電極、至少一儲存電極及一介電層。儲存電極與畫素電極相對而設,且儲存電極具有一透光部及一非透光部。介電層設置於儲存電極與畫素電極之間。To achieve the above objective, a display device according to the present invention comprises a backlight module and a display panel. The display panel is disposed adjacent to the backlight module, wherein the display panel comprises a pair of substrates and a thin film transistor substrate. The thin film transistor substrate is disposed opposite to the opposite substrate, and the thin film transistor substrate includes at least one pixel electrode, at least one storage electrode, and a dielectric layer. The storage electrode is opposite to the pixel electrode, and the storage electrode has a light transmitting portion and a non-light transmitting portion. The dielectric layer is disposed between the storage electrode and the pixel electrode.

為達上述目的,依據本發明之一種薄膜電晶體基板的製造方法包含以下步驟:於一基板上形成一儲存電極,其 中儲存電極具有一透光部及一非透光部;以及形成一畫素電極於儲存電極之上。In order to achieve the above object, a method for fabricating a thin film transistor substrate according to the present invention comprises the steps of: forming a storage electrode on a substrate, The middle storage electrode has a light transmitting portion and a non-light transmitting portion; and a pixel electrode is formed on the storage electrode.

為達上述目的,依據本發明之一種顯示面板的製造方法包含以下步驟:於一基板上形成一儲存電極,其中儲存電極具有一透光部及一非透光部;以及形成一畫素電極於儲存電極之上。In order to achieve the above object, a method for manufacturing a display panel according to the present invention includes the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode Above the storage electrode.

為達上述目的,依據本發明之一種顯示裝置的製造方法包含以下步驟:於一基板上形成一儲存電極,其中儲存電極具有一透光部及一非透光部;以及形成一畫素電極於儲存電極之上。In order to achieve the above object, a method of manufacturing a display device according to the present invention includes the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode Above the storage electrode.

承上所述,依據本發明之一種薄膜電晶體基板、顯示面板、顯示裝置及其製造方法,係將儲存電極與畫素電極相對而設,使得儲存電極的透光部及非透光部分別與畫素電極形成一儲存電容。本發明利用透光部以提高儲存電容值,相對地非透光部的面積可縮小,進而可提高畫素的開口率。According to the present invention, a thin film transistor substrate, a display panel, a display device, and a method of fabricating the same are provided, wherein the storage electrode is opposite to the pixel electrode, so that the light transmitting portion and the non-light transmitting portion of the storage electrode are respectively Forming a storage capacitor with the pixel electrode. In the present invention, the light-transmitting portion is used to increase the storage capacitance value, and the area of the non-light-transmitting portion can be reduced, thereby increasing the aperture ratio of the pixel.

以下將參照相關圖式,說明依本發明較佳實施例之薄膜電晶體基板、顯示面板、顯示裝置及其製造方法,其中相同的元件將以相同的參照符號加以說明。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a thin film transistor substrate, a display panel, a display device, and a method of fabricating the same according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings.

圖2為本發明較佳實施例之一種薄膜電晶體基板2的示意圖。薄膜電晶體基板2包含複數行資料線DL1 ~DLm 及複數列掃描線SL1 ~SLn ,該些資料線DL1 ~DLm 與該些 掃描線SL1 ~SLn 定義出複數個畫素區域,其中每一畫素區域包含至少一畫素電極21及至少一儲存電極22。2 is a schematic view of a thin film transistor substrate 2 in accordance with a preferred embodiment of the present invention. The thin film transistor substrate 2 includes a plurality of rows of data lines DL 1 to DL m and a plurality of columns of scan lines SL 1 to SL n , and the data lines DL 1 to DL m and the plurality of scan lines SL 1 to SL n define a plurality of pictures a pixel region, wherein each pixel region includes at least one pixel electrode 21 and at least one storage electrode 22.

請參照圖3A所示,為簡化說明,於此係以資料線DL1 及掃描線SL1 及其所構成的畫素區域為例說明。21資料線DL1 及掃描線SL1 鄰設於畫素電極21,且資料線DL1 係提供一資料電壓Vd 予一薄膜電晶體TFT1 ,並與畫素電極21電性連接。畫素電極21與掃描線SL1 的距離D1 及畫素電極21與資料線DL1 的距離D2 分別約大於等於3.5微米,以避免耦合電容效應過大而導致串音(cross talk)問題產生。Please refer to FIG. 3A. For simplification of description, the data line DL 1 and the scanning line SL 1 and the pixel area formed by the same are taken as an example. The data line DL 1 and the scan line SL 1 are adjacent to the pixel electrode 21, and the data line DL 1 provides a data voltage V d to the thin film transistor TFT 1 and is electrically connected to the pixel electrode 21. Pixel electrode 21 and the scan line SL 1 and the distance D 1 of the pixel electrode 21 and the data line DL of a distance D 2 of approximately 3.5 microns or greater, in order to avoid excessive coupling capacitance effect caused by crosstalk (cross talk) problems .

請再參考圖3B所示,其係為圖3A之薄膜電晶體基板2中沿B-B線的剖面圖,薄膜電晶體基板2包含一畫素電極21及一儲存電極22。儲存電極22與畫素電極21相對而設,儲存電極22具有一透光部221及一非透光部222。本實施例中,儲存電極22設置於一基板23之上,而畫素電極21設置於儲存電極22之上,儲存電極22與畫素電極21形成一儲存電容。Referring to FIG. 3B again, it is a cross-sectional view taken along line B-B of the thin film transistor substrate 2 of FIG. 3A. The thin film transistor substrate 2 includes a pixel electrode 21 and a storage electrode 22. The storage electrode 22 is opposite to the pixel electrode 21, and the storage electrode 22 has a light transmitting portion 221 and a non-light transmitting portion 222. In this embodiment, the storage electrode 22 is disposed on a substrate 23, and the pixel electrode 21 is disposed on the storage electrode 22. The storage electrode 22 and the pixel electrode 21 form a storage capacitor.

儲存電極22之非透光部222設置於透光部221之上,並相互接觸,當然,透光部221亦可設置於非透光部222之上,在此並不加以限制。其中透光部221的材質包含銦錫氧化物(ITO)、銦鋅氧化物(IZO)、鋁鋅氧化物(AZO)、鎵鋅氧化物(GZO)或氧化鋅(ZnO),而非透光部222的材質包含銅、鋁、鉬、銀、鉻、鈦、鎢或其組合。The non-transmissive portion 222 of the storage electrode 22 is disposed on the transparent portion 221 and is in contact with each other. Of course, the transparent portion 221 may be disposed on the non-transmissive portion 222, which is not limited herein. The material of the light transmitting portion 221 includes indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO) or zinc oxide (ZnO) instead of light transmission. The material of the portion 222 includes copper, aluminum, molybdenum, silver, chromium, titanium, tungsten, or a combination thereof.

薄膜電晶體基板2更包含一介電層24,其係設置於儲 存電極22與畫素電極21之間,介電層24至少包含一第一絕緣層241及一第二絕緣層242。於本實施例中,介電層24係以包含第一絕緣層241及第二絕緣層242為例,其中第一絕緣層241的材質包含氧化矽、氮化矽、氮氧化矽、氧化鋁、氮化鋁、氧化釩、氧化釕或氧化銥,而第二絕緣層242的材質包含氧化矽、氮化矽、氮氧化矽、氧化鋁或氧化鉭。The thin film transistor substrate 2 further includes a dielectric layer 24, which is disposed in the reservoir Between the storage electrode 22 and the pixel electrode 21, the dielectric layer 24 includes at least a first insulating layer 241 and a second insulating layer 242. In the present embodiment, the dielectric layer 24 is exemplified by the first insulating layer 241 and the second insulating layer 242. The material of the first insulating layer 241 includes yttrium oxide, tantalum nitride, hafnium oxynitride, aluminum oxide, Aluminum nitride, vanadium oxide, ruthenium oxide or ruthenium oxide, and the material of the second insulation layer 242 comprises ruthenium oxide, ruthenium nitride, ruthenium oxynitride, aluminum oxide or ruthenium oxide.

請再參考圖3A,需特別說明的是,透光部221的面積係可小於或等於畫素電極21的面積,且透光部221的長度與寬度均小於或等於畫素電極21的的長度與寬度。本實施例中,當透光部221及畫素電極21投影至同一平面,透光部221與部分畫素電極21重疊。由於儲存電容值與儲存電極之面積成正比且儲存電容值與一液晶電容值在不同的應用下需不同的設計比例,因此,藉由調整透光部221與非透光部222的面積大小,將可控制儲存電容值與液晶電容值的比例。由於本實施例中,儲存電容值之控制主要由儲存電極22中之透光部221貢獻,而非透光部222之主要功能為與透光部電性連接以提供儲存電極一共同電壓訊號,因此,相較於習知之儲存電極12,非透光部222的面積僅需大於足夠提供共同電壓訊號予非透光部的面積即可,同時亦可維持足夠的儲存電容值大小,進而提高畫素的開口率。Referring to FIG. 3A again, it should be particularly noted that the area of the transparent portion 221 may be less than or equal to the area of the pixel electrode 21, and the length and width of the transparent portion 221 are less than or equal to the length of the pixel electrode 21. With width. In the present embodiment, when the light transmitting portion 221 and the pixel electrode 21 are projected onto the same plane, the light transmitting portion 221 overlaps with the partial pixel electrode 21. Since the storage capacitor value is proportional to the area of the storage electrode and the storage capacitor value and the liquid crystal capacitor value are different in different applications, by adjusting the area of the light transmitting portion 221 and the non-light transmitting portion 222, The ratio of the storage capacitor value to the value of the liquid crystal capacitor can be controlled. In this embodiment, the control of the storage capacitor value is mainly contributed by the light transmitting portion 221 of the storage electrode 22, and the main function of the non-light transmitting portion 222 is to electrically connect with the light transmitting portion to provide a common voltage signal of the storage electrode. Therefore, compared with the conventional storage electrode 12, the area of the non-transmissive portion 222 only needs to be larger than the area sufficient to provide the common voltage signal to the non-transmissive portion, and at the same time, the storage capacitor value can be maintained, thereby improving the drawing. The aperture ratio of the prime.

由於考慮節能需求為未來之重要趨勢,開口率的增加在面板設計過程的考量將更加重要。以下請參照圖4A及 圖4B以說明增加開口率的實施態樣。如圖4A所示,與上述實施例不同的是,畫素電極21以及儲存電極22的透光部221可同時與資料線DL1 部分重合。而再如圖4B所示,與前述實施例不同的是,僅有畫素電極21與資料線DL1 部分重合。承上述,如此一來將能有效的增加開口率。As the consideration of energy saving needs is an important trend in the future, the increase in aperture ratio will be more important in the panel design process. Hereinafter, an embodiment in which the aperture ratio is increased will be described with reference to FIGS. 4A and 4B. 4A, the above-described embodiment except that the pixel electrode 21 and the light transmitting portion 22 of the storage electrodes 221 may be simultaneously coincident with a portion of data line DL. And then in FIG. 4B, with the different embodiments it is that only the pixel electrode 21 and the data line DL 1 partially overlap. In view of the above, it will effectively increase the aperture ratio.

請再參照圖4A所示,其中兩相鄰畫素區域中之儲存電極22的透光部221相距一距離D3 ,而兩相鄰畫素區域的畫素電極21之間相距一距離D4 ,其中距離D4 小於等於距離D3 ,且距離D3 與距離D4 之範圍均大於等於2微米,而在較佳實施例中,距離D4 為3到3.5微米。Referring to FIG. 4A again, the light transmitting portions 221 of the storage electrodes 22 in the two adjacent pixel regions are separated by a distance D 3 , and the pixel electrodes 21 of the two adjacent pixel regions are separated by a distance D 4 . Wherein the distance D 4 is less than or equal to the distance D 3 , and the range of the distance D 3 and the distance D 4 is greater than or equal to 2 μm, and in the preferred embodiment, the distance D 4 is 3 to 3.5 μm.

另外,在本實施例中,儲存電極22的非透光部221的邊界仍然位於畫素電極21之內,也就是儲存電極22的透光部221的長度與寬度均小於等於畫素電極21的長度與寬度。In addition, in the present embodiment, the boundary of the non-transmissive portion 221 of the storage electrode 22 is still located within the pixel electrode 21, that is, the length and width of the transparent portion 221 of the storage electrode 22 are both less than or equal to the pixel electrode 21. Length and width.

另外,依據本發明較佳實施例之一種顯示面板,例如係為一液晶顯示面板,其係具有一對向基板及一薄膜電晶體基板。薄膜電晶體基板與對向基板相對而設,其中薄膜電晶體基板包含一畫素電極及一儲存電極。儲存電極與畫素電極相對而設,儲存電極具有一透光部及一非透光部。由於薄膜電晶體基板之特徵已詳述於上,故不再贅述。In addition, a display panel according to a preferred embodiment of the present invention is, for example, a liquid crystal display panel having a pair of substrates and a thin film transistor substrate. The thin film transistor substrate is disposed opposite to the opposite substrate, wherein the thin film transistor substrate comprises a pixel electrode and a storage electrode. The storage electrode is opposite to the pixel electrode, and the storage electrode has a light transmitting portion and a non-light transmitting portion. Since the features of the thin film transistor substrate have been described in detail above, they will not be described again.

再者,依據本發明較佳實施例之一種顯示裝置,其例如係為一液晶顯示裝置,其係具有一背光模組及一顯示面板。顯示面板係鄰設於背光模組,其中顯示面板包含一對向基板及一薄膜電晶體基板。薄膜電晶體基板與對向基板 相對而設,其中薄膜電晶體基板包含一畫素電極及一儲存電極。儲存電極與畫素電極相對而設,儲存電極具有一透光部及一非透光部。由於薄膜電晶體基板之特徵已詳述於上,故不再贅述。Furthermore, a display device according to a preferred embodiment of the present invention is, for example, a liquid crystal display device having a backlight module and a display panel. The display panel is disposed adjacent to the backlight module, wherein the display panel comprises a pair of substrates and a thin film transistor substrate. Thin film transistor substrate and counter substrate In contrast, the thin film transistor substrate includes a pixel electrode and a storage electrode. The storage electrode is opposite to the pixel electrode, and the storage electrode has a light transmitting portion and a non-light transmitting portion. Since the features of the thin film transistor substrate have been described in detail above, they will not be described again.

接著,請參考圖5所示,依據本發明較佳實施例之薄膜電晶體基板的製造方法係包含步驟S11至步驟S13。請參照圖5及圖6A至圖6C以進一步說明本實施例之薄膜電晶體基板2的製造方法,其中圖6A至圖6E為薄膜電晶體基板的製造流程圖。Next, referring to FIG. 5, a method of manufacturing a thin film transistor substrate according to a preferred embodiment of the present invention includes steps S11 to S13. Referring to FIG. 5 and FIG. 6A to FIG. 6C, a method of manufacturing the thin film transistor substrate 2 of the present embodiment will be further described. FIGS. 6A to 6E are flowcharts showing the manufacture of the thin film transistor substrate.

如圖6A所示,步驟S11為於一基板23上形成一儲存電極22,其中儲存電極22具有一透光部221及一非透光部222。As shown in FIG. 6A, a storage electrode 22 is formed on a substrate 23, wherein the storage electrode 22 has a light transmitting portion 221 and a non-light transmitting portion 222.

如圖6B所示,步驟S12為於儲存電極22上形成一介電層24。其中介電層24包含一第一絕緣層241及一第二絕緣層242。As shown in FIG. 6B, step S12 is to form a dielectric layer 24 on the storage electrode 22. The dielectric layer 24 includes a first insulating layer 241 and a second insulating layer 242.

如圖6C所示,步驟S13為形成一畫素電極21於儲存電極22之上。As shown in FIG. 6C, step S13 is to form a pixel electrode 21 above the storage electrode 22.

在此需特別說明的是,步驟S11中,在形成儲存電極22的同時亦形成一薄膜電晶體的一閘極於基板23(圖未示),也就是說儲存電極22與薄膜電晶體之閘極位於同一層。以下請參照圖7及圖8A至圖8E,以更詳細的說明儲存電極的製造流程(即步驟S11)。如圖7所示,步驟S1更包含步驟S111至步驟S114,圖8A至圖8E為儲存電極的製造方法的製造流程示意圖。Specifically, in step S11, a gate of a thin film transistor is formed on the substrate 23 (not shown) while forming the storage electrode 22, that is, the gate of the storage electrode 22 and the thin film transistor. Extremely located on the same floor. Hereinafter, please refer to FIG. 7 and FIG. 8A to FIG. 8E to explain the manufacturing process of the storage electrode in more detail (ie, step S11). As shown in FIG. 7, step S1 further includes steps S111 to S114, and FIGS. 8A to 8E are schematic diagrams showing a manufacturing process of the method for manufacturing the storage electrode.

請同時參考圖7及圖8A,步驟S111為於基板23上形成一透光導電層L1Referring to FIG. 7 and FIG. 8A simultaneously, step S111 is to form a light-transmissive conductive layer L 1 on the substrate 23.

如圖8A所示,步驟S112為於透光導電層L1 上形成一非透光導電層L2 。其中透光導電層L1 及非透光導電層L2 形成的順序亦可對調,在此並不加以限制。8A, the step S112 of the light transmitting conductive layer L 1 to form a non-transparent conductive layer L 2. The order in which the light-transmitting conductive layer L 1 and the non-transmissive conductive layer L 2 are formed may also be reversed, and is not limited herein.

如圖8B所示,步驟S113為於非透光導電層L2 上形成一圖案化光阻層L3 。於本實施例中,係於非透光導電層L2 上塗佈一光阻層(圖未顯示),並利用半色調網點光罩M (Halftone mask)技術對非透光導電層L2 進行曝光與顯影製程,以形成圖案化光阻層L3 。值得一提的是,圖案化光阻層L3 亦可利用狹縫型光罩(Slit mask)技術對非透光導電層L2 進行曝光與顯影製程而形成。As shown in FIG. 8B, step S113 is to form a patterned photoresist layer L 3 on the non-transmissive conductive layer L 2 . In this embodiment, a photoresist layer (not shown) is coated on the non-transmissive conductive layer L 2 , and the non-transmissive conductive layer L 2 is performed by a halftone mask M (Halftone mask) technology. The exposure and development processes are performed to form a patterned photoresist layer L 3 . It is worth mentioning that the patterned photoresist layer L 3 can also be formed by performing an exposure and development process on the non-transmissive conductive layer L 2 by using a slit mask technique.

如圖8C所示,步驟S114為蝕刻部分透光導電層L1 及非透光導電層L2 以形成透光部221及非透光部222。於本實施例中,首先對圖案化光阻層L3 以外的部分,意即透光導電層L1 及非透光導電層L2 周圍未受圖案化光阻層L3 覆蓋的部分,進行蝕刻製程,以蝕刻透光部221及非透光部222周圍的部分,接著蝕刻圖案化光阻層L3 及部分非透光部222,以形成透光部221及非透光部222。8C, the step S114 is L 1 and non-transparent portions of the light-transmitting conductive layer is etched to form the conductive layer L 2 non-transmissive portion 221 and the light-transmissive portion 222. In this embodiment, first, the portion other than the patterned photoresist layer L 3 , that is, the portion of the transparent conductive layer L 1 and the non-transmissive conductive layer L 2 that is not covered by the patterned photoresist layer L 3 is performed. The etching process is performed to etch a portion around the light transmitting portion 221 and the non-light transmitting portion 222, and then the patterned photoresist layer L 3 and the partially non-light transmitting portion 222 are etched to form the light transmitting portion 221 and the non-light transmitting portion 222.

圖9顯示儲存電極的另一種製造方法的流程圖。如圖9所示,步驟S11更包含步驟S121至步驟S126,圖10A至圖10F為儲存電極的製造方法的製造流程示意圖。Figure 9 shows a flow chart of another method of manufacturing a storage electrode. As shown in FIG. 9, step S11 further includes steps S121 to S126, and FIGS. 10A to 10F are schematic diagrams showing a manufacturing process of the method for manufacturing the storage electrode.

如圖10A所示,步驟S121為於基板23上形成一非透光導電層L2As shown in FIG. 10A, step S121 is to form a non-transmissive conductive layer L 2 on the substrate 23.

如圖10A所示,步驟S122為於非透光導電層L2 上形成一第一圖案化光阻層L4 。於本實施例中,於非透光導電層L2 部分表面上塗佈一光阻層(圖未顯示),對非透光導電層L2 進行曝光與顯影製程,以形成第一圖案化光阻層L4As shown in FIG. 10A, step S122 is to form a first patterned photoresist layer L 4 on the non-transmissive conductive layer L 2 . In the present embodiment, the coating a photoresist layer (not shown), non-light-transmitting conductive layer is exposed to light L 2 and a development process to the L 2 portion of the surface of the non light-transmissive conductive layer to form a first patterned light Resistance layer L 4 .

如圖10B所示,步驟S123為蝕刻部分非透光導電層L2 以形成非透光部222。於本實施例中,對第一圖案化光阻層L4 及非透光導電層L2 進行蝕刻製程,以形成非透光部222。10B, the step S123 of the non-light-transmitting conductive layer is etched portion L 2 to form the non-transmissive portion 222. In the embodiment, the first patterned photoresist layer L 4 and the non-transmissive conductive layer L 2 are etched to form the non-transmissive portion 222.

如圖10C所示,步驟S124為於基板23及非透光部222上形成一透光導電層L110C, in step S124 to form a transparent conductive layer on the substrate 23 and non-transmissive portion 222 L 1.

如圖10C所示,步驟S125為於透光導電層L1 上形成一第二圖案化光阻層L5As shown in FIG. 10C, step S125 is to form a second patterned photoresist layer L 5 on the transparent conductive layer L 1 .

如圖10D所示,步驟S126為蝕刻部分透光導電層L1 以形成透光部221。於本實施例中,對第二圖案化光阻層L5 及透光導電層L1 進行蝕刻製程,以形成透光部221。10D, an etching step S126 partially transmissive conductive layer L 1 by the light-transmitting portion 221 is formed. In the embodiment, the second patterned photoresist layer L 5 and the light-transmitting conductive layer L 1 are etched to form the light-transmitting portion 221 .

以上透光部221及非透光部222形成的順序(即步驟S121至步驟S123及步驟S124至步驟S126)亦可對調,在此並不加以限制。The order in which the light transmitting portion 221 and the non-light transmitting portion 222 are formed (ie, step S121 to step S123 and step S124 to step S126) may be reversed, and is not limited herein.

另外,依據本發明較佳實施例一種顯示面板的製造方法包含以下步驟:於一基板上形成一儲存電極,其中儲存電極具有一透光部及一非透光部;以及形成一畫素電極於儲存電極之上。其中,顯示面板的製造方法更包含以下步驟:將一對向基板與基板相對而設;以及將一液晶層設置 於基板及對向基板之間。由於薄膜電晶體基板的製造方法已詳述於上,故不再贅述。In addition, a method for manufacturing a display panel according to a preferred embodiment of the present invention includes the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode Above the storage electrode. The manufacturing method of the display panel further includes the steps of: setting a pair of substrates opposite to the substrate; and setting a liquid crystal layer Between the substrate and the opposite substrate. Since the method of manufacturing the thin film transistor substrate has been described in detail above, it will not be described again.

再者,依據本發明較佳實施例之一種顯示裝置的製造方法包含以下步驟:於一基板上形成一儲存電極,其中儲存電極具有一透光部及一非透光部;以及形成一畫素電極於儲存電極之上。其中,顯示裝置的製造方法更包含以下步驟:將一對向基板與基板相對而設;將一液晶層設置於基板及對向基板之間;以及將一背光模組鄰設於基板。由於薄膜電晶體基板的製造方法已詳述於上,故不再贅述。Furthermore, a method of manufacturing a display device according to a preferred embodiment of the present invention includes the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel The electrode is above the storage electrode. The method for manufacturing a display device further includes the steps of: positioning a pair of substrates opposite to the substrate; disposing a liquid crystal layer between the substrate and the opposite substrate; and positioning a backlight module adjacent to the substrate. Since the method of manufacturing the thin film transistor substrate has been described in detail above, it will not be described again.

綜上所述,依據本發明之一種薄膜電晶體基板、顯示面板、顯示裝置及其製造方法,係將儲存電極與畫素電極相對而設,其中儲存電極的透光部及非透光部與畫素電極形成一儲存電容,由於儲存電極的面積增加,進而可提高儲存電容值。另外,由於可藉由透光部來使得儲存電容值提高,因此非透光部的面積可縮小,進而可提高畫素的開口率。According to the present invention, a thin film transistor substrate, a display panel, a display device, and a method of fabricating the same are provided, wherein the storage electrode is disposed opposite to the pixel electrode, wherein the light transmitting portion and the non-light transmitting portion of the storage electrode are The pixel electrode forms a storage capacitor, and the storage capacitor value is increased because the area of the storage electrode is increased. Further, since the storage capacitance value can be increased by the light transmitting portion, the area of the non-light transmitting portion can be reduced, and the aperture ratio of the pixel can be improved.

以上所述僅為舉例性,而非為限制性者。任何未脫離本發明之精神與範疇,而對其進行之等效修改或變更,均應包含於後附之申請專利範圍中。The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.

1、2‧‧‧薄膜電晶體基板1, 2‧‧‧thin film substrate

11、21‧‧‧畫素電極11, 21‧‧‧ pixel electrodes

12、22‧‧‧儲存電極12, 22‧‧‧ storage electrode

13、24‧‧‧介電層13, 24‧‧‧ dielectric layer

14、23‧‧‧基板14, 23‧‧‧ substrate

241‧‧‧第一絕緣層241‧‧‧First insulation

242‧‧‧第二絕緣層242‧‧‧Second insulation

14、23‧‧‧基板14, 23‧‧‧ substrate

221‧‧‧透光部221‧‧‧Transmission Department

222‧‧‧非透光部222‧‧‧ Non-transmission department

DL1 ~DLm ‧‧‧資料線DL 1 ~ DL m ‧‧‧ data line

D1 、D2 、D3 、D4 ‧‧‧距離D 1 , D 2 , D 3 , D 4 ‧‧‧ distance

SL1 ~SLn ‧‧‧掃描線SL 1 ~SL n ‧‧‧ scan line

L1 ‧‧‧透光導電層L 1 ‧‧‧Light conductive layer

L2 ‧‧‧非透光導電層L 2 ‧‧‧ non-transparent conductive layer

L3 ‧‧‧圖案化光阻層L 3 ‧‧‧ patterned photoresist layer

L4 ‧‧‧第一圖案化光阻層L 4 ‧‧‧First patterned photoresist layer

L5 ‧‧‧第二圖案化光阻層L 5 ‧‧‧Second patterned photoresist layer

M‧‧‧半色調網點光罩M‧‧‧ halftone dot mask

TFT1 ‧‧‧薄膜電晶體TFT 1 ‧‧‧thin film transistor

S11~S13‧‧‧薄膜電晶體基板的製造方法之步驟Steps for manufacturing a thin film transistor substrate of S11~S13‧‧

S111~S114、S121~S126‧‧‧儲存電極的製造方法之步驟S111~S114, S121~S126‧‧‧Steps for manufacturing the storage electrode

Vd ‧‧‧資料電壓V d ‧‧‧ data voltage

圖1A為一種習知薄膜電晶體基板的示意圖;圖1B為圖1A之A-A線的剖面圖;圖2為為依據本發明較佳實施例之一種薄膜電晶體基 板的示意圖;圖3A為依據本發明較佳實施例之一種薄膜電晶體基板之一畫素區域的示意圖;圖3B為圖3A之B-B線的剖面圖;圖4A及圖4B為依據本發明較佳實施例之一種薄膜電晶體基板之畫素區域的變化態樣示意圖;圖5為依據本發明較佳實施例之一種薄膜電晶體基板的製造方法的流程圖;圖6A至圖6C為圖5之薄膜電晶體基板的製造示意圖;圖7為圖5之形成儲存電極的製造方法的流程圖;圖8A至圖8E為圖7之薄膜電晶體基板的製造流程示意圖;圖9為圖5之形成儲存電極的另一種製造方法的流程圖;以及圖10A至圖10F為圖9之薄膜電晶體基板的製造流程示意圖。1A is a schematic view of a conventional thin film transistor substrate; FIG. 1B is a cross-sectional view taken along line A-A of FIG. 1A; and FIG. 2 is a thin film transistor base according to a preferred embodiment of the present invention. 3A is a schematic view of a pixel region of a thin film transistor substrate according to a preferred embodiment of the present invention; FIG. 3B is a cross-sectional view taken along line BB of FIG. 3A; FIG. 4A and FIG. 4B are diagrams according to the present invention. FIG. 5 is a flow chart showing a method for fabricating a thin film transistor substrate according to a preferred embodiment of the present invention; FIG. 6A to FIG. 6C are FIG. FIG. 7 is a flow chart of a method for fabricating a storage electrode of FIG. 5; FIG. 8A to FIG. 8E are schematic diagrams showing a manufacturing process of the thin film transistor substrate of FIG. 7; FIG. A flow chart of another manufacturing method of the storage electrode; and FIGS. 10A to 10F are schematic views showing a manufacturing process of the thin film transistor substrate of FIG.

2‧‧‧薄膜電晶體基板2‧‧‧Thin film transistor substrate

21‧‧‧畫素電極21‧‧‧ pixel electrodes

22‧‧‧儲存電極22‧‧‧Storage electrode

221‧‧‧透光部221‧‧‧Transmission Department

222‧‧‧非透光部222‧‧‧ Non-transmission department

23‧‧‧基板23‧‧‧Substrate

24‧‧‧介電層24‧‧‧ dielectric layer

241‧‧‧第一絕緣層241‧‧‧First insulation

242‧‧‧第二絕緣層242‧‧‧Second insulation

Claims (67)

一種薄膜電晶體基板,包含:複數行資料線;以及複數列掃描線,與該些資料線定義出複數個畫素區域,其中每一畫素區域內包含:至少一畫素電極,至少一儲存電極,與該畫素電極相對而設,該儲存電極具有一透光部及一非透光部,該透光部的邊界位於該畫素電極之內;及一介電層,設置於該儲存電極與該畫素電極之間。 A thin film transistor substrate comprising: a plurality of rows of data lines; and a plurality of columns of scan lines, wherein the plurality of pixel regions are defined, wherein each pixel region comprises: at least one pixel electrode, at least one of the pixels The electrode is disposed opposite to the pixel electrode, the storage electrode has a light transmitting portion and a non-light transmitting portion, the boundary of the light transmitting portion is located in the pixel electrode; and a dielectric layer is disposed in the storage Between the electrode and the pixel electrode. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該透光部的材質包含銦錫氧化物、銦鋅氧化物、鋁鋅氧化物、鎵鋅氧化物或氧化鋅。 The thin film transistor substrate according to claim 1, wherein the material of the light transmitting portion comprises indium tin oxide, indium zinc oxide, aluminum zinc oxide, gallium zinc oxide or zinc oxide. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該非透光部的材質包含銅、鋁、鉬、銀、鉻、鈦、鎢或其組合。 The thin film transistor substrate of claim 1, wherein the material of the non-light transmitting portion comprises copper, aluminum, molybdenum, silver, chromium, titanium, tungsten or a combination thereof. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該介電層包含一第一絕緣層及一第二絕緣層。 The thin film transistor substrate of claim 1, wherein the dielectric layer comprises a first insulating layer and a second insulating layer. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該透光部的面積小於該畫素電極的面積。 The thin film transistor substrate of claim 1, wherein the area of the light transmitting portion is smaller than the area of the pixel electrode. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該透光部的面積等於該畫素電極的面積。 The thin film transistor substrate of claim 1, wherein the area of the light transmitting portion is equal to the area of the pixel electrode. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該透光部的長度與寬度均小於該畫素電極的長度與寬 度。 The thin film transistor substrate of claim 1, wherein the length and width of the transparent portion are smaller than the length and width of the pixel electrode. degree. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該透光部的長度與寬度均等於該畫素電極的長度與寬度。 The thin film transistor substrate of claim 1, wherein the length and width of the light transmitting portion are equal to the length and width of the pixel electrode. 如申請專利範圍第1項所述之薄膜電晶體基板,其中各畫素電極與各掃描線的距離大於3.5微米。 The thin film transistor substrate of claim 1, wherein the distance between each of the pixel electrodes and each of the scanning lines is greater than 3.5 μm. 如申請專利範圍第1項所述之薄膜電晶體基板,其中各畫素電極與各掃描線的距離等於3.5微米。 The thin film transistor substrate of claim 1, wherein the distance between each of the pixel electrodes and each of the scanning lines is equal to 3.5 μm. 如申請專利範圍第1項所述之薄膜電晶體基板,其中相鄰的該些畫素的畫素電極間之距離大於2微米。 The thin film transistor substrate of claim 1, wherein the distance between the pixel electrodes of the adjacent pixels is greater than 2 micrometers. 如申請專利範圍第11項所述之薄膜電晶體基板,其中相鄰的該些畫素的畫素電極間之距離介於3微米至3.5微米之間。 The thin film transistor substrate of claim 11, wherein the distance between the pixel electrodes of the adjacent pixels is between 3 micrometers and 3.5 micrometers. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該非透光部設置於該透光部之上,並相互接觸。 The thin film transistor substrate of claim 1, wherein the non-light transmitting portion is disposed on the light transmitting portion and is in contact with each other. 如申請專利範圍第1項所述之薄膜電晶體基板,其中該透光部設置於該非透光部之上,並相互接觸。 The thin film transistor substrate of claim 1, wherein the light transmitting portion is disposed on the non-light transmitting portion and is in contact with each other. 一種顯示面板,包含:一對向基板;以及一薄膜電晶體基板,與該對向基板相對而設,該薄膜電晶體基板具有複數行資料線及複數列掃描線,該些資料線與該些掃描線定義出複數個畫素區域,其中每一畫素區域內包含:至少一畫素電極, 至少一儲存電極,與該畫素電極相對而設,該儲存電極具有一透光部及一非透光部,該透光部的邊界位於該畫素電極之內;及一介電層,設置於該儲存電極與該畫素電極之間。 A display panel comprising: a pair of substrates; and a thin film transistor substrate opposite to the opposite substrate, the thin film transistor substrate having a plurality of rows of data lines and a plurality of columns of scan lines, the data lines and the The scan line defines a plurality of pixel regions, wherein each pixel region includes: at least one pixel electrode, At least one storage electrode is disposed opposite to the pixel electrode, the storage electrode has a light transmitting portion and a non-light transmitting portion, the boundary of the light transmitting portion is located inside the pixel electrode; and a dielectric layer is disposed Between the storage electrode and the pixel electrode. 如申請專利範圍第15項所述之顯示面板,其中該透光部的材質包含銦錫氧化物、銦鋅氧化物、鋁鋅氧化物、鎵鋅氧化物或氧化鋅。 The display panel of claim 15, wherein the material of the light transmitting portion comprises indium tin oxide, indium zinc oxide, aluminum zinc oxide, gallium zinc oxide or zinc oxide. 如申請專利範圍第15項所述之顯示面板,其中該非透光部的材質包含銅、鋁、鉬、銀、鉻、鈦、鎢或其組合。 The display panel of claim 15, wherein the material of the non-light transmitting portion comprises copper, aluminum, molybdenum, silver, chromium, titanium, tungsten or a combination thereof. 如申請專利範圍第15項所述之顯示面板,其中該介電層包含一第一絕緣層及一第二絕緣層。 The display panel of claim 15, wherein the dielectric layer comprises a first insulating layer and a second insulating layer. 如申請專利範圍第15項所述之顯示面板,其中該透光部的面積小於該畫素電極的面積。 The display panel of claim 15, wherein the area of the light transmitting portion is smaller than the area of the pixel electrode. 如申請專利範圍第15項所述之顯示面板,其中該透光部的面積等於該畫素電極的面積。 The display panel of claim 15, wherein the area of the light transmitting portion is equal to the area of the pixel electrode. 如申請專利範圍第15項所述之顯示面板,其中該透光部的長度與寬度均小於該畫素電極的長度與寬度。 The display panel of claim 15, wherein the length and width of the light transmitting portion are both smaller than the length and width of the pixel electrode. 如申請專利範圍第15項所述之顯示面板,其中該透光部的長度與寬度均等於該畫素電極的長度與寬度。 The display panel of claim 15, wherein the length and width of the light transmitting portion are equal to the length and width of the pixel electrode. 如申請專利範圍第15項所述之顯示面板,其中該畫素電極與該資料線的距離及該畫素電極與該掃描線的距離大於3.5微米。 The display panel of claim 15, wherein a distance between the pixel electrode and the data line and a distance between the pixel electrode and the scan line is greater than 3.5 micrometers. 如申請專利範圍第15項所述之顯示面板,其中該畫 素電極與該資料線的距離及該畫素電極與該掃描線的距離等於3.5微米。 The display panel of claim 15, wherein the painting The distance between the element electrode and the data line and the distance between the pixel electrode and the scanning line are equal to 3.5 microns. 如申請專利範圍第15項所述之顯示面板,其中相鄰的該些畫素的該畫素電極間之距離大於2微米。 The display panel of claim 15, wherein the distance between the pixel electrodes of the adjacent pixels is greater than 2 micrometers. 如申請專利範圍第25項所述之顯示面板,其中相鄰的該些畫素的該畫素電極間之距離介於3微米至3.5微米之間。 The display panel of claim 25, wherein the distance between the pixel electrodes of the adjacent pixels is between 3 micrometers and 3.5 micrometers. 如申請專利範圍第15項所述之顯示面板,其中該儲存電極設置於一基板之上,而該畫素電極設置於該儲存電極之上。 The display panel of claim 15, wherein the storage electrode is disposed on a substrate, and the pixel electrode is disposed on the storage electrode. 如申請專利範圍第15項所述之顯示面板,其中該非透光部設置於該透光部之上,並相互接觸。 The display panel of claim 15, wherein the non-light transmitting portion is disposed on the light transmitting portion and is in contact with each other. 如申請專利範圍第15項所述之顯示面板,其中該透光部設置於該非透光部之上,並相互接觸。 The display panel of claim 15, wherein the light transmitting portion is disposed on the non-light transmitting portion and is in contact with each other. 如申請專利範圍第15項所述之顯示面板,更包含:一液晶層,設置於該薄膜電晶體基板及該對向基板之間。 The display panel of claim 15 further comprising: a liquid crystal layer disposed between the thin film transistor substrate and the opposite substrate. 一種顯示裝置,包含:一背光模組;以及一顯示面板,係鄰設於該背光模組,該顯示面板具有一對向基板及一薄膜電晶體基板,該薄膜電晶體基板與該對向基板相對而設,該薄膜電晶體基板具有複數行資料線及複數列掃描線,該些資料線與該些掃描線定義出複數個畫素區域,其中每一畫素區域 內包含:至少一畫素電極,至少一儲存電極,與該畫素電極相對而設,該儲存電極具有一透光部及一非透光部,該透光部的邊界位於該畫素電極之內;及一介電層,設置於該儲存電極與該畫素電極之間。 A display device includes: a backlight module; and a display panel disposed adjacent to the backlight module, the display panel having a pair of substrates and a thin film transistor substrate, the thin film transistor substrate and the opposite substrate In contrast, the thin film transistor substrate has a plurality of rows of data lines and a plurality of columns of scan lines, and the data lines and the scan lines define a plurality of pixel regions, wherein each pixel region The method includes: at least one pixel electrode, at least one storage electrode, opposite to the pixel electrode, the storage electrode has a light transmitting portion and a non-light transmitting portion, and the boundary of the light transmitting portion is located at the pixel electrode And a dielectric layer disposed between the storage electrode and the pixel electrode. 如申請專利範圍第31項所述之顯示裝置,其中該透光部的材質包含銦錫氧化物、銦鋅氧化物、鋁鋅氧化物、鎵鋅氧化物或氧化鋅。 The display device according to claim 31, wherein the material of the light transmitting portion comprises indium tin oxide, indium zinc oxide, aluminum zinc oxide, gallium zinc oxide or zinc oxide. 如申請專利範圍第31項所述之顯示裝置,其中該非透光部的材質包含銅、鋁、鉬、銀、鉻、鈦、鎢或其組合。 The display device of claim 31, wherein the material of the non-light transmitting portion comprises copper, aluminum, molybdenum, silver, chromium, titanium, tungsten or a combination thereof. 如申請專利範圍第31項所述之顯示裝置,其中該介電層包含一第一絕緣層及一第二絕緣層。 The display device of claim 31, wherein the dielectric layer comprises a first insulating layer and a second insulating layer. 如申請專利範圍第31項所述之顯示裝置,其中該透光部的面積小於該畫素電極的面積。 The display device according to claim 31, wherein the area of the light transmitting portion is smaller than the area of the pixel electrode. 如申請專利範圍第31項所述之顯示裝置,其中該透光部的面積等於該畫素電極的面積。 The display device of claim 31, wherein the area of the light transmitting portion is equal to the area of the pixel electrode. 如申請專利範圍第31項所述之顯示裝置,其中該透光部的長度與寬度均小於該畫素電極的邊長度與寬度。 The display device according to claim 31, wherein the length and width of the light transmitting portion are both smaller than the length and width of the side of the pixel electrode. 如申請專利範圍第31項所述之顯示裝置,其中該透光部的長度與寬度均等於該畫素電極的邊長度與寬度。 The display device of claim 31, wherein the length and width of the light transmitting portion are equal to the length and width of the edge of the pixel electrode. 如申請專利範圍第31項所述之顯示裝置,其中該畫素電極與該資料線的距離及該畫素電極與該掃描線的距離分別約大於3.5微米。 The display device of claim 31, wherein the distance between the pixel electrode and the data line and the distance between the pixel electrode and the scan line are respectively greater than about 3.5 microns. 如申請專利範圍第31項所述之顯示裝置,其中該畫素電極與該資料線的距離及該畫素電極與該掃描線的距離分別約等於3.5微米。 The display device of claim 31, wherein the distance between the pixel electrode and the data line and the distance between the pixel electrode and the scan line are respectively equal to about 3.5 micrometers. 如申請專利範圍第31項所述之顯示裝置,其中相鄰的該些畫素的畫素電極間之距離大於2微米。 The display device of claim 31, wherein the distance between the pixel electrodes of the adjacent pixels is greater than 2 micrometers. 如申請專利範圍第41項所述之顯示裝置,其中相鄰的該些畫素的畫素電極間之距離介於3微米至3.5微米之間。 The display device of claim 41, wherein the distance between the pixel electrodes of the adjacent pixels is between 3 micrometers and 3.5 micrometers. 如申請專利範圍第31項所述之顯示裝置,其中該儲存電極設置於一基板之上,而該畫素電極設置於該儲存電極之上。 The display device of claim 31, wherein the storage electrode is disposed on a substrate, and the pixel electrode is disposed on the storage electrode. 如申請專利範圍第31項所述之顯示裝置,其中該非透光部設置於該透光部之上,並相互接觸。 The display device according to claim 31, wherein the non-transmissive portion is disposed above the light transmitting portion and is in contact with each other. 如申請專利範圍第31項所述之顯示裝置,其中該透光部設置於該非透光部之上,並相互接觸。 The display device of claim 31, wherein the light transmitting portion is disposed on the non-light transmitting portion and is in contact with each other. 如申請專利範圍第31項所述之顯示裝置,其中該顯示面板更包含:一液晶層,設置於該薄膜電晶體基板及該對向基板之間。 The display device of claim 31, wherein the display panel further comprises: a liquid crystal layer disposed between the thin film transistor substrate and the opposite substrate. 一種薄膜電晶體基板的製造方法,包含以下步驟:於一基板上形成一儲存電極,其中該儲存電極具有一 透光部及一非透光部;以及形成一畫素電極於該儲存電極之上,其中該透光部的邊界位於該畫素電極之內。 A method for manufacturing a thin film transistor substrate, comprising the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode on the storage electrode, wherein a boundary of the light transmitting portion is located inside the pixel electrode. 如申請專利範圍第47項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一透光導電層;於該透光導電層上形成一非透光導電層;於該非透光導電層上形成一圖案化光阻層;以及蝕刻部分該透光導電層及該非透光導電層以形成該透光部及該非透光部。 The manufacturing method of claim 47, wherein the forming the storage electrode on the substrate comprises the steps of: forming a light-transmissive conductive layer on the substrate; forming a non-transparent light on the transparent conductive layer a conductive layer; forming a patterned photoresist layer on the non-transmissive conductive layer; and etching the partially transparent conductive layer and the non-transmissive conductive layer to form the transparent portion and the non-transmissive portion. 如申請專利範圍第48項所述之製造方法,其中於該基板上形成圖案化光阻層係利用半色調網點光罩技術對該光阻層進行曝光與顯影製程。 The manufacturing method according to claim 48, wherein the patterned photoresist layer is formed on the substrate by exposing and developing the photoresist layer using a halftone dot mask technique. 如申請專利範圍第47項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一非透光導電層;於該非透光導電層上形成一第一圖案化光阻層;蝕刻部分該非透光導電層以形成該非透光部;於該基板及該非透光部上形成一透光導電層;於該透光導電層上形成一第二圖案化光阻層;以及蝕刻部分該透光導電層以形成該透光部。 The manufacturing method of claim 47, wherein the forming the storage electrode on the substrate comprises the steps of: forming a non-transmissive conductive layer on the substrate; forming a first on the non-transmissive conductive layer Patterning the photoresist layer; etching the non-transmissive conductive layer to form the non-transmissive portion; forming a light-transmissive conductive layer on the substrate and the non-transmissive portion; forming a second patterned light on the transparent conductive layer a resist layer; and etching the partially transparent conductive layer to form the light transmissive portion. 如申請專利範圍第47項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一透光導電層; 於該透光導電層上形成一第一圖案化光阻層;蝕刻部分該透光導電層以形成該透光部;於該基板及該透光部上形成一非透光導電層;於該非透光導電層上形成一第二圖案化光阻層;以及蝕刻部分該非透光導電層以形成該非透光部。 The manufacturing method of claim 47, wherein the forming the storage electrode on the substrate comprises the steps of: forming a light-transmissive conductive layer on the substrate; Forming a first patterned photoresist layer on the transparent conductive layer; etching the partially transparent conductive layer to form the transparent portion; forming a non-transmissive conductive layer on the substrate and the transparent portion; Forming a second patterned photoresist layer on the light-transmissive conductive layer; and etching the portion of the non-transmissive conductive layer to form the non-transmissive portion. 如申請專利範圍第47項所述之製造方法,其中於形成一畫素電極於該儲存電極上前更包含一步驟:於該儲存電極上形成一介電層。 The manufacturing method of claim 47, further comprising the step of forming a dielectric layer on the storage electrode before forming the pixel electrode on the storage electrode. 一種顯示面板的製造方法,包含以下步驟:於一基板上形成一儲存電極,其中該儲存電極具有一透光部及一非透光部;以及形成一畫素電極於該儲存電極之上,其中該透光部的邊界位於該畫素電極之內。 A manufacturing method of a display panel, comprising the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode on the storage electrode, wherein The boundary of the light transmitting portion is located inside the pixel electrode. 如申請專利範圍第53項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一透光導電層;於該透光導電層上形成一非透光導電層;於該非透光導電層上形成一圖案化光阻層;以及蝕刻部分該透光導電層及該非透光導電層以形成該透光部及該非透光部。 The manufacturing method of claim 53, wherein the forming the storage electrode on the substrate comprises the steps of: forming a light-transmissive conductive layer on the substrate; forming a non-transparent light on the transparent conductive layer a conductive layer; forming a patterned photoresist layer on the non-transmissive conductive layer; and etching the partially transparent conductive layer and the non-transmissive conductive layer to form the transparent portion and the non-transmissive portion. 如申請專利範圍第54項所述之製造方法,其中於該基板上形成圖案化光阻層係利用半色調網點光罩技術對光阻層進行曝光與顯影製程。 The manufacturing method according to claim 54, wherein the patterning the photoresist layer on the substrate is performed by using a halftone dot mask technique to expose and develop the photoresist layer. 如申請專利範圍第53項所述之製造方法,其中於該 基板上形成該儲存電極係包含以下步驟:於該基板上形成一非透光導電層;於該非透光導電層上形成一第一圖案化光阻層;蝕刻部分該非透光導電層以形成該非透光部;於該基板及該非透光部上形成一透光導電層;於該透光導電層上形成一第二圖案化光阻層;以及蝕刻部分該透光導電層以形成該透光部。 The manufacturing method of claim 53, wherein Forming the storage electrode on the substrate comprises the steps of: forming a non-transmissive conductive layer on the substrate; forming a first patterned photoresist layer on the non-transmissive conductive layer; etching the non-transmissive conductive layer to form the non-transmissive conductive layer a transparent portion; a transparent conductive layer is formed on the substrate and the non-transmissive portion; a second patterned photoresist layer is formed on the transparent conductive layer; and the transparent conductive layer is etched to form the transparent unit. 如申請專利範圍第53項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一透光導電層;於該透光導電層上形成一第一圖案化光阻層;蝕刻部分該透光導電層以形成該透光部;於該基板及該透光部上形成一非透光導電層;於該非透光導電層上形成一第二圖案化光阻層;以及蝕刻部分該非透光導電層以形成該非透光部。 The manufacturing method of claim 53, wherein the forming the storage electrode on the substrate comprises the steps of: forming a light-transmissive conductive layer on the substrate; forming a first pattern on the light-transmissive conductive layer a light-resisting layer; the light-transmissive conductive layer is etched to form the light-transmitting portion; a non-transmissive conductive layer is formed on the substrate and the light-transmitting portion; and a second patterned light is formed on the non-transmissive conductive layer a resist layer; and etching the portion of the non-transmissive conductive layer to form the non-transmissive portion. 如申請專利範圍第53項所述之製造方法,其中於形成一畫素電極於該儲存電極上前更包含一步驟:於該儲存電極上形成一介電層。 The manufacturing method of claim 53, wherein the forming of the pixel electrode on the storage electrode further comprises a step of forming a dielectric layer on the storage electrode. 如申請專利範圍第58項所述之製造方法,更包含以下步驟:將一對向基板與該基板相對而設;以及將一液晶層設置於該基板及該對向基板之間。 The manufacturing method according to claim 58, further comprising the steps of: facing a pair of substrates opposite to the substrate; and disposing a liquid crystal layer between the substrate and the opposite substrate. 一種顯示裝置的製造方法,包含以下步驟:於一基板上形成一儲存電極,其中該儲存電極具有一 透光部及一非透光部;以及形成一畫素電極於該儲存電極之上,其中該透光部的邊界位於該畫素電極之內。 A manufacturing method of a display device, comprising the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode on the storage electrode, wherein a boundary of the light transmitting portion is located inside the pixel electrode. 如申請專利範圍第60項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一透光導電層;於該透光導電層上形成一非透光導電層;於該非透光導電層上形成一圖案化光阻層;以及蝕刻部分該透光導電層及該非透光導電層以形成該透光部及該非透光部。 The manufacturing method of claim 60, wherein the forming the storage electrode on the substrate comprises the steps of: forming a light-transmissive conductive layer on the substrate; forming a non-transparent light on the light-transmissive conductive layer a conductive layer; forming a patterned photoresist layer on the non-transmissive conductive layer; and etching the partially transparent conductive layer and the non-transmissive conductive layer to form the transparent portion and the non-transmissive portion. 如申請專利範圍第61項所述之製造方法,其中於該基板上形成圖案化光阻層係利用半色調網點光罩技術對光阻層進行曝光與顯影製程。 The manufacturing method according to claim 61, wherein the patterned photoresist layer is formed on the substrate, and the photoresist layer is exposed and developed by a halftone dot mask technique. 如申請專利範圍第60項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一非透光導電層;於該非透光導電層上形成一第一圖案化光阻層;蝕刻部分該非透光導電層以形成該非透光部;於該基板及該非透光部上形成一透光導電層;於該透光導電層上形成一第二圖案化光阻層;以及蝕刻部分該透光導電層以形成該透光部。 The manufacturing method of claim 60, wherein the forming the storage electrode on the substrate comprises the steps of: forming a non-transmissive conductive layer on the substrate; forming a first on the non-transmissive conductive layer Patterning the photoresist layer; etching the non-transmissive conductive layer to form the non-transmissive portion; forming a light-transmissive conductive layer on the substrate and the non-transmissive portion; forming a second patterned light on the transparent conductive layer a resist layer; and etching the partially transparent conductive layer to form the light transmissive portion. 如申請專利範圍第60項所述之製造方法,其中於該基板上形成該儲存電極係包含以下步驟:於該基板上形成一透光導電層; 於該透光導電層上形成一第一圖案化光阻層;蝕刻部分該透光導電層以形成該透光部;於該基板及該透光部上形成一非透光導電層;於該非透光導電層上形成一第二圖案化光阻層;以及蝕刻部分該非透光導電層以形成該非透光部。 The manufacturing method of claim 60, wherein the forming the storage electrode on the substrate comprises the steps of: forming a light-transmissive conductive layer on the substrate; Forming a first patterned photoresist layer on the transparent conductive layer; etching the partially transparent conductive layer to form the transparent portion; forming a non-transmissive conductive layer on the substrate and the transparent portion; Forming a second patterned photoresist layer on the light-transmissive conductive layer; and etching the portion of the non-transmissive conductive layer to form the non-transmissive portion. 如申請專利範圍第60項所述之製造方法,其中於形成一畫素電極於該儲存電極上前更包含一步驟:於該儲存電極上形成一介電層。 The manufacturing method of claim 60, further comprising the step of forming a dielectric layer on the storage electrode before forming the pixel electrode on the storage electrode. 如申請專利範圍第65項所述之製造方法,更包含以下步驟:將一對向基板與該基板相對而設;以及將一液晶層設置於該基板及該對向基板之間。 The manufacturing method according to claim 65, further comprising the steps of: facing a pair of substrates opposite to the substrate; and disposing a liquid crystal layer between the substrate and the opposite substrate. 如申請專利範圍第66項所述之製造方法,更包含一步驟:將一背光模組鄰設於該基板。 The manufacturing method of claim 66, further comprising the step of: arranging a backlight module adjacent to the substrate.
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