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TWI361476B - Semiconductor package and display apparatus - Google Patents

Semiconductor package and display apparatus Download PDF

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Publication number
TWI361476B
TWI361476B TW096136896A TW96136896A TWI361476B TW I361476 B TWI361476 B TW I361476B TW 096136896 A TW096136896 A TW 096136896A TW 96136896 A TW96136896 A TW 96136896A TW I361476 B TWI361476 B TW I361476B
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Taiwan
Prior art keywords
substrate
liquid crystal
terminals
semiconductor wafer
semiconductor
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TW096136896A
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Chinese (zh)
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TW200824057A (en
Inventor
Tatsuya Katoh
Satoru Kudose
Tomokatsu Nakagawa
Toshiya Tsukao
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Sharp Kk
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Publication of TW200824057A publication Critical patent/TW200824057A/en
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Publication of TWI361476B publication Critical patent/TWI361476B/en

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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal (AREA)
  • Wire Bonding (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

In a tape carrier type semiconductor package having an interposer substrate, connection terminals and wiring are provided on the interposer substrate and upsizing of a semiconductor package incident to upsizing of the interposer substrate is inevitable as the number of connection terminals increases. The inventive semiconductor package where a semiconductor chip is connected with a film substrate through the interposer substrate, characterized in that the semiconductor chip is provided with a plurality of terminals respectively on two opposing sides and connected, on the interposer substrate, while being shifted from the center of the interposer substrate to the side of one of two sides having a fewer terminals.

Description

1361476 九、發明說明： 【發明所屬之技術領域】 本發明係關於半導體封裝體及使用其之顯示裝置。尤 其，係關於經由互連基板，連接ic晶片與薄膜基板之帶载 型半導體封裝體及使用其之顯示裝置。 【先前技術】 近年，伴隨搭載半導體裝置之電子機器的高功能化，達 成半導體裝置小型化及積體化，並開發各種類型的半導體 封裝體。該半導體封裝體之一係提案帶載型半導體封裝 體’其係稱為TCP(Tape Carrier Package :帶載封裝體）咬 COF(Chip On Film :薄膜上晶片）。 TCP半導體封裝體係在薄膜基材上具有由銅箔等的金屬 圖案所形成之引線之封裝體，將1(:晶片覆晶連接而安裝於 從形成於薄膜基材之穿通孔（裝置孔）突出引線前端而形成 之飛線。溥膜基材具柔軟性’故可凹折，且可多端.子微間 距化’並可以既存的覆晶接合技術對應，從而多用於代表 液晶顯示裝置之薄型顯示裝置的驅動器IC用封裝體。 COF半導體封裝體不具有如以往之TCp半導體封裝體的 飛線’其具有以薄膜基材支持引線之構造。因此，可使用 更薄的布線材（銅箔），再者，其係可形成微間距引線之封 裝體技術，因半導體封裝體小型化及積體化的要求，近年 使用情況很多。 此外，COF半導體封裝體的形態之一係有具如圖9所示 的互連基板（中間基板）之C〇f半導體封裝體（參照專利文獻 125226.doc 1361476 1)。該形態之COF半導體封裝體31藉由在一個半導體封裝 體中内藏互連基板33(中間基板），並在封裝體内部進行IC 晶片32與互連基板33之連接，可高密度地安裝半導體元 件。1361476 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a semiconductor package and a display device using the same. In particular, it relates to a tape-type semiconductor package in which an ic wafer and a film substrate are connected via an interconnect substrate, and a display device using the same. [Prior Art] In recent years, with the increase in the functionality of electronic devices equipped with semiconductor devices, semiconductor devices have been miniaturized and integrated, and various types of semiconductor packages have been developed. One of the semiconductor packages is a tape-type semiconductor package, which is called a TCP (Tape Carrier Package) bite COF (Chip On Film). The TCP semiconductor package system has a package of a lead formed of a metal pattern such as copper foil on a film substrate, and the wafer is bonded to the through hole (device hole) formed in the film substrate. The flying wire formed by the front end of the lead wire. The enamel film substrate has flexibility, so it can be concavely folded, and can be multi-end. Sub-micro-pitching can be used for the existing flip-chip bonding technology, so that it is mostly used for representing a thin display of a liquid crystal display device. A package for a driver IC of a device. The COF semiconductor package does not have a flying wire of a conventional TCp semiconductor package, which has a structure in which a lead substrate is supported by a film substrate. Therefore, a thinner wiring material (copper foil) can be used. Furthermore, it is a package technology that can form micro pitch leads, and has been used in recent years due to the miniaturization and integration of semiconductor packages. In addition, one of the forms of COF semiconductor packages is as shown in FIG. A C〇f semiconductor package of the interconnect substrate (intermediate substrate) is shown (refer to Patent Document 125226.doc 1361476 1). The COF semiconductor package 31 of this form is used in a semiconductor Built-in casing 33 interconnect substrate (intermediate substrate), and the IC chip 33 in the package 32 is connected to the interconnect substrate, high-density mounting of the semiconductor element.

再者’半導體封裝體’例如，如同液晶顯示裝置的，藉 由伴隨所搭載電子機器高性能化之IC晶片的輸出入端子多 接腳化，有進一步要求微間距化之傾向。 [專利文獻1]曰本國公開專利公報「特開2004-207556號 公報（公開日：2004年7月22日）」 【發明内容】 具有如上述的互連基板之帶載型半導體封裝體中，在互 連基板上設置連接端子及布線，但因連接端子數增加，而 有以下問題：無法避免伴隨互連基板大型化之半導體封裝 體大型化。Further, the semiconductor package is, for example, a liquid crystal display device, and the input/output terminals of the IC chip with high performance of the mounted electronic device are often pinned, and there is a tendency for fine pitch to be further required. [Patent Document 1] Japanese Laid-Open Patent Publication No. 2004-207556 (Publication Date: July 22, 2004). SUMMARY OF THE INVENTION In a tape-type semiconductor package having an interconnect substrate as described above, Although the connection terminal and the wiring are provided on the interconnect substrate, the number of connection terminals is increased, and there is a problem that the size of the semiconductor package in which the size of the interconnection substrate is increased cannot be avoided.

者，因互連基板，例如係由石夕等半導體材料所形成， 故有無法避免互連基板大型化所造成之成本增加的問題。 尤其’ 1C晶片的輸人端子數與輸出端子數不同時，互連 基板的端子數少之側的互連基板空間相對於端子數多之側 的互連基板工間’大於所需，而構成半導體封裝體大型化 之要因。 因此 纟發明之目的在於提供帶難半導體封裝體，其 可配置連接端子及布線，而 „ L 个冷將互連基板大型化為必要 以上 尤其 本發明之目的在於提供㈣料導體封裝體，其 125226.doc 1361476 在ic曰曰片的輸入端子數與輸出端子數不同時，可配置連接 端子及布線’而不需將互連基板大型化為必要以上。 本發明之第一局面之半導體封裝體，其係半導體晶片經 由互連基板而連接於薄膜基板者，其特徵係：半導體晶片 的中心位置與互連基板的十心位置不同。 本發明之第二局面之半導體封裝體，其係半導體晶片經 由互連基板而連接於薄膜基板者，其特徵係：半導體晶片 至少於相對的兩邊分別具有複數端子，再者，於互連基 板，從互連基板中心偏移連接於相對的兩邊中端子數少的 一方側。另外，也可在相對的兩邊以外之邊配置端子。 本發明之第二局面之半導體封裝體，其係半導體晶片經 由互連基板而連接於薄膜基板者，其特徵係：半導體晶片 至少於相對的兩邊分別具有複數端子，互連基板至少I相 對的兩邊分別具有連接於薄膜基板之薄膜基板連接端子， 並在薄膜基板連接端子内侧具有複數半導體晶片連接端 子，其係與配置於半導體晶片相對的兩邊之複數端子連 接；互連基板相對的兩邊各自之薄膜基板連接端子與半導 體晶片連接端子之距離，在半導體晶片連接端子的端子數 少者係比另一方短。 本發明之第四局面之半導體封裝體，其係半導體晶片經 由互連基板而連接於薄膜基板者，其特徵係：半導體晶片 至少於相對的兩邊分別具有複數端子，薄膜基板具有裝置 孔’且半導體晶片位於裝置孔内；再者，《置孔相對的兩 邊各自之+導體晶片端面與裝置孔端面之距離，在前述半 125226.doc 1361476 導體晶片相對的兩邊中端子數少者係比另一方短。 此外，本發明之半導體封裝體，.其特徵係：在半導體晶 片相對的兩邊中的一邊配置至半導體晶片之輸入信號： 子’並在另—邊配置來自半導體晶片之輸出信號端子。 :者，本發明之半導體封裝體，其特徵係：輸出信號端 子的端子數比輸入信號端子的端子數多。 又，本發明之半導體封裝體，其特徵係： 所構成。 互連基板由矽 此外，本發明之半導體封裝體，其特徵係：半導體 為液晶驅動器。 aa 本發明之顯示裝置，其特徵係：具有上述任一半導體封 裝體。 根據本發明之半導體封裝體，可配置連接端子及布線， 而不會使互連基板過度大型化。 旦此外’可抑制用於互連基板之高價石夕等的半導體材料 里’並可抑制成本增加。 再者，本發明之其他目的、特徵及優點藉由以下所示之 記載當可充分明白。又’本發明之利益藉由參照附圖^以 下說明當可明白。 【實施方式】 以下，參照圖說明本發明之實施形態。另外，在此，以 才木用有本發明之半導體封裝體之液晶驅動器封裝體為例 行說明。 & (實施形態1) 125226.doc 1361476 圖1係本發明實施形態丨之液晶驅動器封裝體的平面圖。 圖2係從切斷面線Α_Α’觀看圖！所示之液晶驅動器封裝體的 剖面圖。再者，圖3係液晶驅動器2與互連基板3之連接的 說明圖。以下，參照…、圖2及圖3,針對液晶驅動器封 裝體的概略構成進行說明。 本實施形態之液晶驅動器封裝體i係c〇F(Chip加 Fihnl帛覆晶封裝）半導體封裝體，至彡具有液晶驅動Since the interconnect substrate is formed of, for example, a semiconductor material such as Shi Xi, there is a problem that the cost caused by the increase in the size of the interconnect substrate cannot be avoided. In particular, when the number of input terminals of the 1C chip is different from the number of output terminals, the interconnection substrate space on the side where the number of terminals of the interconnection substrate is small is larger than the required number of interconnection substrate spaces on the side of the number of terminals. The main reason for the large size of semiconductor packages. Accordingly, it is an object of the invention to provide a packaged semiconductor package having configurable connection terminals and wiring, and „L cold to increase the size of the interconnection substrate as necessary. In particular, it is an object of the present invention to provide a (four) material conductor package. 125226.doc 1361476 When the number of input terminals of the ic chip is different from the number of output terminals, the connection terminal and the wiring can be arranged without increasing the size of the interconnection substrate more than necessary. The semiconductor package of the first aspect of the present invention The semiconductor wafer is connected to the thin film substrate via the interconnect substrate, and is characterized in that the central position of the semiconductor wafer is different from the ten-center position of the interconnect substrate. The semiconductor package of the second aspect of the present invention is a semiconductor The wafer is connected to the film substrate via the interconnect substrate, wherein the semiconductor wafer has a plurality of terminals at least on opposite sides, and further, the interconnect substrate is offset from the center of the interconnect substrate to the opposite ends. The side of the second aspect of the present invention may be arranged on the side opposite to the opposite sides. a package, wherein the semiconductor wafer is connected to the film substrate via the interconnect substrate, wherein the semiconductor wafer has a plurality of terminals at least on opposite sides thereof, and at least two opposite sides of the interconnect substrate have a film connected to the film substrate. a substrate connection terminal, and a plurality of semiconductor wafer connection terminals on the inner side of the film substrate connection terminal, which are connected to a plurality of terminals disposed on opposite sides of the semiconductor wafer; and a film substrate connection terminal and a semiconductor wafer connection terminal on opposite sides of the interconnection substrate The distance between the semiconductor chip connection terminals and the number of terminals is shorter than the other. The semiconductor package of the fourth aspect of the present invention is a semiconductor wafer that is connected to a film substrate via an interconnection substrate, and is characterized by a semiconductor. The wafer has a plurality of terminals on at least opposite sides, the film substrate has a device hole 'and the semiconductor wafer is located in the device hole; and further, the distance between the opposite side of the opposite side of the hole and the end face of the device hole in the opposite half of the hole 125226.doc 1361476 Conductor wafer phase Further, the number of terminals on both sides is shorter than the other. Further, the semiconductor package of the present invention is characterized in that an input signal to a semiconductor chip is disposed on one of opposite sides of the semiconductor wafer: sub' and another The semiconductor package of the present invention is characterized in that the number of terminals of the output signal terminal is larger than the number of terminals of the input signal terminal. Further, the semiconductor package of the present invention is characterized. In addition, the semiconductor package of the present invention is characterized in that the semiconductor is a liquid crystal driver. Aa The display device of the present invention is characterized in that it has any of the above semiconductor packages. In the semiconductor package, the connection terminals and the wiring can be arranged without excessively increasing the size of the interconnection substrate. In addition, 'the semiconductor material of a high-priced stone or the like for interconnecting the substrate can be suppressed' and the cost can be suppressed. Further, other objects, features and advantages of the present invention will be apparent from the description of the appended claims. Further, the benefit of the present invention will become apparent from the following description with reference to the accompanying drawings. [Embodiment] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Further, here, a liquid crystal driver package in which the semiconductor package of the present invention is used is described as an example. <Embodiment 1> 125226.doc 1361476 Fig. 1 is a plan view showing a liquid crystal driver package according to an embodiment of the present invention. Figure 2 is a view from the cut line Α Α Α !! A cross-sectional view of the liquid crystal driver package shown. Further, Fig. 3 is an explanatory view showing the connection of the liquid crystal driver 2 and the interconnect substrate 3. Hereinafter, a schematic configuration of a liquid crystal driver package will be described with reference to Figs. 2 and 3 . The liquid crystal driver package i of the present embodiment is a c〇F (Chip plus Fihnl flip chip package) semiconductor package, and has a liquid crystal drive

液晶驅動器2 器2(半導體晶片）、互連基板3及薄膜基板4, 係經由互連基板3而連接薄膜基板4。此外，在液晶驅動器 2、互連基板3及薄膜基板4之間填充密封樹脂5，並補強. 固定各個之間的連接部。在此，密封樹脂5—般係稱為填 充材，可使用絕緣性樹脂（例如，環氧樹脂、矽樹脂、聚 酿亞胺樹脂等）。The liquid crystal driver 2 (semiconductor wafer), the interconnect substrate 3, and the film substrate 4 are connected to the film substrate 4 via the interconnect substrate 3. Further, a sealing resin 5 is filled between the liquid crystal driver 2, the interconnect substrate 3, and the film substrate 4, and is reinforced. The connecting portions between the respective portions are fixed. Here, the sealing resin 5 is generally referred to as a filler, and an insulating resin (for example, an epoxy resin, a resin, a polyimide resin, or the like) can be used.

液晶驅動器2係至少具備一個以上的液晶驅動電路（未圖 示），以驅動液晶顯示裝置。因此，在液晶驅動器，在與 互連基板相對之面（以下，稱為下面）係設置用以輸入圖像 資料信號等之圖像信號輸入用連接端子6及用以輸出液晶 驅動信號之驅動信號輸出用連接端子7。液晶驅動電路數 因所搭載之液晶顯示裝置而異，並無限制。 互連基板3係由半導體材料，最好係由矽所構成。在互 連基板3上係形成設於液晶驅動器2下面之圖像信號輸入用 連接端子6與驅動信號輸出用連接端子7及用以覆晶安裝之 液晶驅動器連接端子8a(輸入側）.8b(輸出側）。再者，在 與設有液晶驅動器連接端子8a . 8b之面相同面内，從液晶 125226.doc •10· 1361476 驅動器連接端子8a. 8b設置布線11 ’再於該布線11的前端 部13上經由薄膜基板連接端子10a. 10b而連接薄膜基板 4 〇 薄膜基板4係具有裝置孔9，其用以收容液晶驅動器2 , 在裝置孔9周邊部設置互連基板3的薄膜基板連接端子 10a(輸入侧）.l〇b(輸出側）之連接端子。連接端子間距係 對應互連基板3上的布線前端部13上的薄膜基板連接端子 間距（3 5 μιη以上），可與互連基板3相連接。 在薄膜基板4，從互連基板3的薄膜基板連接端子1〇a. l〇b設置用以與液晶顯示裝置（未圖示）相連接之布線、 及用以與圖像輸入控制部（未圖示）相連接之布線12a β再 者’在薄膜基板4，除了與互連基板3之連接部以外，設置 絕緣性銲錫光阻14(熱性電鍍材），以從灰塵或水保護設於 溥膜基板4之布線，並形成難以引起短路等缺陷之構成。 此外’薄膜基板4上的布線12a . 12b最好係銅箔，利用 蒸鍍、蝕刻或印刷等方法，形成布線圖案。尤其，布線不 限於銅箔時，印刷之形成係簡單而良好。再者，薄膜基板 4係使用聚醯亞胺（pi)或聚對苯二甲酸乙烯酯（pET)等有機 薄膜等的可撓性高的素材，以易於彎曲加工。 其次，參照圖3，進一步詳細說明液晶驅動器2與互連基 板3之連接及互連基板3與薄膜4之連接。 在此，從設於互連基板3之液晶驅動器連接端子8&·扑 延伸之布線11係隨著靠近與薄膜基板4相連接之前端部i 3 而擴大該布線間隔。具體表示之，液晶驅動器連接端子扑 125226.doc 1361476 的間距係25 μηι以下，但布線丨丨的前端部13的間距可為乃 μιη以上。如此，藉由令介互連基板3 ,可將IC製程水準的 微間距變換為薄膜基板水準的電極間距。因此’薄膜基板 的薄膜及布線’可使用習知之材料，且有關該安裂方法， 可使用既有的技術。 在液晶驅動器2與互連基板3之連接，為對應微間距，可 使用比較硬且融點高的金屬或合金製凸塊。例如，可適用 使用有金（Au)凸塊之Au-Au接合。藉此，可抑制凸塊變 形，因可解決相鄰凸塊間的接觸問題，故可縮小端子間距 直到25 μιη左右，可使液晶驅動器多輸出化。 另一方面，互連基板3與薄膜基板（未圖示）之連接，可 為具比與液晶驅動器2之連接端子廣的間距，例如35〜1〇〇 μιη左右的間距之端子間連接。以互連基板3的布線η的前 端部13的薄膜基板連接端子1〇a .鳩的Au凸塊與施於薄膜 基板4上的布線12& . 12b前端部之錫與金_錫共晶連接進行 連接。此外，不形成如同Au凸塊之高價的連接電極，可適 用使用有異方性導電薄膜（ACF : Anis〇tr〇pic Film)或異方性導電膠（ACp : Anis〇tr〇pic c〇ndu_e 之整個接合。 再者，藉由採用如同ACF/ACP接合，因在連接之電極不 需突起電極，故可期待互連基板3的步驟簡化。 其人，詳細說明互連基板上液晶驅動器2的連接位置。 圖4係對應表示液晶驅動器封裝體的平面圖（圖1)與剖面 圖（圖2)的部分構成品，又，從剖面觀之，表示液晶驅動器 125226.doc -12- 1361476 2的中心線B與互連基板的t心線C之圖。 參照圖4 ’互連基板3上的液晶驅動器2係以將液晶驅動 器2的短邊中心線B形成於比互連基板3的短邊中心線〇左 側（輸入側）之方式而設置。且以端子間的距離定義時，液 晶驅動器2係設於互連基板3上，以使從圖像信號輸入用連 接端子6(或液晶驅動器連接端子8a)至薄膜基板連接端子 10a之距離L1比驅動信號輸出用連接端子7(液晶驅動器連 接端子8b)至薄膜基板連接端子10b之距離L2短。 或從裝置孔9與位於其中之液晶驅動器2之關係來看，液 晶驅動器2與互連基板3係設於薄膜基板4上，以使液晶驅 動器2的端面與前述裝置孔端面之距離在與液晶驅動器相 對之兩邊中圖像信號輸入用連接端子6(或液晶驅動器連接 端子8a)側L3中比驅動信號輸出用連接端子7(液晶驅動器 連接端子8b)侧L4短。 液aa驅動器2係以下構成：為對應所搭載之液晶顯示裝 置的高微細化，要求多輸出化，輸出端子數比輸入端子數 多。因此，在互連基板3設置布線時，在端子數（布線數）多 的輸出側，與輸入側相比，必須準備用以間距變換之充分 區域。 因此，藉由上述構成，在互連基板3的液晶驅動器輸出 側，可分割更多的區域。此外，輸入侧中，因端子數（布 線數）少，故用以間距變換的區域最好比輸出侧小。因 此，藉由在輸入侧分割比輸出側區域小的區域，可有效的 使用互連基板上的區域，並可避免互連基板3的大型化。 125226.doc •13· 1361476 在此，詳細說明互連基板上的布線圖案，並說明端子數 (布線數）很多者，為間距變化而必須有大區域之理由。圖 5(a) · (b)係表示二種互連基板上之布線圖案的部分圖。 互連基板（半導體基板）上的布線斜線部（相對於互連基板 至薄臈基板之直線部而傾斜設置的布線圖案）係相對於直 線部而以45度角配置（設計規則）。再者，本實施形態中， 布線寬係5 μιη，布線間隔係2 μιη ’為使布線寬比布線間隔 大，在凹折布線而設置之處（直線部與斜線部之交點，以 下稱為交點）中，必須錯開交點而設置布線，以使布線者 不相接觸。 因此，考慮如圖5所示的二種布線圖案。因一同錯開交 點而設有布線，故伴隨端子數（布線數）變多，距離^及汕 亦變長，必須在互連基板上形成更多用以布線間距變換的 區域。 因此，互連基板上，在端子數（布線數）很多的輸出側， 與端子數少的輸入側相比，為間距變換，必須形成更大的 區域。 此外，伴隨液晶驅動器的多輸出化，考慮如圖6所示的 輸出端子圖案。如圖3所示，藉由排列 由將輸出端子排列成千鳥狀，在必須形成比布=大： 電極寬之端子部，因鄰接的端子者不會相干涉，故可進一 步微間距化，藉此可避免液晶驅動器的大型化。 即使採用該種千烏狀驅動信號輸出用連接端子7的圖 案，也可適用本發明之構成，其係使液晶驅動器2在互連 125226.doc 1361476. 基板3上錯開輸入側而設置。因本發明的輸出端子數比輸 入端子數愈多，其效果越佳，故在對應有多輸出化之布線 數多的千鳥狀端子圖案中特別有效。 再者，伴隨液晶驅動器的多輸出化，也可使互連基板3 上的布線前端部13、與薄膜基板連接端子1〇a. i〇b相連操 之薄膜基板4的前端部形成千鳥狀圖案β (未圖示） 又，藉由將液晶驅動器2在互連基板3上錯開輸入側而設 置，如圖4所示，在基板間產生不同長度的間隔l3(輸入 側）及間隔L4(輸出側）。液晶驅動器封裝體1的製程方面， 分別連接液晶驅動器2、互連基板3及薄膜基板4後，在其 間填入密封樹脂5 ’但因注入密封樹脂5，必須有某種程度 大小的間隔❶亦即，液晶驅動器2與薄膜基板4之間隔必須 保持某種程度，但間隔L4中，因可確保可盡量注入密封樹 脂5的間隔，故即使一間隔的間隔L3很窄，也可實現樹脂 注入。因此’與液晶驅動器輸入側的薄膜基板之間隔變窄 之本實施形態，對半導體封裝體的小型化有效。 上述之例令，配置於互連基板兩邊之複數端子係分別分 成輸入用及輸:出用，但並不揭限於此。例如，伴隨幹出用 端子的增加’可將輸入側的部分區域設定在輸出側的端子 區域。藉由該構成，從輸入側將布線圍在部分輪出侧而μ 於互連基板上。因此，可進一步有效活用互連基板上的命 間，並可避免半導體封裝體大型化。 (實施形態2) 實施形態1中，係以C,OF液晶驅動器封裝體盔 衣髖為例而說 125226.doc 1361476· 明，但本發明也可適用TCP半導體封裝體◊實施形態2係 說明使用有本發明之TCP液晶驅動器封裝體。 圖7係對應實施形態1之說明所使用圖4之圖，其表示 TCP液晶驅動器封裝體21的平面圖與剖面圖，並表示各構 成構件的位置關係。 參照圖7 ’本實施形態之TCP液晶驅動器封裝體21係以 下構成：液晶驅動器22經由經由互連基板23而連接薄膜基 板24。但是，以下之點係與c〇f半導體封裝體不同：薄膜 基板24係具有突出於裝置孔之飛線25，互連基板23與薄膜 基板24係經由飛線25 ’從形成有薄膜基板24的布線之面的 背面接合。 本實施形態中，係使用本發明，其係有效活用互連基板 上的區域，並避免半導體封裝體大型化。與應實施形態1 之COF液晶驅動器封裝體相同，互連基板23上的液晶驅動 器22係以將液晶驅動器22的中心線D形成比互連基板23的 中心線E左侧（輸入側）之方式而設置β且以端子間的距離 疋義之’液晶驅動器22係設於互連基板23上，以使圖像信 號輸入用連接端子26(或液晶驅動器連接端子28 a)至缚膜基 板連接端子30a之距離L5比驅動信號輸出用連接端子27(或 液晶驅動器連接端子28b)直到薄膜基板連接端子3〇b之L6 短。 藉由形成本構成，在互連基板23上可有效活用供輸出端 子側間距變換之區域，其結果，可配置連接端子及布線， 而不用互連基板23大型化為必要以上。 125226.doc •16· 1361476 (實施形態3) 圖8係表示本實施形態之液晶顯示裝置（顯示裝置）5〇構 成的概略圖。液晶顯示裝置50係具備實施形態！之液晶驅 動器封裝體1及液晶面板40，液晶驅動器封裝體“系安裝於 液晶面板40。藉此，液晶驅動器封裝體j的液晶驅動器2驅 動液晶面板40的掃描線41。另外，液晶顯示裝置5〇也可具 備實施形態2之液晶驅動器封裝體21，以取代液晶驅動器 封裝體1。 本說明書中，係以液晶驅動器為例而說明，但使用有互 連基板之帶載型半導體封裝體，也可適用本說明。此外， 不限於半導體晶片的輸出端子數比輸入端子數多之半導體 封裝體，用以收容相對的兩邊所配置端子數不同之半導體 晶片之半導體封裝體，也可適用本說明。 另外，本次所揭示之實施形態的所有點係例示，並非有 所侷限。本發明之技術範圍依申請專利範圍而劃定，且意 圖包含申請專利範圍之記載等的意義及範圍内的所有變 更。 【圖式簡單說明】 圖1係本發明實施形態丨之半導體封裝體的平面圖。 圖2係本發明實施形態丨之半導體封裝體的剖面圖。 圖3係表示本發明實施形態1之半導體封裝體之半導體晶 片與互連基板的連接圖。 圖4係表示本發明實施形態1之半導體封裝體之半導體晶 片與互連基板的連接位置關係圖。 125226.doc -17· 1361476 圖:）〇>)係表不互連基板上之布線圖案的部分圖。 H I .、表丁本發明實施形態1之半導體封裝體之半導體晶 /、互連基板的連接圖。 圖7係表示本發明實施形態2之半導體封裝體之半導體晶 片與互連基板的連接位置關係圖。 圖8係表示本發明實施形態3之液晶顯示裝置構成的概略 圖0The liquid crystal driver 2 is provided with at least one or more liquid crystal driving circuits (not shown) for driving the liquid crystal display device. Therefore, in the liquid crystal driver, an image signal input connection terminal 6 for inputting an image data signal or the like and a drive signal for outputting a liquid crystal drive signal are provided on a surface opposite to the interconnection substrate (hereinafter referred to as a lower surface). Output connection terminal 7. The number of liquid crystal drive circuits varies depending on the liquid crystal display device mounted, and is not limited. The interconnect substrate 3 is made of a semiconductor material, preferably of germanium. The image signal input connection terminal 6 provided on the lower surface of the liquid crystal driver 2 and the drive signal output connection terminal 7 and the liquid crystal driver connection terminal 8a (input side) for flip chip mounting are formed on the interconnect substrate 3. Output side). Further, in the same plane as the surface on which the liquid crystal driver connection terminals 8a. 8b are provided, the wiring 11' is provided from the liquid crystal 125226.doc • 10· 1361476 driver connection terminals 8a. 8b and the front end portion 13 of the wiring 11 is provided. The film substrate 4 is connected to the film substrate 4 via the film substrate connecting terminal 10a. 10b. The film substrate 4 has a device hole 9 for accommodating the liquid crystal driver 2, and a film substrate connecting terminal 10a of the interconnect substrate 3 is disposed at a peripheral portion of the device hole 9. Input terminal).l〇b (output side) connection terminal. The pitch of the connection terminals corresponds to the pitch of the film substrate connection terminals (3 5 μm or more) on the wiring front end portion 13 on the interconnection substrate 3, and can be connected to the interconnection substrate 3. In the film substrate 4, a wiring for connecting to a liquid crystal display device (not shown) and a picture input control unit are provided from the film substrate connection terminals 1a, 1b of the interconnection substrate 3 ( (not shown) the interconnected wiring 12a β is further provided with an insulating solder resist 14 (thermal plating material) on the film substrate 4 except for the connection portion with the interconnect substrate 3 to protect it from dust or water. The wiring of the ruthenium film substrate 4 is formed to have a defect that it is difficult to cause a short circuit or the like. Further, the wiring 12a. 12b on the film substrate 4 is preferably a copper foil, and a wiring pattern is formed by a method such as vapor deposition, etching or printing. In particular, when the wiring is not limited to the copper foil, the formation of printing is simple and good. Further, the film substrate 4 is made of a highly flexible material such as an organic film such as polyimine (pi) or polyethylene terephthalate (pET), and is easily bent. Next, referring to Fig. 3, the connection of the liquid crystal driver 2 to the interconnection substrate 3 and the connection of the interconnection substrate 3 to the film 4 will be described in further detail. Here, the wiring 11 extending from the liquid crystal driver connection terminal 8& which is provided on the interconnection substrate 3 is enlarged in accordance with the end portion i 3 before the film substrate 4 is connected. Specifically, the pitch of the liquid crystal driver connection terminal 125226.doc 1361476 is 25 μm or less, but the pitch of the tip end portion 13 of the wiring turns may be μηη or more. Thus, by interconnecting the substrate 3, the micro pitch of the IC process level can be converted to the electrode pitch of the film substrate level. Therefore, a conventional material can be used for the film and wiring of the film substrate, and an existing technique can be used for the method of forming the film. In connection with the interconnection of the liquid crystal driver 2 and the interconnection substrate 3, a metal or alloy bump which is relatively hard and has a high melting point can be used for the corresponding fine pitch. For example, an Au-Au bond using gold (Au) bumps can be applied. Thereby, the bump deformation can be suppressed, and the contact problem between the adjacent bumps can be solved, so that the terminal pitch can be reduced to about 25 μm, and the liquid crystal driver can be outputted more. On the other hand, the connection between the interconnect substrate 3 and the film substrate (not shown) can be connected to a terminal having a pitch wider than the connection terminal of the liquid crystal driver 2, for example, a pitch of about 35 to 1 μm. The Au bump of the film substrate connection terminal 1〇a.鸠 of the front end portion 13 of the wiring η of the interconnection substrate 3 and the wiring of the front end portion of the wiring 12& 12b applied to the film substrate 4 are combined with gold and tin. The crystal connection is connected. In addition, a high-priced connection electrode such as an Au bump is not formed, and an anisotropic conductive film (ACF: Anis〇tr〇pic Film) or an anisotropic conductive paste (ACp: Anis〇tr〇pic c〇ndu_e) can be used. Further, by using the ACF/ACP bonding, since the electrodes are not required to be bumped on the electrodes to be connected, the step of interconnecting the substrate 3 can be expected to be simplified. The details of the liquid crystal driver 2 on the interconnect substrate are explained in detail. Fig. 4 is a partial view showing a plan view (Fig. 1) and a cross-sectional view (Fig. 2) of the liquid crystal driver package, and further showing the center of the liquid crystal driver 125226.doc -12-1361476 2 from a cross-sectional view. A diagram of the line B and the t-core line C of the interconnect substrate. Referring to FIG. 4', the liquid crystal driver 2 on the interconnect substrate 3 is formed to form the short-side center line B of the liquid crystal driver 2 at the center of the short side of the interconnect substrate 3. The left side (input side) of the wire is set in a manner of being defined by the distance between the terminals, and the liquid crystal driver 2 is provided on the interconnection substrate 3 so that the image signal input connection terminal 6 (or the liquid crystal driver connection terminal) is provided. 8a) to the film substrate connection terminal The distance L1 of 10a is shorter than the distance L2 of the drive signal output connection terminal 7 (liquid crystal driver connection terminal 8b) to the film substrate connection terminal 10b. Or from the relationship between the device hole 9 and the liquid crystal driver 2 located therein, the liquid crystal driver 2 The interconnect substrate 3 is disposed on the film substrate 4 such that the distance between the end surface of the liquid crystal driver 2 and the end face of the device hole is the image signal input connection terminal 6 (or the liquid crystal driver connection terminal 8a) on both sides opposite to the liquid crystal driver. The side L3 is shorter than the drive signal output connection terminal 7 (liquid crystal driver connection terminal 8b) side L4. The liquid aa driver 2 has a configuration in which the liquid crystal display device to be mounted is required to be more miniaturized, and multiple outputs are required to be output. Since the number of terminals is larger than the number of input terminals, when the wiring is provided on the interconnection board 3, it is necessary to prepare a sufficient area for pitch conversion on the output side where the number of terminals (number of wirings) is large, compared with the input side. According to the above configuration, more areas can be divided on the output side of the liquid crystal driver of the interconnect substrate 3. Further, since the number of terminals (the number of wirings) is small on the input side, Preferably, the area for pitch conversion is smaller than the output side. Therefore, by dividing the area smaller than the output side area on the input side, the area on the interconnect substrate can be effectively used, and the size of the interconnect substrate 3 can be prevented from being increased. 125226.doc •13· 1361476 Here, the wiring pattern on the interconnect substrate will be described in detail, and the reason why the number of terminals (the number of wires) is large and the large area is necessary for the pitch change is shown in Fig. 5(a). (b) is a partial view showing a wiring pattern on two types of interconnecting substrates. A wiring oblique portion on an interconnect substrate (semiconductor substrate) (inclined with respect to a straight portion of the interconnect substrate to the thin substrate) The wiring pattern is arranged at an angle of 45 degrees with respect to the straight portion (design rule). Further, in the present embodiment, the wiring width is 5 μm, and the wiring interval is 2 μm′, where the wiring width is larger than the wiring interval, and the recessed wiring is provided (the intersection of the straight portion and the oblique portion). In the hereinafter referred to as the intersection point, the wiring must be staggered so that the wiring person does not come into contact. Therefore, consider two wiring patterns as shown in FIG. Since the wiring is provided by staggering the intersection, the number of terminals (the number of wirings) is increased, and the distances ^ and 汕 are also lengthened, and more areas for changing the wiring pitch must be formed on the interconnection substrate. Therefore, on the interconnect substrate, the output side having a large number of terminals (the number of wirings) has a larger pitch than the input side with a small number of terminals. Further, with the multi-output of the liquid crystal driver, an output terminal pattern as shown in Fig. 6 is considered. As shown in FIG. 3, by arranging the output terminals in a thousand bird shape, it is necessary to form a terminal portion larger than the cloth = large: electrode width, and since the adjacent terminals do not interfere with each other, the pitch can be further increased. The size of the liquid crystal driver can be avoided. The configuration of the present invention can be applied even if the pattern of the connection terminal 7 for the output signal of the undulating shape is used, which is provided such that the liquid crystal driver 2 is shifted from the input side of the substrate 3 to the interconnect. Since the number of output terminals of the present invention is larger than the number of input terminals, the effect is more excellent, and therefore it is particularly effective in a thousand bird-shaped terminal pattern corresponding to a large number of wirings having a large number of outputs. Further, with the multi-output of the liquid crystal driver, the front end portion of the film substrate 4 on the interconnection substrate 3 and the film substrate 4 connected to the film substrate connection terminal 1a, i〇b can be formed into a bird shape. The pattern β (not shown) is provided by disposing the liquid crystal driver 2 on the interconnect substrate 3 on the input side. As shown in FIG. 4, intervals 13 (input side) and intervals L4 of different lengths are generated between the substrates. Output side). In the process of the liquid crystal driver package 1, the liquid crystal driver 2, the interconnect substrate 3, and the film substrate 4 are respectively connected, and then the sealing resin 5' is filled therebetween. However, since the sealing resin 5 is injected, it is necessary to have a certain interval. In other words, the distance between the liquid crystal driver 2 and the film substrate 4 must be kept to some extent. However, in the interval L4, since the interval at which the sealing resin 5 can be injected as much as possible can be ensured, resin injection can be realized even if the interval L3 is narrow. Therefore, the present embodiment in which the distance from the film substrate on the input side of the liquid crystal driver is narrowed is effective in downsizing the semiconductor package. In the above example, the plurality of terminals disposed on both sides of the interconnect substrate are divided into input and output, respectively, but are not limited thereto. For example, the partial area on the input side can be set to the terminal area on the output side with the increase of the dry-out terminal. With this configuration, the wiring is wound from the input side to the partial turn-out side to be on the interconnect substrate. Therefore, the life on the interconnect substrate can be further effectively utilized, and the size of the semiconductor package can be prevented from being increased. (Embodiment 2) In the first embodiment, the helmet of the C, OF liquid crystal driver package is exemplified by 125226.doc 1361476. However, the present invention is also applicable to the TCP semiconductor package. There is a TCP liquid crystal driver package of the present invention. Fig. 7 is a plan view and a cross-sectional view showing the TCP liquid crystal driver package 21, showing the positional relationship of the respective constituent members, in accordance with Fig. 4, which is used in the description of the first embodiment. Referring to Fig. 7, the TCP liquid crystal driver package 21 of the present embodiment is configured such that the liquid crystal driver 22 is connected to the film substrate 24 via the interconnect substrate 23. However, the following points are different from the c〇f semiconductor package: the film substrate 24 has a flying wire 25 protruding from the device hole, and the interconnect substrate 23 and the film substrate 24 are formed from the film substrate 24 via the flying wire 25'. The back side of the wiring is bonded. In the present embodiment, the present invention is used in which the area on the interconnect substrate is effectively utilized and the size of the semiconductor package is prevented from increasing. Similarly to the COF liquid crystal driver package of Embodiment 1, the liquid crystal driver 22 on the interconnection substrate 23 is formed such that the center line D of the liquid crystal driver 22 is formed on the left side (input side) of the center line E of the interconnection substrate 23. The liquid crystal driver 22 is provided on the interconnection substrate 23 so as to set the β and the distance between the terminals so that the image signal input connection terminal 26 (or the liquid crystal driver connection terminal 28 a) is connected to the film substrate connection terminal 30a. The distance L5 is shorter than the drive signal output connection terminal 27 (or the liquid crystal driver connection terminal 28b) up to L6 of the film substrate connection terminal 3〇b. By forming this configuration, the area for the output terminal side pitch conversion can be effectively utilized on the interconnection substrate 23. As a result, the connection terminals and the wiring can be arranged without increasing the size of the interconnection substrate 23. [Embodiment 3] Fig. 8 is a schematic view showing a configuration of a liquid crystal display device (display device) 5 of the present embodiment. The liquid crystal display device 50 is provided with an embodiment! The liquid crystal driver package 1 and the liquid crystal panel 40 are mounted on the liquid crystal panel 40. The liquid crystal driver 2 of the liquid crystal driver package j drives the scanning line 41 of the liquid crystal panel 40. Further, the liquid crystal display device 5 The liquid crystal driver package 21 of the second embodiment may be provided instead of the liquid crystal driver package 1. In the present specification, a liquid crystal driver is used as an example, but a tape-type semiconductor package having an interconnect substrate is used. The present invention is also applicable to a semiconductor package in which the number of output terminals of the semiconductor wafer is larger than the number of input terminals, and the semiconductor package for accommodating the semiconductor chips having different numbers of terminals arranged on both sides. In addition, the present invention is not limited to the scope of the present invention, and the technical scope of the present invention is defined by the scope of the patent application, and it is intended to include all the changes within the meaning and scope of the claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view of a semiconductor package according to an embodiment of the present invention. Fig. 2 is a cross-sectional view showing a semiconductor package of a semiconductor package according to an embodiment of the present invention. Fig. 3 is a view showing a connection between a semiconductor wafer and an interconnection substrate of a semiconductor package according to Embodiment 1 of the present invention. A diagram showing the connection position of a semiconductor wafer and an interconnect substrate of a semiconductor package. 125226.doc -17· 1361476 Fig.: 〇>) A partial view of a wiring pattern on a substrate that is not interconnected. Fig. 7 is a view showing a connection position of a semiconductor wafer and an interconnection substrate of a semiconductor package according to a second embodiment of the present invention. Fig. 8 is a view showing a connection relationship between a semiconductor wafer and an interconnection substrate of a semiconductor package according to a second embodiment of the present invention. A schematic view showing the configuration of a liquid crystal display device according to Embodiment 3 of the present invention

圖9係專敎獻丨所記載之咖半導體封裝體的剖面圖 【主要元件符號說明】 1 液晶驅動器封裝體 2 液晶驅動器 3 互連基板 4 溥膜基板 5 密封樹脂 6 圖像號輸入用連接端子 7 驅動k破輸出用連接端子 8a 液晶驅動器連接端子（輸入） 8b 液晶驅動器連接端子（輸出） 9 裝置孔 10a 薄膜基板連接端子（輪入） 10b 薄臈基板連接端子（輸出） 11 布線（互連基板） 12a 布線（薄膜基板.輸入） 12b 布線（薄膜基板.輸出） 125226.doc •18- 1361476 13 布線前端部（互連基板） 14 銲錫光阻 21 液晶驅動器封裝體（TCP) 22 液晶驅動益 23 互連基板 24 薄膜基板 25 飛線 26 圖像信號輸入用連接端子 27 驅動信號輸出用連接端子 28a 液晶驅動器連接端子（輸入） 28b 液晶驅動器連接端子（輸出） 30a 薄膜基板連接端子（輸入） 30b 薄膜基板連接端子（輸出） 31 半導體封裝體 32 1C晶片 33 互連基板 40 液晶面板 41 掃描線 50 液晶顯示裝置（顯示裝置） 125226.doc -19-Fig. 9 is a cross-sectional view of a coffee semiconductor package disclosed in the specification. [Main component symbol description] 1 Liquid crystal driver package 2 Liquid crystal driver 3 Interconnect substrate 4 溥 film substrate 5 Sealing resin 6 Image number input connection terminal 7 Drive k-breaking output connection terminal 8a Liquid crystal driver connection terminal (input) 8b Liquid crystal driver connection terminal (output) 9 Device hole 10a Film base connection terminal (wheel entry) 10b Thin-film base connection terminal (output) 11 Wiring (mutual 12) wiring (film substrate. input) 12b wiring (film substrate. output) 125226.doc •18- 1361476 13 wiring front end (interconnect substrate) 14 solder resist 21 liquid crystal driver package (TCP) 22 LCD driver benefit 23 Interconnect substrate 24 Film substrate 25 Flying wire 26 Image signal input connection terminal 27 Drive signal output connection terminal 28a Liquid crystal driver connection terminal (input) 28b Liquid crystal driver connection terminal (output) 30a Film substrate connection terminal (Input) 30b Film substrate connection terminal (output) 31 Semiconductor package 32 1C Wafer 33 Interconnected Substrate 40 Liquid Crystal Panel 41 Scan Line 50 Liquid Crystal Display Unit (Display Unit) 125226.doc -19-

Claims (1)

13614761361476 第096136896號專利申請案 • 中文申請專利範圍替換本(1〇〇年7月） 十、申請專利範圍： .1. 一種半導體封裝體，其係半導體晶片經由互連 (interposer)基板而連接於薄膜基板者，其特徵係： 前述半導體晶片至少於相對的兩邊分別具有複數端 子， . 進而，於前述互連基板，自前述互連基板中心向前述 相對的兩邊中端子數少的一方側偏移而連接。 2. —種半導體封裝體，其係半導體晶片經由互連基板而連 ® 接於薄膜基板者，其特徵係： 前述半導體晶片至少於相對的兩邊分別具有複數端 子； 前述互連基板至少於相對的兩邊分別具有連接於前述 薄膜基板之薄膜基板連接端子，並在前述薄膜基板連接 端子内側具有複數半導體晶片連接端子，其等係與配置 於前述半導體晶片相對的兩邊之複數端子連接； 前述互連基板相對的兩邊各自之前述薄膜基板連接端 子與前述半導體晶片連接端子之距離，在前述半導體晶 片連接端子的端子數少者係比另一方短。 3. —種半導體封裝體，其係半導體晶片經由互連基板而連 接於薄膜基板者，其特徵係： 前述半導體晶片至少於相對的兩邊分別具有複數端 子； 前述薄膜塞板具有裝置孔，且前述半導體晶片位於前 述裝置孔内； 125226-10007l5.doc 1361476 再者，前述裝置孔之相對的兩邊各自之前述半導體晶 片端面與前述裝置孔端面之距離，在前述半導體晶片^ 對的兩邊中端子數少者係比另一方短。 4·如請求項1至3中任一項之半導體封裝體，其中在前述半 導體晶片相對的兩邊中的一邊配置至前述半導體晶片之 輸入彳§號端子，並在另一邊配置來自前述半導體晶片之 輸出信號端子。 5_如請求項4之半導體封裝體，其中前述輸出信號端子的 端子數比前述輸入信號端子的端子數多。 6·如請求項1至3中任一項之半導體封裝體，其中前述互連 基板係由矽所構成β 7.如請求項1至3中任一項之半導體封裝體，其中前述半導 體晶片係液晶驅動器。 I25226-1000715.docPatent Application No. 096,136,896, Japanese Patent Application Serial No. (September 2001) X. Patent Application Range: 1. A semiconductor package in which a semiconductor wafer is connected to a film via an interposer substrate In the substrate, the semiconductor wafer has a plurality of terminals on at least opposite sides thereof, and further, the interconnect substrate is offset from a center of the interconnect substrate toward a side of the opposite sides connection. 2. A semiconductor package, wherein the semiconductor wafer is connected to the film substrate via an interconnect substrate, wherein: the semiconductor wafer has a plurality of terminals at least on opposite sides; the interconnect substrate is at least opposite Each of the two sides has a film substrate connection terminal connected to the film substrate, and has a plurality of semiconductor chip connection terminals inside the film substrate connection terminal, and is connected to a plurality of terminals disposed on opposite sides of the semiconductor wafer; The distance between the film substrate connection terminal and the semiconductor wafer connection terminal on each of the opposite sides is shorter than the other in the number of terminals of the semiconductor wafer connection terminal. 3. A semiconductor package, wherein the semiconductor wafer is connected to the film substrate via an interconnect substrate, wherein: the semiconductor wafer has a plurality of terminals at least on opposite sides; the film plug plate has a device hole, and the foregoing The semiconductor wafer is located in the hole of the device; 125226-10007l5.doc 1361476 Further, the distance between the end surface of the semiconductor wafer on the opposite sides of the device hole and the end face of the device hole is small in the two sides of the semiconductor wafer The person is shorter than the other. The semiconductor package according to any one of claims 1 to 3, wherein one of the opposite sides of the semiconductor wafer is disposed to an input terminal of the semiconductor wafer, and the other side is disposed from the semiconductor wafer. Output signal terminal. The semiconductor package of claim 4, wherein the number of terminals of the output signal terminal is larger than the number of terminals of the input signal terminal. The semiconductor package according to any one of claims 1 to 3, wherein the aforementioned interconnect substrate is a semiconductor package according to any one of claims 1 to 3, wherein the semiconductor wafer is LCD driver. I25226-1000715.doc
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