TWI358116B - Packaging structure and packaging method thereof - Google Patents

Description

1358116

TW4368PA IX. Description of the invention: [Technical field to which the invention pertains] Method, and special method. The invention relates to a package structure and a package thereof related to an anti-electromagnetic interference package structure and a sealing method thereof [Prior Art] - Generally, a semiconductor device package is a circuit = electric dry === or ceramic record On the board. The performance of its circuit can be adversely affected. Electromagnetic interference _) The second frequency of the electronic components placed in the system:: J === 'The unnecessary light-emitting noise is more obvious, and the package structure that prevents electromagnetic interference has formed the cut after the screen system. After the disturbance, * Cheng step into a conductive film on the sealant. And the catalogue component. _第_ The first tang Baocheng m kind of anti-electromagnetic interference package structure, = the grounding element of the wide 7 'connected, as shown in the figure (7), / / il off, but does not cut the substrate 17. On the encapsulant 14, the H film 18 is then guided. Conductive film 18 is applied in this step, and the thick film is lightly connected to the conductive film 18 in three blocks. The substrate 17 is cut with a cutter 10b of degree 4 to form a shape of 6 1358116 : , TW4368PA : into a separate package component 10 , as shown in FIG. 2 . Since the package structure must be cut twice during the packaging process, in addition to the easy yield reduction due to the cutting failure, since the two cutting processes waste more base material, the substrate utilization rate is relatively low. Another existing EMI-resistant package structure is to place a conductive housing such as a metal cover with an adhesive on the finished package. As shown in Fig. 3, it shows a schematic diagram of another conventional anti-electromagnetic interference package structure. The package component 20 includes a substrate 21, a wafer 22, a sealant 25, a conductive shell φ body 26, and a plurality of surface mount technology (SMT) elements 28. The wafer 22 is electrically connected to the substrate 21 by a gold wire 23. The conductive housing 26 is disposed on the sealant 25 with an adhesive 27. The surface connection technology element 28 is disposed on the substrate 21. However, this method is to fix the conductive shell with adhesive. In addition to increasing the complexity and time of the process, it is easy to cause the peeling of the conductive shell due to the change of the adhesive properties caused by temperature and humidity. In addition, the size of the conductive housing and the package must be matched. Different sizes of the package must be made of different housings, which increases the difficulty in manufacturing the conductive housing. φ Therefore, how to overcome the shortcomings of the traditional package structure to produce high-yield, low-cost package components with electromagnetic interference resistance is one of the topics of the industry. SUMMARY OF THE INVENTION The present invention relates to a package structure and a package method thereof, which directly form a conductive film during a package process, which can achieve the advantages of simplifying the packaging process, saving the packaging time, reducing the cost, and improving the process yield. The invention is more applicable to packages of various sizes, and also saves substrate material and improves the degree of substrate utilization after the 7 1358116 TW4368PA package is improved. According to the present invention, there is proposed a package structure comprising a substrate, a half conductor element, a gel and a conductive film. The substrate has a first surface, a second surface, a first side, and a first side of the grounding member. The first side connects the younger surface and the second surface. The semiconductor component is disposed on the first surface and electrically connected to the substrate. The grounding element is disposed inside the substrate and exposed to the first side and has a flat surface. The encapsulant is overlying the semiconductor component, and the first side of the encapsulant is substantially aligned with the plane of the ground component. The conductive film is directly formed on the outer surface of the encapsulant, the exposed surface of the grounding member, and the side of the base, and the conductive film is electrically connected to the grounding member. According to the present invention, a method of sealing a skirt is proposed, comprising the following steps. First, the I-providing substrate has at least one adjacent first substrate unit and a first element, a first semiconductor element and a second semiconductor element, and a substrate single and second substrate unit. The first surface is: two! - two surfaces and a grounding element. The first surface is connected to the second surface and the 7L member is located between the first surface and the second surface. The first ΓΐΓ semiconductor element is disposed at the first The surface is electrically connected to the substrate. The booklet member is attached to the second surface of the first semiconductor element and the second semiconductor element. Then the 'forming-sealing body, the sealing body is covered. A semiconductor to the colloidal surface. After the autumn, the m-piece and the first-ground grounding element are sewn, and the _ 彳 ( (4) 'substrate, conductor device and tape--the half-cut depth is smaller than the load = slit in the tape The thickness of the cut/band, one of the grounding elements is exposed to the seal 8 1358116

TW4368PA body. Then, the conductive film is directly formed on the encapsulant and the dicing slit to cover the surface of the first semiconductor device and the second semiconductor device, the surface on which the grounding member is exposed, and the side surface of the substrate. The present invention is described in detail with reference to the accompanying drawings, and is described in detail below as follows: [Embodiment] The present invention provides a package structure including a substrate, A semiconductor component, a gel, and a conductive film. The substrate has a first surface, a first surface, and a grounding member, the first side connecting the first surface and the second surface. The semiconductor component is disposed on the first surface and electrically connected to the substrate. The grounding element is disposed inside the substrate and exposed to the first side and has a flat surface. The encapsulant is overlaid on the semiconductor component, and the second side of the encapsulant is substantially aligned with the plane of the ground component. The conductive crucible is directly formed on one outer surface of the encapsulant, the exposed surface of the grounding member, and the side of the substrate, and the conductive film is electrically connected to the grounding member. The embodiments are described below. Referring to FIG. 4, a schematic diagram of an anti-electromagnetic interference package structure in accordance with a preferred embodiment of the present invention is shown. As shown in FIG. 4, the package structure of the semiconductor device 100c includes a substrate 11A, a semiconductor device 丨2〇a, a sealant 140a, and a conductive film 160p. The substrate 11A has a surface 112, a surface 114, sides 116 and 118, and The grounding elements 151a and 152a' sides 116, 118 connect the surface in and the surface 114, respectively. The grounding elements 151a and 152a s are placed inside the substrate 1 l〇a and have a plane Μ, S2, planes SI, S2, respectively, and are exposed to the side surfaces 116 and us, respectively. Preferably, grounding 9 1358116 » .

The TW4368PA elements 151a, 152a are ground vias, and the ground elements 15ia, i52a are substantially equal in thickness to the substrate 110a and extend from the surface 112 to the surface 114. The semiconductor element 120a is disposed on the surface n2 and electrically connected to the substrate 11A. Preferably, the semiconductor device 12A is wire-bonded to the substrate 110a with at least one gold wire 13A. The encapsulant 14A is covered on the semiconductor element 120a, and the side faces 142 and 144 of the encapsulant 140a are substantially aligned with the planes S1 and S2, respectively. The conductive film 160a is directly formed on the outer surface of the encapsulant 14a, the exposed surfaces si and S2 of the ground elements 151a, 152a, and the side surfaces 116 and 118 of the substrate 110a. The conductive film i60a is electrically connected to the ground elements 15la and 152a. Preferably, the constituent material of the conductive film 160a is selected from the group consisting of aluminum, copper, chromium, tin, gold 'silver and nickel. Therefore, the ground elements 151a and 丨52a of the substrate inner 11a are in contact with the conductive film 16A, and the semiconductor device 100c can be grounded.

As for the encapsulation method of the package structure of the present invention, please refer to FIG. 5A-5E, which illustrates a package flow chart of an anti-electromagnetic interference package structure according to a preferred embodiment of the present invention. First, as shown in FIG. 5A, a substrate 110 is provided. The substrate 110 has adjacent substrate units Sb1 and Sb2, and a plurality of semiconductor elements 'for example, semiconductor elements 12A and 12B are disposed on the substrate 110, respectively. On the substrate units Sb1 and Sb2. The substrate 11() has a surface U2 and a surface 114' and the surface 112 is opposite to the surface 114. Between surface 112 and surface 114 includes at least one grounding element, for example including grounding elements 151, 152 1358116 I *

TW4368PA and 153. The grounding element 152 is located between the semiconductor components ΐ2〇& and 120b. In this embodiment, the height of the ground elements 151, 152, and 153 is equal to the thickness of the substrate 11 〇a. Preferably, the grounding elements, 152 and 153 are grounded through holes and extend from surface 112 to surface 114. The semiconductor element 120a and the semiconductor element i20b are disposed on the surface 112 and electrically connected to the substrate 110. The semiconductor element 120a and the semiconductor element 120b are electrically connected to the substrate 11 by, for example, a gold wire 130. The tape 1〇1 is attached to the surface 114 to prevent the substrate 11 from being scattered after cutting. Then, as shown in Fig. 5B, the encapsulant 140 is formed. The encapsulant 140 covers the semiconductor element 120a, the semiconductor element i2〇b, and the surface 112. Then, as shown in Fig. 5C, at least one slit is formed, for example, slits 141, 143, and 145. The slits 141, 143, and 145 divide the encapsulant 140, the grounding members 151, 152, and 153, the substrate 11 and a portion of the tape 101 to form the semiconductor device 100a and the semiconductor device 1 attached to the tape 1A. b. After forming at least one cutting slit, each grounding element is cut into two grounding elements, for example, grounding element 152 is cut into grounding elements 152a and 152b, and grounding elements 151 and 153 are also cut to form grounding element 151&; and 153b. The encapsulant 14A is also cut into a plurality of encapsulants, such as encapsulants 14a and 14b, and the substrate no is also divided into a plurality of substrates, such as substrates 110a and 11b. The semiconductor device 100a includes a semiconductor element i20a, a substrate 110a, grounding members 151a and 152a, and a sealant i40a. The semiconductor device 10b includes a semiconductor element 120b, a substrate 111b, grounding members 152b and 153b, and a sealant 140b. Cutting slits 141, 143 and 145 on tape 1〇1 1358116

The cutting depth Di in the TW4368PA is smaller than the thickness D2 of the tape 1〇1. In this step, after the at least one slit is formed, the grounding member located in the substrate will be exposed. For example, the planes S1 and S2 of the grounding elements (5) a and 152a are exposed. In addition, the surface φ 142 of the encapsulant 140, the plane si of the ground element 15U, and the side surface 116 of the substrate n〇a formed by the slit are substantially tangential; likewise, the surface 144 of the sealing body 14 、, The plane S2 of the grounding element 丨52a and the surface ΐ8 of the substrate n〇a are also substantially aligned. Next, as shown in Fig. 5D, the conductive film 16 is directly formed on the sealants 14a and 140b and the dicing slits 141, 143, and 145 to form the semiconductor device 100c and the semiconductor device 1?d. Preferably, the formation of the conductive film 16 is selected, for example, by a group consisting of chemical vapor deposition, electroless plating, electrolytic plating, spraying, printing, and splashing, and the constituent material of the conductive film 16 is made of aluminum. Selected from the group consisting of copper 'chromium, tin, gold, silver and nickel. The conductive film 160 covers the outer surfaces of the semiconductor device 1c and the encapsulant 14A, the planes si and S2 of the ground elements 151a and 152a of the external path, and the entire sides 116 and 118 of the substrate 110a. Similarly, the conductive film 16 覆盖 also covers the semiconductor device 1 〇〇 d in the same manner. Then, as shown in Fig. 5E, the tape 1〇1 is removed to separate the semiconductor device 100c and the semiconductor device i〇〇d, and thus, the semiconductor device having the structure shown in Fig. 4 can be obtained. «Month Referring to Figure 6, a schematic diagram of an electromagnetic interference resistant package structure in accordance with another preferred embodiment of the present invention is shown. The difference between the package structure of the semiconductor device 2 and the package structure of the semiconductor device 100c of FIG. 4 is 1358116

The TW4368PA is electrically connected to the substrate 210 in a flip chip manner. Although the semiconductor device of the present invention is connected to the substrate by wire bonding or flip chip as an example, the present invention is not limited thereto, and other electrical connection methods are also applicable to the present invention. The substrate 11 of the present invention may also be an array substrate or a long substrate having a plurality of substrate units arranged in an array or in a strip. Please refer to FIGS. 7A and 7B for a schematic view of the array substrate and the elongated substrate, respectively. As shown in Fig. 7A, the array substrate 2 has a substrate unit 2a, and the adjacent two substrate units 2a are separated by a dicing street 2b. The semiconductor element 12A and the semiconductor element 12A may be respectively disposed on the adjacent two substrate units 2a for packaging, and the scribe lines 2b of the adjacent two substrate units 2a pass through the ground element, for example, through the ground element 152. Above. After the sealing process is completed, the conductive film can be formed after cutting along the cutting path 2b. As shown in Fig. 7B, the elongated substrate 4 has a plurality of substrate units 4a' each of the substrate units 4a are separated by a dicing street 4b. Similarly, the semiconductor component 120a and the semiconductor component i2〇b may be respectively disposed on the adjacent two substrate units 4a for packaging, and the dicing streets 4b of the adjacent two substrate units 4a pass through the grounding component, for example, through the grounding component. Above 152. After the sealing process is completed, it can be cut along the cutting path 4b to form a conductive film. The package structure and the sealing method disclosed in the above embodiments of the present invention attach a tape to the back surface of a substrate having a plurality of semiconductor devices, and the inside of the substrate has a grounding through hole or other grounding member. And completed in the sealant 1358116 ' >

After the TW4368PA, it is cut at the position where the grounding via or other grounding element is located, and then the conductive film is directly formed on the sealing body, and finally the semiconductor devices are separated. By using the tape, the plurality of semiconductor devices after the dicing is not scattered, and all the semiconductor devices after the dicing are still adhered to the tape. Thus, the conductive films of all the semiconductor devices can be simultaneously formed to save process time. Moreover, without the need for secondary cutting, the sealant and the substrate can be separated simultaneously with one cut. In addition, since only one cut is required, the probability of cutting failure can be reduced to improve product yield. At the same time, due to the reduced number of cuts, the density of components on the substrate can be increased, and the utilization of the substrate can be increased. In addition, the conductive film produced in a manner directly formed on the encapsulant can be adapted to various component sizes, and can also resist changes in temperature and humidity, thereby improving component reliability. In addition, the original grounding through hole in the substrate can be grounded to the conductive film, and no additional grounding components are required, which can save material cost and process steps. In conclusion, the present invention has been disclosed in the above preferred embodiments, and is not intended to limit the present invention. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims. 14 1358116

TW4368PA [Simple description of the drawing] FIG. 1A is a schematic view showing a first cutting process of a conventional anti-electromagnetic interference package structure; FIG. 1B is a schematic view showing a second cutting process of a conventional anti-electromagnetic interference package structure; 2 is a schematic view showing a conventional anti-electromagnetic interference package structure obtained by using the processes of FIGS. 1A and 1B; FIG. 3 is a schematic diagram showing another conventional anti-electromagnetic interference package structure; FIG. 4 is a diagram showing A schematic diagram of an anti-electromagnetic interference package structure according to a preferred embodiment of the present invention; FIGS. 5A-5E are diagrams showing a package flow chart of an anti-electromagnetic interference package structure according to a preferred embodiment of the present invention; A schematic diagram of an anti-electromagnetic interference package structure according to another preferred embodiment of the invention; FIG. 7A is a schematic view of the array substrate; and FIG. 7B is a schematic view of the elongated substrate. [Description of main component symbols] 2: Array substrate 2a, 4a: substrate unit 2b, 4b: dicing street 4: elongated substrate 10, 20: package component 15 1358116 • <

TW4368PA 10a, 10b: cutting blade 12, 22: wafer 13, 23, 130: gold wire 14, 25, 140, 140a, 140b: sealant 15, 15b 151a, 152, 152a, 152b, 153, 153b: grounding element 17, 2, 110, 110a, 110b, 210: substrate 18, 160, 160a, 160b: conductive film • 26: conductive housing 27: adhesive 100a, 100b, 100c, 100d, 200: semiconductor device 101: tape 112, 114: surface 116, 118, 142, 144: side faces 120a, 120b, 220: semiconductor elements 141, 143, 145: cutting slits • SI, S2: plane

Sb1, Sb2: substrate unit 16

Claims (1)

1358116 _———Ί 2011/11/21_151 Shen Fu & Amendment 10, the scope of application for patents: 1. A package structure comprising: a substrate comprising: a first surface; a second surface; a first side, The first side connects the first surface and the first surface, a grounding element disposed inside the substrate and exposed on the first side, the grounding element is a part of a grounding through hole and has a plane, wherein the plane is exposed on the first side; a semiconductor component is disposed on The first surface is electrically connected to the substrate; a gel is disposed on the semiconductor component, a second side of the encapsulant is substantially aligned with the plane; and a conductive film is directly formed on the An outer surface of the encapsulant, the exposed surface of the grounding member, and the first side of the substrate and extending to the second surface of the substrate; wherein the grounding member extends from the first surface to the second surface. 2. The package structure of claim 1, wherein the semiconductor component is wire bonded to the substrate. 3. The package structure of claim 1, wherein the semiconductor component is electrically connected to the substrate in a flip chip manner. 4. The package structure of claim 1, wherein the height of the ground element is substantially equal to the thickness of the substrate. 17 1358116 2011/11/21_151 Application & Amendment 5. The package structure described in claim 1 wherein the conductive film is composed of Ming, copper, chrome, tin, gold, silver and Selected from the group consisting. 6. The package structure of claim 1, wherein the ground element is a solid conductive post. 7. A method of packaging, comprising: (a) providing a substrate having at least one adjacent first substrate unit and a second substrate unit, wherein a first semiconductor component and a second semiconductor component are disposed in the first On the substrate unit and the second substrate unit, the substrate has a first surface, a second surface, and a grounding through hole, the first surface is opposite to the second surface, the grounding through hole is located on the first surface and the The first semiconductor component and the second semiconductor component are disposed on the first surface and electrically connected to the substrate, and the ground via is located between the first semiconductor component and the second semiconductor component a tape attached to the second surface; (b) forming a gel covering the first semiconductor component, the second semiconductor component and the first surface; (c) forming a slit slit The cutting slit divides the sealing body, the substrate, the grounding through hole and a portion of the adhesive tape to form a first semiconductor device, a second semiconductor device and a grounding component attached to the adhesive tape. Cutting the slit in the tape to a depth less than the thickness of the tape, one of the grounding elements is exposed to the substrate; and (d) directly forming a conductive film on the sealing body and the cutting slit, The conductive film covers the first semiconductor device and the second semiconductor device 1358116 2011/1 l/21_ln, and the outer surface of the sealing body, the plane exposed by the grounding member, and the substrate The side. 8. The packaging method of claim 7, further comprising: removing the tape to separate the first semiconductor device and the second semiconductor device covered with the conductive film. 9. The encapsulation method according to claim 7, wherein in the step (d), the conductive film is formed by chemical vapor deposition, electroless plating, electrolytic plating, spraying, printing, and sputtering. Selected from the group consisting. 10. The packaging method of claim 7, wherein the substrate is an array substrate having a plurality of substrate units arranged in an array. 11. The method of packaging of claim 7, wherein the step (c) comprises forming the cutting slit on a scribe line of the substrate, and the scribe line passes through the grounding element. 12. The encapsulation method of claim 7, wherein the constituent material of the electroconductive film is selected from the group consisting of aluminum, copper, chromium, tin, gold, silver, and nickel. 13. The method of packaging of claim 7, wherein the ground via extends from the first surface to the second surface. 14. The method of packaging of claim 7, wherein the height of the grounding element is substantially equal to the thickness of the substrate. 15. The packaging method of claim 7, wherein the first semiconductor component and the second semiconductor component are electrically connected to the substrate by wire bonding. The method of packaging according to claim 6, wherein the first semiconductor element and the second semiconductor element are flip-chip and the substrate are electrically-charged. connection. 20