1328237 98-12-9 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種電感結構，且特別是有關於一種 具有遮蔽圖案之電感結構。 【先前技術】 一般而言，由於電感是經由電磁的互相轉換，擁有儲 存和釋放能量的功能，因此電感可作為穩定電流的元件。 此外，在積體電亭中，電感為十分重要但是卻極具挑戰性 的元件，而且電感的應用範圍可以說是相當地廣泛，例如 疋無線射頻(radi〇 frequency，RF)的應用。就高頻之應用領 域而言，對於電感之品質要求較高，意即要求電感具有較 尚的品質因子(quality factor)，以Q值表示。q值的定義如 下： Q= ωχΙ/Κ 其中’ ω為角頻率(anguiar frequency)，L為線圈之電感值 (inductance) ’而R為在特定頻率下將電感損失列入考慮之 電阻(resistance)。 一般來說’將電感與積體電路製程相結合，已有各種 方法及技術。然而，在積體電路中，電感導體厚度的限制 以及石夕基底對電感的干擾都會導致電感的品質不佳。習知 技術藉由將較厚的金屬配置在電感的最上層，來降低導體 損耗(conductor loss)，以提高電感的q值。然而，當金屬 厚度增加到一定的程度之後，Q值的改善就變得不明顯。 此外，由於電感配置的位置大都报接近矽基底，因此矽基 5 1328237 98-12-9 底跟電感之間產生的寄生電容(parasitic capacitance)會增 加，造成電感的電阻值增加，因而導致消耗大量的能量，使 得電感的品質降低。 【發明内容】 本發明的目的就是在提出一種電感結構，能夠降低基 底與電感之間所產生的寄生電容，並具有較南的Q值。 本發明提出一種電感結構，包括繞線圖案及遮蔽圖 案。繞線圖案配置於基底上。繞線圖案至少包括内圈與外 圈，其中内圈接地。遮蔽圖案配置於繞線圖案與基底之間。 遮蔽圖案包括第一圖案及第二圖案。第一圖案對應内圈的 投影配置於繞線圖案下方，而使内圈的投影落在第一圖案 上，且與内圈電性耦接。第二圖案鄰接於第一圖案的外緣， 且至少一部分繞線圖案之投影落在第二圖案上。 本發明提出另一種電感結構，包括繞線圖案及遮蔽圖 案。繞線圖案配置於基底上。繞線圖案至少包括内圈與外 圈，其中外圈接地。遮蔽圖案配置於繞線圖案與基底之間。 遮蔽圖案包括第一圖案以及第二圖案。第一圖案對應外圈 的投影配置於繞線圖案下方，而使外圈的投影落在第一圖 案上，且與外圈電性耦接。第二圖案鄰接於第一圖案的内 緣，且至少一部分繞線圖案之投影落在第二圖案上。 本發明提出又一種電感結構，包括繞線層、遮蔽層與 多個介層窗。繞線層配置在基底上方。繞線層是由多數圈 繞線所串聯而成，且繞線層具有第一末端與第二末端，其 中第一末端接地。遮蔽層配置在繞線層與基底之間。遮蔽 98-12-9 2具有第三末端與第四末端，其中以繞線層之第一末端 ^所構^之至少兩圈齡，其卿成的投影圖案落在遮 〜€上〃。介層窗配置在繞線層與遮蔽層之間，至少使得遮 ^層的第三末端以及第四末端紐連接繞線層之第一圈繞 、“其中第1繞線是以第—末端為起點所構成之繞線二 使繞線層與遮蔽層以並聯方式電性耦接。 為讓树明之上述和其他目的、特徵和優點能更明顯 明下文特舉較佳實施例，並配合賴圖式，作詳細說 【實施方式】 圖1A為依照本發明實施例所繪示之電感結構上視 二，1B為依照本發明實施例崎示之遮蔽圖案上視 圖1C為ffilA中沿著w’剖面線之剖面示意圖。 同時參照圖1A、圖m與圖ic，電感⑽ =由繞線層與遮蔽層所構成，繞線層例如是由多數圈繞 =構=的繞線圖案104’而遮蔽層例如是遮蔽圖案而。 2圖案HH酉己置於基底1〇2上方的介電層1〇3中。繞線 =案104的材料例如是金屬，而基底1〇2例如是石夕基底。 j敝圖案106則配置於繞線圖案1〇4與基底1〇2之間的介 1〇3巾。遮蔽圖案106的材料可以是導電材料，其例 夕ΐ金屬等。如圖1A所示’在本實施例中，電 感100為人㈣之配置，然而本發明之電感之形狀並不偈 限於：施例：所繪示之配置方式，於此 知識者可視其需求進行調整。 / 1328237 98-12-9 承上述，繞線圖案104是由多數圈繞線串聯而成’以 圖1A為例，繞線圖案1〇4至少包括内圈104a、外圈104b 與中間繞線l〇4c。内圈l〇4a與外圈l〇4b藉由中間繞線 l〇4c相互電性轉接，電性轉接方式例如是串聯。繞線圖案 1〇4的一末端i〇5a(内圈1〇乜的一末端)例如是接地，而繞 線圖案104的另一末端1〇9(外圈i〇4b的一末端)例如是與 操作電壓電性耦接。在本實施例中，繞線圖案104以内圈 1〇4a、外圈l〇4b與中間繞線l〇4c形成3圈的繞線圖案 1〇4。然而，繞線圖案1〇4的圈數並不侷限於實施例中所繪 不的3圈’亦即除了内圈1〇4a、外圈i〇4b外，還可於内 圈l〇4a'外圈104b之間配置多圈的中間繞線1〇4c，於此 技術領域具有通常知識者可視其需求進行調整。 卜另一方面，遮蔽圖案106例如是由第一圖案i〇6a以及 第二圖案106b所構成，且第一圖案1〇6a與第二圖案1〇邰 例如是一體成型，以形成自我遮蔽結構(如圖1B所示）。第 一圖案106a對應内圈i〇4a的投影配置於繞線圖案1〇4下 =而使W末端l〇5a為起闕構成之第—圈繞線（内圈 如)其所形成之投影落在第一圖案1〇6&上。第一圖安 1〇6= 綠圖案104之内圈刚a電性耦接，電性耦接： =並聯。此外’在繞線圖案1〇4與遮蔽圖案咖 疋:置至少兩個介層窗1〇8，將第一圖案购的 職與末端咖。刀另^生耦接至内圈购的末端 而遮蔽圖案1〇6中的第二圖案_鄰接於第一 8 1328237 98-12-9 l〇6a的外緣’且至少一部分繞線圖案1〇4之投影落在第二 圖案106b上’例如：以末端105b為起點所構成之第二圈 繞線（中間繞線l〇4c)的投影落在第二圖案l〇6b上。換句話 說’第二圖案l〇6b只要能遮蔽部份繞線圖案1〇4即可阻隔 基底102與繞線圖案104，減少基底102與電感100之間 產生的寄生電容，亦即第二圖案106b具有遮蔽效果。如圖 1C所示’在本實施例中，繞線圖案104之投影全部落在遮 蔽圖案106上，在此情況下，遮蔽圖案1〇6對電感1〇〇以 及基底102之間的遮蔽效果更佳。 由於在繞線圖案104與基底102之間配置有遮蔽圖案 106 ’用以阻隔基底1〇2與繞線圖案1〇4，因此本發明可以 更進一步減少基底102與電感100之間的寄生電容的發 生，以降低由基底102造成的電阻值，進而提升電感的Q 值。 圖2A至圖2C分別為依照本發明其他實施例中沿著圖 1A中的1-1’剖面線之剖面示意圖。 請參照圖2A，電感100可進一步包括至少一個第三圖 案110。第三圖案的材料例如是金屬。第三圖案110例如 是對應於内圈104a的投影配置於繞線圖案104與第一圖案 106a之間的介電層1〇3中，而使以末端105a為起點所構 成之第一圈繞線(内圈l〇4a)其所形成之投影會落在第三圖 案110上。第三圖案110例如是藉由介層窗108與繞線圖 案104 '第一圖案l〇6a並聯。 請繼續參照圖2B與圖2C，上述之第三圖案110也可 9 98-12-9 以是配置於第一圖案l〇6a與基底102之間的介電層103 中（如圖所示）或是同時配置於繞線圖案1〇4與第一圖案 1〇6a之間的介電層1〇3中以及第一圖案1〇如與基底ι〇2 么間的介電層1〇3中（如圖2C所示）。 承上述’於繞線圖案104以及基底102之間加入第三 _案上10，能夠藉由堆疊的第三圖案u〇來增加電感 十的至屬截面積，可以有效地減少導體損耗，並提升電感 j〇0的叩質。因此，對於電感之效能而言，第三圖案“ο 臭有增盈效果。此外’在本實施例中，基底102對電感1〇〇 所造成的:擾主要是在外圈l〇4b與基底102之間產生寄生 電分，而藉由遮蔽圖案1〇6的配置，可以使外圈1〇仆與基 底1之間的寄生電谷降低。另一方面，由於繞線圖案1〇4 是藉由内圈104a接地，因此電場較低的内圈1〇4&與基底 02之間的寄生電容較小，使得電感1〇〇的電感品質損失 棰少。 圖3A為依照本發明又一實施例所繪示之電感結構上 祝圖。圖3B為圖3八中沿著14，剖面線之剖面示意圖。 本發明另提出一種電感結構，請同時參照圖3A與圖 3B’在另-實施例中，電感_配置於基底搬上方的介 電層303中，其中電感3〇〇和電感1〇〇主要的差異在於： 在電感300中，繞線圖案3〇4的一末端3〇5(内圈3〇乜的 一末端)例如是與操作電壓電性耦接，而繞線圖 案304的另 -末端307(外圈j〇4b的-末端)例如是接地。此外，在遮 蔽圖案306巾’第-圖案3〇6a為對應外圈3〇4b的投影配 1328237 98-12-9 置於繞線圖案304下方，而使以末端307為起點所構成之 第一圈繞線(外圈304b)其所形成之投影落在第一圖案3〇6a 上。另外，藉由介層窗308使得第一圖案3〇6a與外圈3〇4b 並聯。而第二圖案306b則鄰接於第一圖案306a的内緣， 且至少一部分繞線圖案304之投影落在第二圖案3%b上， 例如：以末端307為起點所算起之第二圈繞線（中間繞線 304c)的投影落在第二圖案306b上。在本實施例中，繞線 圖案304之投影全部落在遮蔽圖案3〇6上，在此情況下， 遮蔽圖案306對電感300以及基底302之間的遮蔽效果更 承上述，如圖3B所示，電感3〇〇更可進一步包括至 J 一個第二圖案310。在一較佳實施例中，第三圖案31〇 的位置例如是對應於外圈304b的投影配置於繞線圖案3〇4 與第-圖案306a之間的介電層3〇3 +，且第三圖案31〇 例如是藉由介層窗308與繞線_ 、第—随並 聯。當然，在其他實施例中，帛三圖案31〇的位置也可以 是對應.於外圈3G4b的投影配置於第-圖案遍與基底 ^2之間的）丨私層3〇3中(未緣示），或是同時配置於繞線圖 案304 ^第-圖案施之間以及第—圖案施與基底搬 之間的介電層303中（未繪示）。 "1328237 98-12-9 IX. Description of the Invention: [Technical Field] The present invention relates to an inductive structure, and more particularly to an inductive structure having a shielding pattern. [Prior Art] In general, since the inductance is converted by electromagnetic mutual conversion and has the function of storing and releasing energy, the inductance can be used as a component for stabilizing current. In addition, in integrated kiosks, inductors are important but challenging components, and the range of applications for inductors can be quite broad, such as 〇 radio frequency (RF) applications. In the application field of high frequency, the quality requirement of the inductor is high, which means that the inductor has a higher quality factor, which is represented by Q value. The q value is defined as follows: Q = ω χΙ / Κ where ' ω is the angular frequency (anguiar frequency), L is the inductance of the coil ' and 'R' is the resistance that takes the inductance loss into consideration at a specific frequency. . In general, there are various methods and techniques for combining inductors with integrated circuit processes. However, in the integrated circuit, the limitation of the thickness of the inductor conductor and the interference of the Shi Xi substrate on the inductor result in poor quality of the inductor. Conventional techniques reduce the conductor loss by placing a thicker metal on the uppermost layer of the inductor to increase the q value of the inductor. However, when the thickness of the metal is increased to a certain extent, the improvement in the Q value becomes inconspicuous. In addition, since the position of the inductor configuration is mostly close to the germanium substrate, the parasitic capacitance generated between the base and the inductor of the germanium 5 1328237 98-12-9 is increased, resulting in an increase in the resistance value of the inductor, thereby causing a large amount of consumption. The energy of the inductor reduces the quality of the inductor. SUMMARY OF THE INVENTION An object of the present invention is to provide an inductor structure capable of reducing parasitic capacitance generated between a substrate and an inductor and having a souther Q value. The present invention provides an inductive structure comprising a winding pattern and a masking pattern. The winding pattern is disposed on the substrate. The winding pattern includes at least an inner ring and an outer ring, wherein the inner ring is grounded. The shielding pattern is disposed between the winding pattern and the substrate. The masking pattern includes a first pattern and a second pattern. The projection of the first pattern corresponding to the inner ring is disposed below the winding pattern, and the projection of the inner ring falls on the first pattern and is electrically coupled to the inner ring. The second pattern is adjacent to the outer edge of the first pattern, and at least a portion of the projection of the winding pattern falls on the second pattern. The present invention proposes another inductive structure including a winding pattern and a masking pattern. The winding pattern is disposed on the substrate. The winding pattern includes at least an inner ring and an outer ring, wherein the outer ring is grounded. The shielding pattern is disposed between the winding pattern and the substrate. The shadow pattern includes a first pattern and a second pattern. The projection of the first pattern corresponding to the outer ring is disposed below the winding pattern, and the projection of the outer ring falls on the first pattern and is electrically coupled to the outer ring. The second pattern is adjacent to the inner edge of the first pattern, and the projection of at least a portion of the winding pattern falls on the second pattern. The present invention provides a further inductive structure comprising a winding layer, a shielding layer and a plurality of vias. The winding layer is disposed above the substrate. The winding layer is formed by connecting a plurality of windings in series, and the winding layer has a first end and a second end, wherein the first end is grounded. The shielding layer is disposed between the winding layer and the substrate. The shadow 98-12-9 2 has a third end and a fourth end, wherein at least two turns of the first end of the winding layer are formed, and the projected pattern of the film falls on the cover. The via window is disposed between the winding layer and the shielding layer, at least the third end of the shielding layer and the fourth end of the bonding layer are connected to the first winding of the winding layer, wherein “the first winding is at the first end The windings formed by the starting point are such that the winding layer and the shielding layer are electrically coupled in parallel. The above and other objects, features and advantages of the present invention will be more apparent, and the preferred embodiment will be described below. 1A is an inductive structure according to an embodiment of the present invention. FIG. 1A is a top view of a shielding pattern according to an embodiment of the present invention. FIG. 1C is a cross-sectional view along the w' in ffilA. Referring to FIG. 1A, FIG. 4 and FIG. ic, the inductor (10) is composed of a winding layer and a shielding layer, and the winding layer is, for example, a winding pattern 104' of a plurality of windings. For example, it is a masking pattern. 2 The pattern HH has been placed in the dielectric layer 1〇3 above the substrate 1〇2. The material of the winding=104 is, for example, a metal, and the substrate 1〇2 is, for example, a stone substrate. The enamel pattern 106 is disposed between the winding pattern 1〇4 and the substrate 1〇2. The material of the shielding pattern 106 may be a conductive material, such as a metal or the like. As shown in FIG. 1A, in the present embodiment, the inductance 100 is a configuration of a person (four), but the shape of the inductor of the present invention is not limited to: Example: The configuration mode can be adjusted according to the needs of the person in charge. / 1328237 98-12-9 In the above, the winding pattern 104 is formed by connecting a plurality of windings in series, taking FIG. 1A as an example. The line pattern 1〇4 includes at least an inner ring 104a, an outer ring 104b and an intermediate winding l〇4c. The inner ring 104a and the outer ring l4b are electrically transferred to each other by the intermediate winding l4c, and electrically transferred. The connection method is, for example, a series connection. One end i〇5a of the winding pattern 1〇4 (one end of the inner ring 1〇乜) is, for example, grounded, and the other end of the winding pattern 104 is 1〇9 (outer ring i〇4b) For example, the winding pattern 104 is electrically coupled to the operating voltage. In the present embodiment, the winding pattern 104 forms a winding pattern 1 of three turns with the inner ring 1〇4a, the outer ring l〇4b and the intermediate winding l〇4c. 〇 4. However, the number of turns of the winding pattern 1〇4 is not limited to the three turns depicted in the embodiment, that is, in addition to the inner ring 1〇4a and the outer ring i〇4b, A plurality of turns of the intermediate windings 1〇4c are disposed between the inner rings 10a' and the outer rings 104b, and those skilled in the art can adjust them according to their needs. On the other hand, the shielding patterns 106 are, for example, first. The pattern i〇6a and the second pattern 106b are formed, and the first pattern 1〇6a and the second pattern 1〇邰 are integrally formed, for example, to form a self-shielding structure (as shown in FIG. 1B). The first pattern 106a corresponds to the inside. The projection of the circle i〇4a is disposed under the winding pattern 1〇4 = and the projection of the first winding is formed by the winding of the first ring formed by the W-end l〇5a. 6& The first figure is 1〇6= The inner circle of the green pattern 104 is electrically coupled, and the electrical coupling is: = parallel. Further, in the winding pattern 1〇4 and the masking pattern coffee: at least two via windows 1〇8 are placed, and the first pattern is purchased and the end coffee is purchased. The knife is coupled to the end of the inner ring and the second pattern in the shielding pattern 1〇_ is adjacent to the outer edge ' of the first 8 1328237 98-12-9 l〇6a and at least a part of the winding pattern 1〇 The projection of 4 falls on the second pattern 106b', for example, the projection of the second winding (the intermediate winding 10c) formed by the end 105b falls on the second pattern 16b. In other words, the second pattern 10b can block the substrate 102 and the winding pattern 104 as long as the partial winding pattern 1〇4 can be shielded, thereby reducing the parasitic capacitance generated between the substrate 102 and the inductor 100, that is, the second pattern. 106b has a shadowing effect. As shown in FIG. 1C, in the present embodiment, the projection of the winding pattern 104 all falls on the shielding pattern 106. In this case, the shielding pattern 1〇6 has a more shielding effect between the inductor 1〇〇 and the substrate 102. good. Since the shielding pattern 106 ′ is disposed between the winding pattern 104 and the substrate 102 to block the substrate 1〇2 and the winding pattern 1〇4, the present invention can further reduce the parasitic capacitance between the substrate 102 and the inductor 100. Occurs to reduce the resistance value caused by the substrate 102, thereby increasing the Q value of the inductor. 2A through 2C are schematic cross-sectional views taken along line 1-1' of Fig. 1A, respectively, in accordance with other embodiments of the present invention. Referring to FIG. 2A, the inductor 100 can further include at least one third pattern 110. The material of the third pattern is, for example, a metal. The third pattern 110 is, for example, disposed in the dielectric layer 1〇3 disposed between the winding pattern 104 and the first pattern 106a corresponding to the projection of the inner ring 104a, and the first winding formed by using the end 105a as a starting point. (Inner ring l〇4a) The projection formed by it will fall on the third pattern 110. The third pattern 110 is, for example, connected in parallel with the winding pattern 104' first pattern 10a via a via window 108. 2B and FIG. 2C, the third pattern 110 may also be 98 98-12-9 to be disposed in the dielectric layer 103 between the first pattern 106a and the substrate 102 (as shown). Or in the dielectric layer 1〇3 between the winding pattern 1〇4 and the first pattern 1〇6a and the dielectric layer 1〇3 between the first pattern 1 and the substrate 〇2 (As shown in Figure 2C). By adding the third to the upper 10 between the winding pattern 104 and the substrate 102, the third cross-sectional area of the inductor can be increased by the stacked third pattern u〇, which can effectively reduce the conductor loss and improve The quality of the inductance j〇0. Therefore, for the performance of the inductor, the third pattern "o odor has a gain effect. In addition, in the present embodiment, the substrate 102 causes the inductance 1 :: the disturbance is mainly in the outer ring l〇4b and the substrate 102. A parasitic electric component is generated between them, and by the configuration of the shielding pattern 1〇6, the parasitic electric valley between the outer ring 1 and the substrate 1 can be lowered. On the other hand, since the winding pattern 1〇4 is The inner ring 104a is grounded, so that the parasitic capacitance between the inner ring 1〇4& and the substrate 02 having a lower electric field is smaller, so that the inductance quality loss of the inductor 1〇〇 is reduced. FIG. 3A is a view of another embodiment of the present invention. FIG. 3B is a cross-sectional view along line 14 of FIG. 3B. The present invention further provides an inductor structure, please refer to FIG. 3A and FIG. 3B in another embodiment. The inductor _ is disposed in the dielectric layer 303 above the substrate, wherein the main difference between the inductor 3 〇〇 and the inductor 1 在于 is: in the inductor 300, one end 3 〇 5 of the winding pattern 3 〇 4 (the inner ring 3 One end of the crucible is, for example, electrically coupled to the operating voltage, and the other of the winding pattern 304 is - The end 307 (the end of the outer ring j〇4b) is, for example, grounded. Further, in the shielding pattern 306, the first pattern 3〇6a is a projection corresponding to the outer ring 3〇4b, and is placed on the winding 1328237 98-12-9. Below the pattern 304, the projection formed by the first winding (outer ring 304b) formed by starting from the end 307 falls on the first pattern 3〇6a. In addition, the first pattern is made by the via 308. 3〇6a is connected in parallel with the outer ring 3〇4b, and the second pattern 306b is adjacent to the inner edge of the first pattern 306a, and at least a portion of the projection of the winding pattern 304 falls on the second pattern 3%b, for example, at the end The projection of the second winding (the intermediate winding 304c) calculated by the starting point 307 falls on the second pattern 306b. In this embodiment, the projections of the winding pattern 304 all fall on the shielding pattern 3〇6. In this case, the shielding effect of the shielding pattern 306 between the inductor 300 and the substrate 302 is further as described above. As shown in FIG. 3B, the inductor 3 may further include a second pattern 310 to J. In a preferred implementation. In the example, the position of the third pattern 31〇 is, for example, a projection corresponding to the outer ring 304b disposed in the winding pattern 3〇4. The dielectric layer 3 〇 3 + between the first pattern 306a, and the third pattern 31 〇 is, for example, connected to the winding _ and the first parallel via the via 308. Of course, in other embodiments, the third pattern 31 The position of the crucible may also be corresponding to the projection of the outer ring 3G4b disposed in the privacy layer 3〇3 between the first pattern and the substrate 2 (not shown), or may be simultaneously disposed in the winding pattern 304. The dielectric layer 303 (not shown) between the first pattern and between the pattern and the substrate is applied.
之間所產生的寄生電容較小， 开示）。當内圈l〇4a fe，因此内圈104a ，而可以減少對電 1328237 98-12-9 ，100品質之影響。此外，對於電場較強的外圈104b而言， 藉由遮蔽圖案106的配置，可以減少基底1〇2與電感1〇〇 之間的寄生電容的發生，進而提升電感的Q值。 另一方面，當電感300藉由外圈3〇4b接地，遮蔽圖案 3 〇 6由外圍向内延伸(如圖3 B所示）。當外圈3 〇 4 b接地時; 由於接地的外圈304b的電場較低，因此外圈3〇4b和基底 02之間所產生的寄生電谷會較小’而可以減少對電感 品— 質之影響。此外，對於電場較強的内圈1〇4&而詈，藉由 遮蔽圖案306的配置，可以減少基底3〇2與電感3〇〇 ^間 的寄生電容的發生，進而提升電感的Q值。 圖4為本發明電感結構與習知電感結構之Q值的比較 曲線圖」請參關4 ’本發明的最高Q值(所對應的頻率為 6GHz)t^；^知電感結構的最高q值(所對應的頻 5.1GHz)。此外’圖4所示之〇〜15GHz的頻率範圍中，本 發明之電感都比習知之電感具有較佳的Q值。因此， 明確實能更it-步地擴大制的辭範提升 &The parasitic capacitance generated between them is small, showing). When the inner ring is l〇4a fe, the inner ring 104a can reduce the influence on the quality of the electric 1328237 98-12-9,100. In addition, for the outer ring 104b having a strong electric field, by the arrangement of the shielding pattern 106, the occurrence of parasitic capacitance between the substrate 1〇2 and the inductor 1〇〇 can be reduced, thereby increasing the Q value of the inductor. On the other hand, when the inductor 300 is grounded by the outer ring 3〇4b, the shielding pattern 3 〇 6 extends inwardly from the periphery (as shown in Fig. 3B). When the outer ring 3 〇 4 b is grounded; since the electric field of the grounded outer ring 304b is low, the parasitic electric valley generated between the outer ring 3〇4b and the substrate 02 will be smaller, and the inductance can be reduced. The impact. In addition, for the inner ring 1〇4& which is strong in electric field, by the arrangement of the shielding pattern 306, the occurrence of parasitic capacitance between the substrate 3〇2 and the inductor 3〇〇^ can be reduced, thereby increasing the Q value of the inductor. 4 is a comparison curve of the Q value of the inductor structure and the conventional inductor structure of the present invention. Please refer to 4 'The highest Q value of the present invention (the corresponding frequency is 6 GHz) t^; ^ know the highest q value of the inductor structure (The corresponding frequency is 5.1GHz). Further, in the frequency range of 〇 15 GHz shown in Fig. 4, the inductance of the present invention has a better Q value than the conventional inductor. Therefore, it is indeed possible to expand the rhetoric of the system more in step-by-step.
值。 心J V 综上所述，在本發明之電感結構中，利用具 案以及第二_的遮蔽随來阻隔繞_案與，: 降低基底對電感造成的寄生效應，故可提高電感的口 = ° 卜因1=!月圖叮案中的第二圖案可以遮蔽部份‘線圖 案α此本發明可以更進一步減少基底對繞線 響’以避免寄生電容的發生，進而提升電感的Q = j 發明於繞線圖案與基底之間配置有第右 u /卞則電感的截 12 1328237 98-12-9 再:以=也減少導體損耗，使得電感具有較高 本發明之電感結構可應用的頻率範圍更為 廣泛二進而可應用於無線射頻的電路中。 宰 中的第一圖案和第二圖案為一體成型，而這種具有自： 蔽結構的電感在製造的雜更可轉合於現行的製程中， 玎有助於降低製程所需的成本。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍内，當可作些許之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1Α為依照本發明實施例所繪示之電感結構上視圖。 圖1Β為依照本發明實施例所繪示之遮蔽圖案上視圖。 圖1C為圖1Α中沿著I-Ι，剖面線之剖面示意圖。 圖2Α至圖2C分別為依照本發明其他實施例中沿著圖 1Α中的Ι-Γ剖面線之剖面示意圖。 圖3Α為依照本發明又一實施例所繪示之電感結構上 視圖。 ' 圖3Β為圖3Α中沿著Ι-Γ剖面線之剖面示意圖。 圖4為本發明電感結構與習知電感結構之q值的比較 曲線圖。 【主要元件符號說明】 100、300 :電感 102、302 :基底 13 1328237 98-12-9 103、 303 :介電層 104、 304 :繞線圖案 104a、304a :内圈 104b、304b :外圈 104c、304c :中間繞線 106、306 ··遮蔽圖案 106a、306a :第一圖案 106b、306b :第二圖案 105a、105b、107a、107b、109、305、307 :末端 108、308 :介層窗 110、310 :第三圖案 14value. Heart JV In summary, in the inductor structure of the present invention, the shielding and the second shielding are used to block the winding and the parasitic effect of the substrate on the inductance, so that the inductance of the inductor can be improved. Buin 1 =! The second pattern in the moon pattern can mask part of the 'line pattern α. This invention can further reduce the substrate-to-winding' to avoid the occurrence of parasitic capacitance, thereby increasing the inductance of the Q = j invention. Between the winding pattern and the substrate, there is a right u / 卞 then the inductance of the cut 12 1328237 98-12-9 again: with = also reduce the conductor loss, so that the inductor has a higher frequency range applicable to the inventive inductor structure More extensively, it can be applied to circuits of wireless radio frequency. The first pattern and the second pattern in the slaughter are integrally formed, and the inductance of the self-contained structure can be transferred to the current process, which helps to reduce the cost required for the process. While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a top view of an inductor structure according to an embodiment of the invention. FIG. 1 is a top view of a masking pattern according to an embodiment of the invention. 1C is a cross-sectional view taken along line I-Ι of FIG. 1 . 2A through 2C are cross-sectional views, respectively, taken along line Ι-Γ in Fig. 1 in accordance with other embodiments of the present invention. 3 is a top view of an inductor structure according to another embodiment of the present invention. Figure 3 is a schematic cross-sectional view along the Ι-Γ section line in Figure 3Α. Figure 4 is a graph comparing the q values of the inductive structure of the present invention with a conventional inductive structure. [Main component symbol description] 100, 300: Inductance 102, 302: Substrate 13 1328237 98-12-9 103, 303: Dielectric layer 104, 304: Winding pattern 104a, 304a: Inner ring 104b, 304b: Outer ring 104c 304c: intermediate windings 106, 306 · shielding patterns 106a, 306a: first patterns 106b, 306b: second patterns 105a, 105b, 107a, 107b, 109, 305, 307: ends 108, 308: vias 110 , 310: third pattern 14