TWI273458B - Computer readable recording medium storing comparing program - Google Patents
Computer readable recording medium storing comparing program Download PDFInfo
- Publication number
- TWI273458B TWI273458B TW94103016A TW94103016A TWI273458B TW I273458 B TWI273458 B TW I273458B TW 94103016 A TW94103016 A TW 94103016A TW 94103016 A TW94103016 A TW 94103016A TW I273458 B TWI273458 B TW I273458B
- Authority
- TW
- Taiwan
- Prior art keywords
- connection
- name
- line
- computer
- recording medium
- Prior art date
Links
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
I2734^6twfdoc/c 九、發明說明: 【發明所屬之技術領域】 ^ 本發明是有關於一種電腦可讀取記錄媒體,且特別是 有關於一種儲存有比對程式的電腦可讀取記錄媒體。 【先前技術】 現今印刷電路板(Print Cricuit Board)的製作流程係先 以繪圖軟體Oread Capture晝出線路圖,接著再以佈線工具 依據此線路圖來完成佈線圖。當此佈線圖經由模擬程序而 驗證其正確性之後,才將此佈線圖輸出至印刷電路板廠(也 就是所謂的tape out),以進行半導體製程。 一般來說,在將佈線圖輸出至印刷電路板廠之前,研 發工程師會陸續修改線路圖中的線路與零件。而且,當工 程師對線路圖進行修改之後,必須接著在佈線圖中作相對 應的0改為了確5忍工程師在佈線圖中所做的修改均確實 對應線路圖的修改處,一般在完成線路圖與佈線圖的修改 之後,會分別列出線路圖與佈線圖的網絡清單(netlist) =並 馨在兩者之間進行比對。 、而目%大多係以人工的方式進行上述之比對,實 為耗費人力與時間,且容易因人為因素而導致誤判,進而 影響佈線圖的修改正確率。 【發明内容】 “有鏗於此,本發明的目的就是在提供一種電腦可讀取 1其係儲存—比程式’可自動比對線路圖網絡 ’月早”綠圖網絡清單’以縮短比對過程所需耗費的工時。 5 I2734§§ 6twf.doc/c 本發明提出-種電腦可讀取記錄媒體,其係 且當此電腦可讀取記錄媒體被電腦讀取時,儲 存於其中的_程切執行以下步驟。首先,f = 存在-第-陣列中。其中,線路圖Ξ 接ί個第=二二連線(net),而每—第—連線均係連 __件。接者,讀取佈線圖網絡清單,並將其儲I2734^6twfdoc/c IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a computer readable recording medium, and more particularly to a computer readable recording medium storing a comparison program. [Prior Art] The current production process of the Print Cricuit Board is to first draw the circuit diagram with the drawing software Ofed Capture, and then use the wiring tool to complete the wiring diagram according to the wiring diagram. When the wiring pattern is verified to be correct by the simulation program, the wiring pattern is output to a printed circuit board factory (also called a tape out) for semiconductor manufacturing. In general, R&D engineers will revise the wiring and parts in the wiring diagram before exporting the wiring diagram to the printed circuit board factory. Moreover, when the engineer modifies the wiring diagram, it must be changed to the corresponding 0 in the wiring diagram. The modification made by the engineer in the wiring diagram does correspond to the modification of the wiring diagram. Generally, the wiring diagram is completed. After the modification of the wiring diagram, the network list (netlist) of the wiring diagram and the wiring diagram will be separately listed and the comparison between the two will be made. Most of them are artificially compared in the above manner, which is labor-intensive and time-consuming, and is easily caused by human factors, which in turn affects the correctness of the wiring diagram. SUMMARY OF THE INVENTION [In view of the above, the object of the present invention is to provide a computer readable 1 system storage-ratio program that can automatically compare the line graph network 'month early green map network list' to shorten the comparison The labor required for the process. 5 I2734§§ 6twf.doc/c The present invention proposes a computer readable recording medium which, when the computer readable recording medium is read by a computer, stores the following steps. First, f = exist - in the - array. Among them, the circuit diagram is connected to the second = 2nd connection (net), and each - the first connection is connected to __ pieces. Receiver, read the wiring diagram network list and store it
第—陣列中。其中,佈線圖網絡清單中包括多個第 -連線’而每—第二連線均係連接多個第二元件 比對這些第-連線與第二連線是否相同。 *、 在本發明的較佳實施例中,上述比對第—連線與第二 連線=步驟,如是先比對第—連線與第二連線的數量及名 機再選取名稱相同的第—連線與第二連線,並比對 ^,線所連接的這些第_元件接腳與第二連線所連接 的這些第二元件接腳是否相同。First - in the array. Wherein, the wiring diagram network list includes a plurality of first-connections and each of the second connections is connected to the plurality of second components, and whether the first-connections and the second connections are the same. * In the preferred embodiment of the present invention, the comparison of the first connection and the second connection = step, if the first comparison of the number of the first connection and the second connection and the name of the second machine and then select the same name The first connection is connected to the second connection, and the comparison is performed, and the second component pins connected to the second component are connected to the second component pins connected to the second connection.
在本發明的較佳實施例中,上述比對第一連線與第二 」線之名_步驟例如是先以線關網絡清單巾的這些第 心^線為基準,比對佈線圖網絡清單中的這些第二連線名 否與這些第—連_名稱相同。然後再以佈線圖網絡 的這些第二連線為基準,比對線路圖網絡清單中的 這~第一連線名稱是否與這些第二連線的名稱相同。 I在本發明的較佳實施例中,當這些第一/第二連線至少 中之—與所有第二/第一連線的名稱均不相同時,比對程 式在執行第一連線與第二連線的名稱及數量比對之後,更 c/c 12734絲_。 包括儲存或輸出名稱不同的第一連線及/或第二連線之名 稱。在-實财,其例如是以文字標的方式儲存或輸出名 稱不同的第一連線及/或第二連線之名稱。 ^ ,本發明的較佳實施例中,當比對程式在具有相同名 稱之第一連線與第二連線中比對這些第一元件與這些第二 =件之接腳是否相同之後,若這些第—元件接腳與這些第 =元件接腳不同,更包括儲存或輸出這些第一元件與&些 第二元件的接腳名稱。在一實例中,其例如是以文字檔= 方式儲存或輸出這㈣-it件與這些第二S件的接^名 稱0 在本發明的較佳實施例中,第—陣列例如是由兩個第 :子陣列所構成。而且,讀取線路_絡清單的步驟例如 疋.(a)碩取線路圖網絡清單的一行資料,這行資料包括 某第—連線的名稱,以及此第一連線所連接之這些第一 ^件接腳的名稱。(b)將此第-連線的名稱儲存於二個第 一子陣列中,並將第一連線所連接之這些第一元件接腳的 =稱儲存於另—個第—子陣列中。(e)重複步驟⑻至步驟 (b) ’直到完全讀取線路圖網絡清單。 、在本發明的較佳實施例中,上述讀取線路圖網絡清單 的步驟中,在步驟(a)之後以及步驟(b)之前,更包括判斷步 ,(=)所tw取之那—行資料是否為線路圖網絡清單的第一 =貝料。在一貫例巾,若步驟⑻中所讀取到的不是線路圖 、用絡清單的第-行資料,則重新進彳f步驟⑻。 7 6twf.doc/c 6twf.doc/cIn a preferred embodiment of the present invention, the step of comparing the first connection line and the second line name is, for example, first referring to the first heart lines of the line-off network list towel, and comparing the wiring diagram network list. These second connection names in the same are the same as these first-connection names. Then, based on these second connections of the wiring diagram network, the name of the first connection in the network list of the comparison diagram is the same as the name of the second connection. In a preferred embodiment of the present invention, when at least the first/second connection lines are different from the names of all the second/first connections, the comparison program performs the first connection and After the name and quantity of the second connection are compared, more c/c 12734 silk _. This includes storing or outputting the names of the first and/or second connections with different names. In real money, for example, the name of the first connection and/or the second connection with different names are stored or outputted in a textual manner. In the preferred embodiment of the present invention, when the alignment program compares the first and second pins of the first and second wires having the same name, These first component pins are different from these third component pins, and further include pin names for storing or outputting these first components and & second components. In an example, the storage or output of the (four)-it member and the second S-piece are, for example, in the form of a text file. In the preferred embodiment of the present invention, the first array is, for example, two. The first: consists of subarrays. Moreover, the step of reading the line_network list is, for example, (. (a) a row of data of the master circuit diagram network list, the line data includes the name of a certain first connection, and the first connection of the first connection line The name of the piece of the pin. (b) storing the name of the first-connection in the two first sub-arrays, and storing the =-reference of the first component pins to which the first connection is connected in the other---sub-array. (e) Repeat steps (8) through (b) ' until the line map network list is completely read. In the preferred embodiment of the present invention, in the step of reading the network diagram of the circuit diagram, after step (a) and before step (b), the step is further included, and (=) the line taken by tw Whether the data is the first = shell material of the route map network list. In the case of a regular case, if the line-map and the line-of-line data of the list are not read in step (8), the step (8) is re-entered. 7 6twf.doc/c 6twf.doc/c
在本發明的較佳實施例中,第二陣列例如是由兩個第 二子陣列所構成。而且,讀取佈線圖網絡清單的步驟例如 疋·(a)讀取佈線圖網絡清單的一行資料,這行資料包括 某一第二連線的名稱,以及此第二連線所連接之這些第二 元件接腳的名稱。(b)將此第二連線的名稱儲存於一個第 二子陣列中,並將第二連線所連接之這些第二元件接腳的 名稱儲存於另一個第二子陣列中。(c)重複步驟⑻至步驟 (b) ’直到完全讀取佈線圖網絡清單。 在本發明的較佳實施例中,上述讀取佈線圖網絡清單 的步驟中,在步驟(a)之後以及步驟(b)之前,更包括判斷步 驟⑻所讀取之那一行資料是否為佈線圖網絡清單的第一 行資料。在一實例中,若步驟(a)中所讀取到的不是佈線圖 網絡清單的第一行資料,則重新進行步驟⑻。In a preferred embodiment of the invention, the second array is comprised, for example, of two second sub-arrays. Moreover, the step of reading the wiring diagram network list is, for example, (a) reading a line of the wiring diagram network list, the data including the name of a second connection, and the connection of the second connection The name of the two component pin. (b) storing the name of the second connection in a second sub-array and storing the names of the second component pins to which the second connection is connected in the other second sub-array. (c) Repeat steps (8) through (b) ' until the wiring diagram network list is completely read. In the preferred embodiment of the present invention, in the step of reading the network diagram of the wiring diagram, after step (a) and before step (b), it is further included whether the line of data read by step (8) is a wiring diagram. The first line of the network list. In an example, if the first line of data in the list of network diagrams is not read in step (a), step (8) is re-executed.
本發明之電腦可讀取記錄媒體係用以比對線路圖與佈 線圖=絡清單,並將兩者之間的相異處儲存為檔案或是顯 不於螢幕上。由此可知,本發明不但可以縮短習知以人工 比對所耗費的工時,更可以避免人工誤判所造成的問題, 進而提高比對結果的正確性。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易It,下文特舉車父佳實施例,並配合所附圖式,作詳細說 明如下。 【實施方式】 清單 本發明之比對程式可自動比對線路圖與佈線圖的網路 ,以縮短比對過程中所需耗費的工時,並提高比對結 8 •6twf.doc/c =:實施例說明本發明,但其並非用以 施例務做修飾、,惟其仍屬於本發明之顧。神對下边貫 碰鱗^ i 9 T ^本發明之—較佳實關巾電腦可讀取吃錄 腦讀取時所執行的步驟流程圖。在此,本發明^ ^可魏記錄媒體係儲存有—線路設計圖網絡清單比對The computer readable recording medium of the present invention is used to compare a circuit diagram and a wiring diagram to a list, and store the difference between the two as an archive or on a screen. Therefore, the present invention can not only shorten the labor time that is conventionally used for manual comparison, but also avoid the problems caused by manual misjudgment, thereby improving the accuracy of the comparison result. The above and other objects, features, and advantages of the present invention will become more apparent from the description of the appended claims. [Embodiment] The comparison program of the present invention can automatically compare the network of the wiring diagram and the wiring diagram to shorten the labor time required in the comparison process and increase the comparison knot. 8 • 6twf.doc/c = The invention is described in the following examples, but it is not intended to be modified, but it still belongs to the invention. God touches the scales on the lower side ^ i 9 T ^ The preferred embodiment of the invention can read the flow chart of the steps performed during the reading of the brain. Here, the present invention can be used to record a network list-line design map network list comparison
t明f $腦可讀記錄媒體例如是光碟或記憶體 寺牛幻來祝,本發明之電腦可讀記錄媒體可以是CD、 VD;可榀式包腦磁碟(p〇rtabie c〇mputer出也时^、隨機 子取德體(mndGm aeeess memory,RAM)、唯讀 〇-d_only memory,R〇M)、可抹除可程式唯 ((erasable programmable read-only memory,EPROM)成是 快閃記憶體)等等。 /The brain readable recording medium is, for example, a compact disc or a memory temple, and the computer readable recording medium of the present invention may be a CD or a VD; a scorpion-type brain disk (p〇rtabie c〇mputer) Also, ^, random sub-details (mndGm aeeess memory, RAM), read-only 〇-d_only memory, R〇M), erasable programmable read-only memory (EPROM) is flashing Memory) and so on. /
,參照圖1,首先進行步驟sl〇〇,以讀取一線路圖網 、α/月單其中,此線路圖網絡清單包括多個第一連線,且 母弟一連線係連接多個第一元件。接著進行步驟§ι〇2, 以讀取一佈線圖網絡清單。其中,此佈線圖網絡清單包括 夕個第一連線,且每一第二連線係連接多個第二元件。當 然,本實施例僅係用以說明本發明,本發明並不限定讀取 線路圖網絡清單及佈線圖網絡清單的先後順序,熟習此技 藝者可自行依據實際狀況所需來決定先讀取線路圖網絡清 單或是佈線圖網絡清單。 值得注意的是,由於線路圖網絡清單與佈線圖網絡清 單的檔案格式並不相同,因此在一較佳實施例中,本發明 9 doc/c I27345S·· 例如是先將線路圖鱗清單儲存在―第—陣列中,而佈線 網絡清單難贿在-第二卩車财,之後再贿存在第一 陣列的棺案與第二陣列中的標案做比對。其中,第一陣列 例如是包括有兩個第—子陣列,而第二陣列亦例如是包括 兩個第二子_。以下將舉實施例說明圖1之步驟S100 與步驟S102的詳細實行步驟。 圖2繪示為本發明之一實施例中讀取線路圖網絡清 的步驟流程圖。請參照圖2,首先進行步驟s細, 線路圖網絡清單中的—行資料,而此行資料包括—第 線的名稱以及此第-連線所連接之多個第—元件接腳的名 =接者進行步驟S2G2,以將此第—連線的名稱儲存在 f弟:子_其中之―,並域此第-連線所連接之這些 第-兀件的接腳名稱儲存在另—個第—子陣列中。, 不斷地重複步驟S2〇〇至步驟讀,以便於依序讀ς線路 =絡^早中的每—行資料,制完全讀取線路圖網絡清 :連接ΪΓ:線路圖網絡清單中所有第一連線及其 所連接之弟一兀件均儲存到第一陣列中。 ^得-提的是’由於線路_絡 賣取’因此在步驟S20"所讀:二 ί_絡清單中的第-行資料,才可確保後續步 線路圖網絡清單中的所有資料。所以,在—較佳命 1,發明更在進行步驟·之後以及進行步驟二 之刖,判斷步驟200中所讀取到的資料是否為線路圖網 I27345§6twfdoc/c 絡e單的弟一行資料,如步驟;5201所述。而且,若步驟 2〇〇中所讀取到的資料不是線路圖網絡清單的第一行資 料’則需重新進行步驟S200,然後再進行步驟S201,直 到步驟S200所讀取到的資料為線路圖網絡清單的第一行 資料,才繼續進行後續的步驟S202。 另外,本實施例讀取佈線圖網絡清單的步驟係與上述 讀取線路圖網絡清單的步驟大致上相同,唯一的相異處在 於佈線圖網絡清單中的第二連線之名稱係儲存在一第二子 陣列中,而此第二連線所連接之第二元件的接腳名稱則係 儲存在另一第二子陣列中。因此此處將不再贅述讀取佈線 圖網絡清單的步驟。 在靖取線路圖網絡清單與佈線圖網絡清單之後,接著 即是對線路圖網絡清單與佈線圖網絡清單進行比對,以下 將舉實施例加以詳細說明比對的步驟。請再次參照圖1, 在完成步驟S100及步驟S102之後,接著進行步驟S104, 以比對線路圖網絡清單中的第一連線之名稱與數量是否與 佈線圖網絡清單中的第二連線之名稱與數量相同。 在一較佳實施例中,步驟S104的比對方法例如是先 路圖網絡清單中的第一連線為基準,比對佈線圖網絡 ^單中的第二連線名稱是否與這些第—連線相同。铁 2線圖網絡清單中的第二連線為基準,比對線路圖網絡 π早中的第-連線是否與這些第二連線相同。藉此方法即 可比對出線路圖網絡清單以及佈線圖網絡清單中是否有新 11 12734¾ 6twf.doc/c ,或赚的第w第二連線。而且,當線路_絡清單令的 某-弟-連線與佈線_絡清單中财第二連線的名 中的某—第二連線與線路圖 S106l⑽存或輸出此第—/第二連線的名稱,且m 二式儲存或輸出’以便於相關人員可以清楚瞭 解弟連線與弟二連線兩者相異之處。 請繼續參照圖1,在步驟S108中分別選取這些第一連 線其中之—以及與此第—連線名稱相_第二連線,以比 對,第:連線所連接之第—元件接腳與此第二連線所連接 之弟一元件接腳名稱是否相同。換言之,步驟S⑽係用 =驗證^稱相_第—連線與第二連線是錢接相同的元 ^而這些第一元件用來相互連接的接腳是否與第二元件 用來相互連接的接腳相同。 承上所述’當這些第一元件接腳與第二元件接腳的名 % t同時,則進行步驟S110,以儲存或輸出此第一元件及 一70件接腳的名稱’且其例如是以文字檔的方式儲存 或輸出。如此不斷重複步驟S104及其後續步驟,直到線 路圖網絡清單中所有第一連線與佈線圖網絡清單中所有第 二連線均完成比對。 取士由上述可知,本發明之電腦可_取記錄媒體被電腦讀 狄Ii係自動讀取並比對線路圖之網絡清單與佈線圖之網 ϋ早’然後將兩者之間的相減齡為難或是顯示於 上,使工程師能夠進一步修改佈線圖,以使其與線路 12 Ι2734§§— 圖相符。因此’本發明不但可以縮短習知以人工比對所耗 費的工時,更可以避免人工誤判所造成的問題,進而提高 比對結果的正確性。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限疋本發明,任何池習此技藝者,在不脫離本發明之精神 和範圍内,當可作些許之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1繪示為本發明之一較佳實施例中電腦可讀取記錄 媒體被電腦讀取時所執行的步驟流程圖。 圖2 !會示為本發明之一實施例中讀取線路圖網絡清單 的步驟流程圖。 【主要元件符號說明】 S100 :讀取一線路圖網絡清單 S102 :讀取一佈線圖網絡清單 旦曰=ί對線路圖網絡清單中的第-連線之名稱與數 里疋否與佈線圖網絡清單中 双 Cln. ,月早甲的弟一連線之名稱與數量相同 wg〜矛一 /弟二運線的4 同之第二連:斤連::第-元件接腳與名稱相 S i i 0 . Μ / 的弟一兀件接腳名稱是否相同 儲?ί輸出名稱不同之第—/第二連線的名稱 接腳的名:存或輸出名稱不同之第一元件及^二元件 =.·讀取線路_絡清單中的—行資料 判斷所δ胃取到的資料是否树路H絡清單的 13 I2734^§6twf>doc/cReferring to FIG. 1, step sl1 is first performed to read a line graph network and an alpha/monthly list. The network list of the circuit diagram includes a plurality of first connections, and the first connection of the mother line is connected to the plurality of One component. Then proceed to step §ι〇2 to read a list of wiring diagram networks. Wherein, the wiring diagram network list includes a first connection, and each second connection is connected to a plurality of second components. Of course, the present embodiment is only for explaining the present invention. The present invention does not limit the order of reading the network diagram of the circuit diagram and the network list of the wiring diagram. Those skilled in the art can decide to read the line according to the actual situation. Figure network list or wiring diagram network list. It should be noted that, since the file format of the circuit diagram network list and the wiring diagram network list are not the same, in a preferred embodiment, the present invention 9 doc/c I27345S·· In the first-array, the list of wiring networks is difficult to bribe in the second-hand car, and then the first array of cases is compared with the standard in the second array. The first array includes, for example, two first-sub-arrays, and the second array includes, for example, two second sub-. The detailed implementation steps of step S100 and step S102 of Fig. 1 will be described below by way of an embodiment. 2 is a flow chart showing the steps of clearing a network diagram of a circuit diagram in accordance with an embodiment of the present invention. Referring to FIG. 2, the step s is first performed, and the line data in the network list of the circuit diagram includes the name of the line and the names of the plurality of element pins connected to the first line connection. The receiver proceeds to step S2G2 to store the name of the first connection in the f: _ _ among them, and the pin names of the first components connected to the first connection are stored in another In the first subarray. , repeat step S2〇〇 to step reading continuously, so as to read the line data of each line in the order of the line = network ^, and read the line map network clear: connection: all the first in the line map network list The connection and its connected brothers are stored in the first array. ^ 得-提提 is the 'line-selling', so in the step S20" read: the second line of the data in the list, to ensure all the data in the subsequent step map network list. Therefore, after the process is better, the invention is further performed after the step, and after the step 2 is performed, it is judged whether the data read in the step 200 is a line of the data of the line graph network I27345 § 6twfdoc / c , as described in step 5201. Moreover, if the data read in the step 2〇〇 is not the first line data of the route map network list, the step S200 needs to be performed again, and then the step S201 is performed until the data read in the step S200 is the circuit diagram. The first line of the network list continues with the subsequent step S202. In addition, the step of reading the wiring diagram network list in this embodiment is substantially the same as the step of reading the network diagram of the circuit diagram, and the only difference is that the name of the second connection in the wiring diagram network list is stored in a In the second sub-array, the pin names of the second components to which the second connection is connected are stored in another second sub-array. Therefore, the steps of reading the wiring diagram network list will not be repeated here. After arranging the route list network list and the wiring diagram network list, then the line map network list and the wiring diagram network list are compared. The following steps will be described in detail by way of examples. Referring to FIG. 1 again, after step S100 and step S102 are completed, step S104 is performed to compare whether the name and quantity of the first connection line in the network diagram list of the circuit diagram are the second connection in the list of the network diagram of the wiring diagram. The name is the same as the quantity. In a preferred embodiment, the comparison method of step S104 is, for example, a reference to the first connection in the network of the prior road diagram, and whether the second connection name in the network diagram of the comparison diagram is connected to the first connection. The lines are the same. The second connection in the iron bar graph network list is the reference, and whether the first connection in the middle of the line map network π is the same as the second connection. In this way, it is possible to compare the line map network list and the wiring diagram network list for new 11 127343⁄4 6twf.doc/c, or earn the second connection of w. Moreover, when the line-connection list and the wiring-connection list are in the name of the second connection of the second line, the second connection line and the circuit diagram S106l (10) store or output the first-/second connection The name, and m binary storage or output 'so that the relevant personnel can clearly understand the difference between the brother connection and the second line. Referring to FIG. 1 , in step S108, the first connection line and the second connection line of the first connection line are respectively selected, and the first component connected to the first connection is connected. Whether the foot of the foot is connected to the second component of the second component is the same. In other words, step S(10) uses the = verification ^ phase _ the first connection is the same as the second connection, and the pins used by the first components for interconnection with each other are used to interconnect with the second component. The pins are the same. When the names of the first component pins and the second component pins are simultaneously, step S110 is performed to store or output the first component and a 70-pin name 'and it is, for example, Store or output as a text file. Step S104 and its subsequent steps are repeated this way until all the first wires in the line graph network list are aligned with all the second wires in the wiring map network list. According to the above, the computer of the present invention can take the recording medium and read it automatically by the computer, and compare the network list of the circuit diagram with the wiring diagram of the wiring diagram, and then reduce the age between the two. Efforts or display on top allow the engineer to further modify the wiring diagram to match the line 12 Ι 2734 §§- diagram. Therefore, the present invention can not only shorten the labor time which is conventionally used for manual comparison, but also avoid the problems caused by manual misjudgment, thereby improving the accuracy of the comparison result. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the scope of the present invention, and it is possible to make some modifications and retouchings without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a flow chart showing the steps performed when a computer readable recording medium is read by a computer in accordance with a preferred embodiment of the present invention. FIG. 2 is a flow chart showing the steps of reading a circuit diagram network list in an embodiment of the present invention. [Main component symbol description] S100: Read a circuit diagram network list S102: Read a wiring diagram network list 曰 曰 = ί on the circuit diagram network list the name of the first connection and the number of lines and the wiring diagram network In the list of double Cln., the name of the first line of the brother of the morning is the same as the number of the wg~ spear one / the second line of the second line with the same second: Jinlian:: the first - component pin and the name phase S ii 0. Μ / The code of the brother's one pin is the same? ί Output the name of the different - / second connection name of the pin: the first component and the second component with different names. ·Read the line data in the line_network list to determine whether the data obtained by the δ stomach is 13 I2734^§6twf>doc/c
第一行資料 S202 :將第一連線的名稱儲存在這些第一子陣列其中 之一,並且將第一連線所連接之這些第一元件的接腳名稱 儲存在另一個第一子陣列中 14The first line of data S202: storing the name of the first connection in one of the first sub-arrays, and storing the pin names of the first components connected to the first connection in another first sub-array 14
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW94103016A TWI273458B (en) | 2005-02-01 | 2005-02-01 | Computer readable recording medium storing comparing program |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW94103016A TWI273458B (en) | 2005-02-01 | 2005-02-01 | Computer readable recording medium storing comparing program |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200629091A TW200629091A (en) | 2006-08-16 |
TWI273458B true TWI273458B (en) | 2007-02-11 |
Family
ID=38621537
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW94103016A TWI273458B (en) | 2005-02-01 | 2005-02-01 | Computer readable recording medium storing comparing program |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI273458B (en) |
-
2005
- 2005-02-01 TW TW94103016A patent/TWI273458B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TW200629091A (en) | 2006-08-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8417504B2 (en) | Conversion of circuit description to a transaction model | |
US8051400B2 (en) | Modifying integrated circuit layout | |
US20030083855A1 (en) | Method for generating logic simulation model | |
TW476069B (en) | Placement and routing for array device | |
US6028991A (en) | Layout parameter extraction device | |
US9881119B1 (en) | Methods, systems, and computer program product for constructing a simulation schematic of an electronic design across multiple design fabrics | |
EP1447759A1 (en) | Generation of a testbench for a representation of a device | |
US7225416B1 (en) | Methods and apparatus for automatic test component generation and inclusion into simulation testbench | |
JP2004502259A (en) | Method and system for checking tiered metal terminations, surroundings, and exposure | |
US20110032029A1 (en) | Configurable embedded processor | |
CN101196946A (en) | Method, device, and printed circuit board manufacturing method for supporting design circuits | |
CN105740487B (en) | Domain and schematic diagram consistency verification method based on Process design kit | |
CN100426244C (en) | Marking system and method | |
CN106681698A (en) | Dynamic list generating method and device | |
JPH07200654A (en) | Integrated circuit and its constructing method for specific purpose | |
TWI273458B (en) | Computer readable recording medium storing comparing program | |
US7559042B2 (en) | Layout evaluating apparatus | |
US20060090152A1 (en) | Schematic diagram generation and display system | |
JP4142176B2 (en) | Storage medium recording interface specification definition, connection verification method, and signal pattern generation method | |
JP5409231B2 (en) | Design system | |
US6734046B1 (en) | Method of customizing and using maps in generating the padring layout design | |
CN105260545B (en) | A kind of verification method of programmable circuit system | |
JPH02236779A (en) | Scan path connecting system | |
JP2008090695A (en) | Integrated circuit design method, integrated circuit design apparatus, and integrated circuit design program | |
JP4314824B2 (en) | Information processing apparatus and method, and program |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |