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TWI268686B - Apparatus and method for performing transparent cipher block chaining mode cryptographic functions - Google Patents

Apparatus and method for performing transparent cipher block chaining mode cryptographic functions

Info

Publication number
TWI268686B
TWI268686B TW093133735A TW93133735A TWI268686B TW I268686 B TWI268686 B TW I268686B TW 093133735 A TW093133735 A TW 093133735A TW 93133735 A TW93133735 A TW 93133735A TW I268686 B TWI268686 B TW I268686B
Authority
TW
Taiwan
Prior art keywords
cryptographic
cryptographic operations
instruction
logic
cbc block
Prior art date
Application number
TW093133735A
Other languages
Chinese (zh)
Other versions
TW200536329A (en
Inventor
G Glenn Henry
Thomas A Crispin
Terry Parks
Original Assignee
Via Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/826,814 external-priority patent/US7542566B2/en
Application filed by Via Tech Inc filed Critical Via Tech Inc
Publication of TW200536329A publication Critical patent/TW200536329A/en
Application granted granted Critical
Publication of TWI268686B publication Critical patent/TWI268686B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

The present invention provides an apparatus and method for performing cryptographic operations on a plurality of input data blocks within a processor. In one embodiment, an apparatus for performing cryptographic operations is provided. The apparatus includes a cryptographic instruction, CBC block pointer logic, and execution logic. The cryptographic instruction is received by a computing device as part of an instruction flow executing on the computing device. The cryptographic instruction prescribes one of the cryptographic operations. The one of the cryptographic operations includes a plurality of CBC block cryptographic operations performed on a corresponding plurality of input text blocks. The CBC block pointer logic is operatively coupled to the cryptographic instruction. The CBC block pointer logic directs the computing device to update pointer registers and intermediate results for each of the plurality of CBC block cryptographic operations. The execution logic is operatively coupled to the CBC block pointer logic. The execution logic executes the one of the cryptographic operations.
TW093133735A 2004-04-16 2004-11-05 Apparatus and method for performing transparent cipher block chaining mode cryptographic functions TWI268686B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/826,814 US7542566B2 (en) 2003-04-18 2004-04-16 Apparatus and method for performing transparent cipher block chaining mode cryptographic functions

Publications (2)

Publication Number Publication Date
TW200536329A TW200536329A (en) 2005-11-01
TWI268686B true TWI268686B (en) 2006-12-11

Family

ID=34887811

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093133735A TWI268686B (en) 2004-04-16 2004-11-05 Apparatus and method for performing transparent cipher block chaining mode cryptographic functions

Country Status (2)

Country Link
CN (1) CN1649296A (en)
TW (1) TWI268686B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8538015B2 (en) 2007-03-28 2013-09-17 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8538012B2 (en) * 2007-03-14 2013-09-17 Intel Corporation Performing AES encryption or decryption in multiple modes with a single instruction
US8719589B2 (en) * 2010-05-25 2014-05-06 Via Technologies, Inc. Microprocessor that facilitates task switching between multiple encrypted programs having different associated decryption key values

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8538015B2 (en) 2007-03-28 2013-09-17 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9634829B2 (en) 2007-03-28 2017-04-25 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9634828B2 (en) 2007-03-28 2017-04-25 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9634830B2 (en) 2007-03-28 2017-04-25 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9641320B2 (en) 2007-03-28 2017-05-02 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9641319B2 (en) 2007-03-28 2017-05-02 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9647831B2 (en) 2007-03-28 2017-05-09 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9654282B2 (en) 2007-03-28 2017-05-16 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US9654281B2 (en) 2007-03-28 2017-05-16 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10158478B2 (en) 2007-03-28 2018-12-18 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10164769B2 (en) 2007-03-28 2018-12-25 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10171231B2 (en) 2007-03-28 2019-01-01 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10171232B2 (en) 2007-03-28 2019-01-01 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10181945B2 (en) 2007-03-28 2019-01-15 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10187201B2 (en) 2007-03-28 2019-01-22 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10256971B2 (en) 2007-03-28 2019-04-09 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10256972B2 (en) 2007-03-28 2019-04-09 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10263769B2 (en) 2007-03-28 2019-04-16 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10270589B2 (en) 2007-03-28 2019-04-23 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10291394B2 (en) 2007-03-28 2019-05-14 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10313107B2 (en) 2007-03-28 2019-06-04 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10554386B2 (en) 2007-03-28 2020-02-04 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)
US10581590B2 (en) 2007-03-28 2020-03-03 Intel Corporation Flexible architecture and instruction for advanced encryption standard (AES)

Also Published As

Publication number Publication date
CN1649296A (en) 2005-08-03
TW200536329A (en) 2005-11-01

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