TWI267134B - Electropolishing and electroplating methods - Google Patents
Electropolishing and electroplating methodsInfo
- Publication number
- TWI267134B TWI267134B TW092108452A TW92108452A TWI267134B TW I267134 B TWI267134 B TW I267134B TW 092108452 A TW092108452 A TW 092108452A TW 92108452 A TW92108452 A TW 92108452A TW I267134 B TWI267134 B TW I267134B
- Authority
- TW
- Taiwan
- Prior art keywords
- electroplating
- current density
- recessed regions
- density range
- metal layer
- Prior art date
Links
- 238000009713 electroplating Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D3/00—Electroplating: Baths therefor
- C25D3/02—Electroplating: Baths therefor from solutions
- C25D3/38—Electroplating: Baths therefor from solutions of copper
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/18—Electroplating using modulated, pulsed or reversing current
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/605—Surface topography of the layers, e.g. rough, dendritic or nodular layers
- C25D5/611—Smooth layers
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/615—Microstructure of the layers, e.g. mixed structure
- C25D5/617—Crystalline layers
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Metallurgy (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Organic Chemistry (AREA)
- Materials Engineering (AREA)
- Electrochemistry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electroplating Methods And Accessories (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
In one aspect of the present invention, an exemplary method is provided for electroplating a conductive film on a wafer. The method includes electroplating a metal film on a semiconductor structure having recessed regions and non-recessed regions within a first current density range before the metal layer is planar above recessed regions of a first density, and electroplating within a second current density range after the metal layer is planar above the recessed regions. The second current density range is greater than the first current density range. In one example, the method further includes electroplating in the second current density range until the metal layer is planar above recessed regions of a second density, the second density being greater than the first density, and electroplating within a third current density range thereafter.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US37226302P | 2002-04-12 | 2002-04-12 | |
US38213302P | 2002-05-21 | 2002-05-21 | |
US38782602P | 2002-06-08 | 2002-06-08 | |
US39831602P | 2002-07-24 | 2002-07-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200402781A TW200402781A (en) | 2004-02-16 |
TWI267134B true TWI267134B (en) | 2006-11-21 |
Family
ID=29255582
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW092108452A TWI267134B (en) | 2002-04-12 | 2003-04-11 | Electropolishing and electroplating methods |
Country Status (9)
Country | Link |
---|---|
US (1) | US20060049056A1 (en) |
EP (1) | EP1495161A4 (en) |
JP (2) | JP2005522587A (en) |
KR (1) | KR20040097337A (en) |
CN (1) | CN1685086B (en) |
AU (1) | AU2003226367A1 (en) |
CA (1) | CA2479873A1 (en) |
TW (1) | TWI267134B (en) |
WO (1) | WO2003088316A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10217563B2 (en) | 2013-08-02 | 2019-02-26 | Cyntec Co., Ltd. | Method of manufacturing multi-layer coil and multi-layer coil device |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7128825B2 (en) | 2001-03-14 | 2006-10-31 | Applied Materials, Inc. | Method and composition for polishing a substrate |
US6899804B2 (en) | 2001-04-10 | 2005-05-31 | Applied Materials, Inc. | Electrolyte composition and treatment for electrolytic chemical mechanical polishing |
US7232514B2 (en) | 2001-03-14 | 2007-06-19 | Applied Materials, Inc. | Method and composition for polishing a substrate |
US7323416B2 (en) | 2001-03-14 | 2008-01-29 | Applied Materials, Inc. | Method and composition for polishing a substrate |
TWI288443B (en) | 2002-05-17 | 2007-10-11 | Semiconductor Energy Lab | SiN film, semiconductor device, and the manufacturing method thereof |
JP4540981B2 (en) * | 2003-12-25 | 2010-09-08 | 株式会社荏原製作所 | Plating method |
JP4155218B2 (en) * | 2004-03-30 | 2008-09-24 | 株式会社島津製作所 | Autosampler |
US20050275944A1 (en) * | 2004-06-11 | 2005-12-15 | Wang Jian J | Optical films and methods of making the same |
DE102004021926A1 (en) | 2004-05-04 | 2005-12-01 | Mtu Aero Engines Gmbh | A method of making a coating and anode for use in such a method |
US7309653B2 (en) * | 2005-02-24 | 2007-12-18 | International Business Machines Corporation | Method of forming damascene filament wires and the structure so formed |
US7541213B2 (en) * | 2006-07-21 | 2009-06-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
KR100826784B1 (en) * | 2006-08-03 | 2008-04-30 | 동부일렉트로닉스 주식회사 | Metal wiring formation method of semiconductor device |
US7837841B2 (en) * | 2007-03-15 | 2010-11-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Apparatuses for electrochemical deposition, conductive layer, and fabrication methods thereof |
US8784636B2 (en) * | 2007-12-04 | 2014-07-22 | Ebara Corporation | Plating apparatus and plating method |
DE102008044988A1 (en) * | 2008-08-29 | 2010-04-22 | Advanced Micro Devices, Inc., Sunnyvale | Use of a capping layer in metallization systems of semiconductor devices as CMP and etch stop layer |
WO2010022969A1 (en) * | 2008-08-29 | 2010-03-04 | Advanced Micro Devices, Inc. | Using a cap layer in metallization systems of semiconductor devices as a cmp and etch stop layer |
DE102009036221A1 (en) * | 2009-08-05 | 2011-02-17 | Extrude Hone Gmbh | Method for the electrochemical machining of a workpiece |
CN102412233A (en) * | 2011-05-23 | 2012-04-11 | 上海华力微电子有限公司 | Testing structure capable of effectively testing shallow trench isolation filling capability |
US9416459B2 (en) * | 2011-06-06 | 2016-08-16 | United Microelectronics Corp. | Electrical chemical plating process |
CN103077923B (en) * | 2013-01-14 | 2015-06-17 | 武汉新芯集成电路制造有限公司 | Copper electroplating method capable of avoiding holes |
US20140277392A1 (en) * | 2013-03-14 | 2014-09-18 | Abbott Cardiovascular Systems, Inc. | Electropolishing of alloys containing platinum and other precious metals |
US9618664B2 (en) | 2015-04-15 | 2017-04-11 | Finisar Corporation | Partially etched phase-transforming optical element |
CN106567130A (en) * | 2015-10-10 | 2017-04-19 | 盛美半导体设备(上海)有限公司 | Method for improving roughness of wafers |
US10539723B2 (en) | 2016-10-19 | 2020-01-21 | Finisar Corporation | Phase-transforming optical reflector formed by partial etching or by partial etching with reflow |
US9875958B1 (en) * | 2016-11-09 | 2018-01-23 | International Business Machines Corporation | Trace/via hybrid structure and method of manufacture |
KR101755203B1 (en) * | 2016-11-11 | 2017-07-10 | 일진머티리얼즈 주식회사 | Electrolytic Copper Foil for secondary battery and manufacturing method thereof |
AT519430A1 (en) | 2016-12-09 | 2018-06-15 | Hirtenberger Eng Surfaces Gmbh | ELECTROCHEMICAL PULSE POLISHING |
US10109410B2 (en) | 2017-01-17 | 2018-10-23 | Palo Alto Research Center Incorporated | Out of plane structures and methods for making out of plane structures |
TWI711724B (en) * | 2018-11-30 | 2020-12-01 | 台灣積體電路製造股份有限公司 | Electrochemical plating system, method for performing electrochemical plating process, and method of forming semiconductor substrate |
CN109385651A (en) * | 2018-12-05 | 2019-02-26 | 上海华力集成电路制造有限公司 | The method of the groove of copper filling |
CA3133711A1 (en) | 2019-04-09 | 2020-10-15 | 3DM Biomedical Pty Ltd | Electropolishing method |
US10950519B2 (en) | 2019-05-31 | 2021-03-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit package and method |
EP3754052B1 (en) * | 2019-06-21 | 2025-06-11 | Infineon Technologies AG | Roughening of a metallization layer on a semiconductor wafer |
JP7353121B2 (en) | 2019-10-08 | 2023-09-29 | キヤノン株式会社 | Semiconductor devices and equipment |
JP7594974B2 (en) | 2021-05-20 | 2024-12-05 | Tdk株式会社 | Semiconductor device and manufacturing method thereof |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7244677B2 (en) * | 1998-02-04 | 2007-07-17 | Semitool. Inc. | Method for filling recessed micro-structures with metallization in the production of a microelectronic device |
EP1019954B1 (en) * | 1998-02-04 | 2013-05-15 | Applied Materials, Inc. | Method and apparatus for low-temperature annealing of electroplated copper micro-structures in the production of a microelectronic device |
CA2334015C (en) * | 1998-06-04 | 2008-08-26 | Dsm N.V. | High-strength polyethylene fibres and process for producing the same |
US6395152B1 (en) * | 1998-07-09 | 2002-05-28 | Acm Research, Inc. | Methods and apparatus for electropolishing metal interconnections on semiconductor devices |
US6074544A (en) * | 1998-07-22 | 2000-06-13 | Novellus Systems, Inc. | Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer |
US6793796B2 (en) * | 1998-10-26 | 2004-09-21 | Novellus Systems, Inc. | Electroplating process for avoiding defects in metal features of integrated circuit devices |
US6946065B1 (en) * | 1998-10-26 | 2005-09-20 | Novellus Systems, Inc. | Process for electroplating metal into microscopic recessed features |
US6610190B2 (en) * | 2000-11-03 | 2003-08-26 | Nutool, Inc. | Method and apparatus for electrodeposition of uniform film with minimal edge exclusion on substrate |
EP1335046B1 (en) * | 1999-08-11 | 2004-06-02 | Toyo Boseki Kabushiki Kaisha | A rope comprising high strength polyethylene fibers |
US6491806B1 (en) * | 2000-04-27 | 2002-12-10 | Intel Corporation | Electroplating bath composition |
US6261963B1 (en) * | 2000-07-07 | 2001-07-17 | Advanced Micro Devices, Inc. | Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices |
US6858121B2 (en) * | 2000-08-10 | 2005-02-22 | Nutool, Inc. | Method and apparatus for filling low aspect ratio cavities with conductive material at high rate |
EP1350868B1 (en) * | 2000-12-11 | 2007-06-27 | Toyo Boseki Kabushiki Kaisha | High strength polyethylene fiber |
US6432821B1 (en) * | 2000-12-18 | 2002-08-13 | Intel Corporation | Method of copper electroplating |
US6946066B2 (en) * | 2001-07-20 | 2005-09-20 | Asm Nutool, Inc. | Multi step electrodeposition process for reducing defects and minimizing film thickness |
US6638863B2 (en) * | 2001-04-24 | 2003-10-28 | Acm Research, Inc. | Electropolishing metal layers on wafers having trenches or vias with dummy structures |
JP4389142B2 (en) * | 2001-08-08 | 2009-12-24 | 東洋紡績株式会社 | Method for producing high-strength polyethylene fiber |
-
2003
- 2003-04-11 TW TW092108452A patent/TWI267134B/en active
- 2003-04-11 AU AU2003226367A patent/AU2003226367A1/en not_active Abandoned
- 2003-04-11 EP EP03746750A patent/EP1495161A4/en not_active Withdrawn
- 2003-04-11 JP JP2003585151A patent/JP2005522587A/en active Pending
- 2003-04-11 CA CA002479873A patent/CA2479873A1/en not_active Abandoned
- 2003-04-11 CN CN038081660A patent/CN1685086B/en not_active Expired - Fee Related
- 2003-04-11 US US10/510,656 patent/US20060049056A1/en not_active Abandoned
- 2003-04-11 WO PCT/US2003/011417 patent/WO2003088316A2/en active Application Filing
- 2003-04-11 KR KR10-2004-7016217A patent/KR20040097337A/en not_active Ceased
-
2006
- 2006-04-11 JP JP2006108820A patent/JP2006200043A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10217563B2 (en) | 2013-08-02 | 2019-02-26 | Cyntec Co., Ltd. | Method of manufacturing multi-layer coil and multi-layer coil device |
Also Published As
Publication number | Publication date |
---|---|
US20060049056A1 (en) | 2006-03-09 |
EP1495161A4 (en) | 2006-06-28 |
WO2003088316A2 (en) | 2003-10-23 |
AU2003226367A8 (en) | 2003-10-27 |
WO2003088316A3 (en) | 2003-12-31 |
TW200402781A (en) | 2004-02-16 |
CA2479873A1 (en) | 2003-10-23 |
AU2003226367A1 (en) | 2003-10-27 |
CN1685086A (en) | 2005-10-19 |
KR20040097337A (en) | 2004-11-17 |
EP1495161A2 (en) | 2005-01-12 |
JP2005522587A (en) | 2005-07-28 |
JP2006200043A (en) | 2006-08-03 |
CN1685086B (en) | 2010-10-13 |
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