1248245 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種高良率Si-AlaOsDBR面射型雷射二極體，其結構與 製程的優點為較簡單、具有高的折射率對比、磊晶僅需數層、對元件之光 與電效率良好、可提高附著力及良率，達到高良率製作之一種si_ Al2〇3DBR面射型雷射二極體。 【先前技術】 一般GaAs base 1310nm面射型雷射二極體之反射層製作，大都 φ 採用半導體磊晶製程或磊晶製程完成後再做氧化等兩種。前者之DBR反射 層元王為半導體’尚低折射率對比(high—i〇w in(jex contrast)小，需蠢 晶數十層才能達到所需之反射率；而後者DBR反射層之製作為先磊晶數層 DBR半導體層再經氧化後降低折射率以提高折射率對比。 半導體磊晶製程的QW-VCSEL之全結構製程係為：N+GaAs(100)2° off 的晶片為基片。上面首先用M0CVD設備磊晶GaAs為緩衝層。再磊晶3〇至 40組的下DBR反射層，每一組DBR反射層包括有：（A1GaAs:Si)及 (GaAs.Si) 一層。上面再蟲晶一個 inGaAs iaye;r quantum well 之量子井 結構工作層’次序為GaAs、InGaAs及GaAs。之後，上面再磊晶2〇至3〇 - 組的上臓，每一組臟反射層包括有：（GaAs:Zn)及(AlGaAs:Zn):層。 馨最後磊晶GaAs半導體歐姆接觸層，如圖一所示。此方法咖―VCSEL之全結 構製程都用M0CVD設備磊晶完成。但是由於上DBR反射層完全為半導體， 鬲低折射率對比小，需磊晶數十層才能達到所需之反射率。此方法製程雖 然較簡單，但疋數十層磊晶層對元件之光、電及熱效應都會產生非常不良 的影響。 蠢晶製程完成後再做氧化的QW-VCSEL之全結構製程係為： N+GaAs(100)2° off的晶片為基片。上面首先用M0CVD設備磊晶GaAs為緩 衝層。再磊晶低於1〇組的下DBR反射層，每一 DBR組反射層包括有： AlAs及GaAs 一層。上面再蟲晶一個ingaAs iayer quantum well之量子 井結構工作層，次序為GaAs、InGaAs及GaAs。之後，上面再磊晶低於5 組的上DBR反射層，每一組包括有：aias及GaAs二層。最後蟲晶 5 12482451248245 IX. Description of the Invention: [Technical Field] The present invention relates to a high-yield Si-AlaOsDBR surface-emitting laser diode, which has the advantages of simple structure and high refractive index contrast. The crystal only needs several layers, the light and electric efficiency of the component is good, the adhesion and the yield can be improved, and a si_Al2〇3DBR surface-emitting laser diode manufactured by high yield is obtained. [Prior Art] Generally, a reflective layer of a GaAs base 1310 nm surface-emitting laser diode is used, and most of them are φ by a semiconductor epitaxial process or an epitaxial process. The former DBR reflective layer element is a semiconductor's low refractive index contrast (high-i〇w in (jex contrast) is small, it takes dozens of layers of stupid crystal to achieve the required reflectivity; and the latter DBR reflective layer is made The first epitaxial layer of the DBR semiconductor layer is oxidized to lower the refractive index to improve the refractive index contrast. The full structure process of the QW-VCSEL of the semiconductor epitaxial process is: N + GaAs (100) 2 ° off of the wafer as a substrate First, the M0CVD device is used to lift the GaAs as a buffer layer. The epitaxial 3rd to 40th lower DBR reflective layer is further epitaxially. Each set of DBR reflective layers includes: (A1GaAs:Si) and (GaAs.Si) layers. Repetitive crystals of an inGaAs iaye; r quantum well quantum well structure working layer 'in order of GaAs, InGaAs and GaAs. After that, the upper epitaxial 2 〇 to 3 〇 - group of upper 臓, each set of dirty reflective layer includes : (GaAs: Zn) and (AlGaAs: Zn): layer. The final epitaxial GaAs semiconductor ohmic contact layer, as shown in Figure 1. This method - VCSEL full structure process is completed by M0CVD equipment epitaxy. The upper DBR reflective layer is completely semiconductor, and the low refractive index contrast is small, and it takes several layers of epitaxy. To achieve the required reflectivity. Although the process is simple, the tens of layers of epitaxial layers have a very bad effect on the optical, electrical and thermal effects of the components. QW-VCSEL is oxidized after the stupid process is completed. The full-structure process is: N+GaAs(100) 2° off wafer is the substrate. The top layer of GaAs is used as the buffer layer by M0CVD equipment. The epitaxial layer is lower than the lower DBR reflection layer of the 1〇 group, and each DBR The group of reflective layers includes: a layer of AlAs and GaAs. The upper working layer of the quantum well structure of the inaAs iayer quantum well is in the order of GaAs, InGaAs and GaAs. Thereafter, the upper DBR is lower than the upper DBR reflection layer. Each group includes: aias and GaAs two layers. Finally, worm crystal 5 1248245
GaAs半導體歐姆接觸層。此方法QW-VCSEL之全結構製程先用MOCVD 没備磊晶完成，再進行氧化，如圖二所示。此方法DBR反射層高低折射 率對比增加很多，僅需磊晶少於十層就可達到所需之反射率。但是此種製 程方法較複雜，但DBR反射層對元件之光、電及熱效應較不會產生其不 良的影響，只不過良率低。 【發明内容】 本發明之目的在於使GaAs base之1310nm面射型雷射二極體上DBR 反射層製程簡化、高的折射率對比、磊晶僅需數層、對元件之光及電效率 良好、去除應力及提高附著力。並提高面射型雷射二極體製作良率，以達 到南良率製作。 為了達到上述之目的，本發明做了結構及製程上的一些改良。先做 QW-VCSEL之半結構，製程如下：N+GaAs(100)2° off的晶片厚度350/zm為 基片。上面首先用M0CVD設備磊晶GaAs為緩衝層。再磊晶30至40組下 DBR反射層，每一組DBR反射層包括有：（grading layer AlGaAs:Si)、 (AlGaAs:Si)、（grading layer AlGaAs:Si)及（GaAs:Si)四層。最後，再 磊晶GaAs半導體歐姆接觸層。此qw-VCSEL之半結構製程都用MOCVD設備 磊晶完成。之再，再磊晶AlGaAs層。也是用M0CVD設備磊晶完成。而上 DBR反射層則是用電子束(E-beam)蒸鍍來鍍數組的DBR反射層，每一組 DBR反射層包括有：Si及AI2O3二層，如圖三所示。 如此GaAs base 1310nm面射型雷射二極體之上DBR反射層可使得製 程較簡化、高低折射率對比大、磊晶僅需數層、對元件之光及電效率良好 及提高附著力。另外，也大幅提高面射型雷射二極體製作良率，以達到高 良率製作。 【實施方式】 請參閱圖四、圖五、圖六所示，係為本發明具體實施方式之元件結構 及製程。 本發明之QW-VCSEL全結構元件如下：N^GaAsGOOp0 off的晶片厚度 350//m為基片，係為GaAs基板100。GaAs緩衝層101的晶片厚度係為 200nm。39組的下DBR反射層102(3E18)，每一組DBR反射層包括有： 1248245 (grading layer AlGaAs:Si x=0 to 0·9)、（AlGaAs:Si χ=0·9)、（grading layer AlGaAs:Si x=0.9 to 0)及(GaAs:Si)四層。上面再二層 InGaAs quantum wells 之多重量子井結構工作層103，次序為GaAs、InGaAs、GaAs、InGaAs及 GaAs。再上面為 1 組上 DBR反射層 i〇5(3E18) ·· (GaAs:Zn)、（grading layer AlGaAs:Zn x=0 to 0.9)、（AlGaAs:Zn χ=0·9)及(grading layer AlGaAs:Zn χ=0·9 to 0)四層。最上面為 GaAs (1E19)、AlGaAs χ=0_1 (1E19)二層及 4 組之上 DBR反射層105。每一組包括有：Si及Al2〇3二層。如圖四所示。 QW-VCSEL全結構元件之製程，首先會用M0CVD設備磊晶QW-VCSEL半結構如下：使用：N^GaAsGOO〆 off的晶片厚度350//m為基 片。在上面磊晶GaAs為緩衝層1〇1，其厚度為200nm。再磊晶39組s下 DBR反射層102。上面再蟲晶二個inGaAs layers quantum wells之多重量子 井結構工作層103，次序為GaAs、InGaAs、GaAs、InGaAs及GaAs。之 後，上面再磊晶1組上DBR反射層1〇5。最後磊晶GaAs半導體歐姆接觸 層106及AlGaAs層104。完成之後即為QW-VCSEL半結構。如圖五所 示。 在QW-VCSEL半結構上，再用電子束(E-beam)蒸鍍來鍍4組s之上 DBR反射層105，每一組包括有：別及Al2〇3二層。如圖六所示。 【圖式簡單說明】 囷一係為習之面射型雷射二極體（1310nm)全結構示意圖（半導體磊晶製 程）。 、 圖二係為習之面射型雷射二極體（1310nm)全結構示意圖（半導體磊晶製 程再氧化）。 ％ 圖三係為本發明之面射型雷射二極體（131〇nm)全結構示意圖。 圖四係為本發明之面射型雷射二極體（131〇nm)實施例全結構示意圖。 圖五係為本發明之面射型雷射二極體（131〇nm)實施例半結構示意圖。 圖六係為本發明之電子束蒸鑛4組(si及之上DBR示意圖。 【主要元件符號說明】 100 GaAs 基板 101緩衝層 7 1248245 102下DBR反射層 103多重量子井結構工作層 104 AlGaAs 層 105上DBR反射層 106半導體歐姆接觸層GaAs semiconductor ohmic contact layer. The full structure process of the QW-VCSEL method is first completed by MOCVD without epitaxy, and then oxidized, as shown in Figure 2. In this method, the contrast between the high and low refractive indices of the DBR reflective layer is greatly increased, and only the epitaxial layer needs less than ten layers to achieve the desired reflectance. However, this method of processing is complicated, but the DBR reflective layer does not have a bad influence on the optical, electrical and thermal effects of the component, but the yield is low. SUMMARY OF THE INVENTION The object of the present invention is to simplify the process of DBR reflective layer on a 1310 nm surface-emitting laser diode of GaAs base, high refractive index contrast, only several layers of epitaxy, and good light and electrical efficiency for components. , remove stress and improve adhesion. And improve the production rate of the surface-emitting laser diode to achieve the South yield. In order to achieve the above objects, the present invention has made some improvements in structure and process. The half structure of the QW-VCSEL is first made, and the process is as follows: N+GaAs (100) 2° off wafer thickness 350/zm is the substrate. The top layer of GaAs is first used as a buffer layer by M0CVD equipment. Re-epitaxial 30 to 40 sets of DBR reflective layers, each set of DBR reflective layers including: (grading layer AlGaAs: Si), (AlGaAs: Si), (grading layer AlGaAs: Si) and (GaAs: Si) four layers . Finally, the GaAs semiconductor ohmic contact layer is epitaxially re-etched. The semi-structural process of this qw-VCSEL is completed by epitaxy using MOCVD equipment. Then, the epitaxial AlGaAs layer is re-emitted. It is also completed by epitaxy using M0CVD equipment. The upper DBR reflective layer is an electron beam (E-beam) evaporation plated array of DBR reflective layers, each set of DBR reflective layers including: Si and AI2O3 two layers, as shown in Figure 3. The DBR reflective layer on the GaAs base 1310nm surface-emitting laser diode can make the process simpler, the high-low refractive index contrast is large, the epitaxial layer only needs several layers, the light and electrical efficiency of the component are good, and the adhesion is improved. In addition, the yield of the surface-emitting laser diode is greatly improved to achieve high yield. [Embodiment] Please refer to FIG. 4, FIG. 5, and FIG. 6 for the component structure and process of the specific embodiment of the present invention. The QW-VCSEL full structural component of the present invention is as follows: The wafer thickness of N^GaAsGOOp0 off is 350//m, which is a GaAs substrate 100. The wafer thickness of the GaAs buffer layer 101 is 200 nm. 39 sets of lower DBR reflective layer 102 (3E18), each set of DBR reflective layers including: 1248245 (grading layer AlGaAs: Si x=0 to 0·9), (AlGaAs: Si χ = 0·9), (grading Layer AlGaAs: Si x = 0.9 to 0) and (GaAs: Si) four layers. The second quantum well structure working layer 103 of the InGaAs quantum wells is in the order of GaAs, InGaAs, GaAs, InGaAs, and GaAs. Above, there are 1 set of DBR reflective layers i〇5(3E18) ··(GaAs:Zn), (grading layer AlGaAs:Zn x=0 to 0.9), (AlGaAs:Zn χ=0·9), and (grading layer) AlGaAs: Zn χ = 0·9 to 0) Four layers. The topmost layer is GaAs (1E19), AlGaAs χ = 0_1 (1E19), and four groups of DBR reflective layers 105. Each group includes: Si and Al2〇3 two layers. As shown in Figure 4. The QW-VCSEL full-structure component process begins with the M0CVD device epitaxial QW-VCSEL half-structure as follows: Use: N^GaAsGOO〆 off wafer thickness 350//m for the substrate. The epitaxial GaAs is a buffer layer 1〇1 having a thickness of 200 nm. The DBR reflective layer 102 is further epitaxially grouped 39 s. The multiple quantum well structure working layer 103 of the inGaAs layer quantum wells is in the order of GaAs, InGaAs, GaAs, InGaAs and GaAs. Thereafter, the DBR reflective layer 1〇5 on the epitaxial group 1 is again epitaxially grown. Finally, the epitaxial GaAs semiconductor ohmic contact layer 106 and the AlGaAs layer 104 are epitaxially grown. After completion, it is the QW-VCSEL half structure. As shown in Figure 5. On the QW-VCSEL half structure, electron beam (E-beam) evaporation is used to plate 4 sets of s above DBR reflective layer 105, each group including: Al2〇3 two layers. As shown in Figure 6. [Simple description of the diagram] The 囷 is a schematic diagram of the full structure of the surface-emitting laser diode (1310nm) (semiconductor epitaxial process). Figure 2 is a schematic diagram of the full structure of the surface-emitting laser diode (1310nm) of Xi (semiconductor epitaxial process reoxidation). % Figure 3 is a schematic diagram of the full structure of the surface-emitting laser diode (131〇nm) of the present invention. Figure 4 is a schematic view showing the entire structure of the embodiment of the surface-emitting laser diode (131 〇 nm) of the present invention. Figure 5 is a schematic view showing the half structure of the embodiment of the surface-emitting laser diode (131 〇 nm) of the present invention. Figure 6 is a schematic diagram of the electron beam distillation of the present invention (si and upper DBR). [Main component symbol description] 100 GaAs substrate 101 buffer layer 7 1248245 102 DBR reflective layer 103 multiple quantum well structure working layer 104 AlGaAs layer 105 DBR reflective layer 106 semiconductor ohmic contact layer