TWI242800B - Method of forming single sided conductor and semiconductor device having the same - Google Patents

Abstract

A method of forming a single sided conductor and a semiconductor device having the same is provided. The method includes providing a substrate having an opening. The opening exposes a sidewall and an opening base surface. A single sided silicon layer is formed adjacent to the sidewall in the opening and exposes a portion of the opening base surface. The single sided silicon layer is implanted with fluorine-containing ions. The substrate and the single sided silicon layer are thermally oxidized to form a thermal oxide layer in the opening.

Description

1242800 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a semiconductor process, in particular, θ I implantation and thermal oxidation technology to form a single-sided conductor. That is to say, there is a single-sided conductor. [Prior technology] In the process of manufacturing a semiconductor device, a wall is usually required. For example, a single-sided early-side device is formed in a trench, or a single-sided buried conductor layer is used as a wire. Tie 9 is the size of the isolating element is getting smaller and smaller 'defined by the lithography process υ: 2 :: pattern technology, more and more difficult to control, and more and more incompatible with the second, so why not use the lithography process And the production is smaller than micro; ς 2: The method of the side conductor layer has become a major direction of development. In the early days, it is known that a single-sided buried conductor layer is not required for the lithography process. The single-sided conductor layer is then filled with a dielectric material to fill the sides of the single 'body layer with a dielectric material to achieve the effect of single-sided insulation. However, when the size of the device is getting smaller and smaller, the single-sided conductor layer with a high aspect ratio causes a limit on the filling, and may form a hole in the dielectric layer due to the poor filling, thereby making the effective dielectric capacity of the single-sided dielectric layer. Decreased, affecting the reliability and yield of the single-sided conductor layer. Therefore, providing a method that can achieve a single-sided conductor layer with a resolution smaller than the lithographic resolution without an additional lithography process is really important for the development of semiconductor processes.

4NTC04005TW.ptd No. 6 I 1242800 V. Description of the invention (2) Major issues. [Summary of the Invention] One aspect of the present invention is to provide a method for a single-sided conductive layer ', which does not require an additional lithography step to shape the pattern size of the shadowing technology. Another aspect of the present invention is to provide a method for forming a single-sided conductor layer in a semiconductor, which facilitates the formation of a chemical layer in 2 steps to avoid filling and filling holes of high-implantation accelerated oxygen due to deposition. . In the embodiment that the shellfish soil and the ice are worse than the opening, the present invention provides a formation unit f, which includes a supply-substrate, and the substrate has an opening system; : Fang Guang and-open bottom surface. However, a single-sided silicon layer is formed on the ::: side stone layer adjacent to the side wall and exposes the open bottom surface of the _ part: inside, single-off: inside the single-sided silicon layer, and the thermal oxidation substrate And single-sided silicon acoustic implant: a fluorine-containing thermal oxide layer in the opening. 9 The step of forming a single-sided silicon layer from the method of the present invention includes the inside of the mouth; removing the-part of the stone layer to form a-recess centered on the opening :: '成 成 共 多 a conformal polycrystalline silicon layer on the dielectric layer; A part of the second electrical layer, the spar stone layer, is implanted into the polycrystalline silicon layer on the evening; the implantation is performed for several days ^ I ^ day ^ layer and reserved-unimplanted implanted on the evening silicon layer as a mask To remove the non-implantation

1242800 V. Description of the invention (3) layer and the underlying dielectric layer and silicon layer; and removing the dielectric layer to form a single-sided Shixi layer. In addition, the step of implanting gas ions includes implanting fluoride ions (F spoon or boron fluoride ions (βΙ? 2 +), and the concentration of implanted fluoride ions is about lxlO13 ~ lxlO16 ions / cm2. The implantation condition is one plant The angle of incidence is about 10 to 30. The energy is about 5 to 20 KeV. Another aspect of the present invention is to provide a method for forming a semi-body element having a single-sided conductor layer, such as a trench capacitor, which is based on the above Ion implantation and thermal oxidation technology are integrated into the current process instead of traditional deposition technology. [Embodiment] Ben Schering discloses a method for forming a single semiconductor device, which avoids the side wall of the open side conductor layer due to the deposition of high aspect ratio The description of the dielectric layer is more complete and complete, and you can refer to the drawings. The wicker side conductor layer and the integration of the implantation and thermal oxidation technology with this one-sided conductor layer, the holes caused by Tinan are formed in a single effect Dielectric Capability. In order to make the present invention as described below and cooperate with FIG. 1 to FIG. 6 in a consistent embodiment, the present invention transforms, >, 太 π + a method of forming a single-sided conductor layer, and the present invention Method can be applied Du, you I 4 ^ on the process of any early-side buried conductive strip on a semiconductor 4,000 彳 Η Η σ that requires a single-sided conductor layer, such as the single-sided conductor of a vertical electric solar hemisphere ^ 1, at, t卜 余 # η 丄 々 inch strand layer, but it is not limited to this. Figure 1 shows the example here. The present invention describes a method of forming a single-sided conductor layer.

$ 8 pages 1242800 V. Description of the invention (4) _ method, which is applied to the manufacture of semiconductor components. In this body: ¾ 0. It is found that the substrate 1GG has an H dielectric layer 节点 / cutting node 120 therein and an opening 3M insect is engraved in the hair, and the storage exposes a side wall 102 and an opening bottom surface 1Q4. The bottom surface 104 of the mouth 130 can be the surface 104 of the storage node 120. Only =, 〇 〇 It is obtained by the methods such as pad oxide layer 112 and pad nitride layer U4,1 " electrical layer 110 deposition, etc., as a subsequent dream II. 1J is formed in the substrate 100 using conventional techniques such as processes. Capacitance = A / Traditional product such as emulsification, etc. Ί Storage Valley's storage node 120 sets of capacitors, nitride layers, or a combination of the capacitor dielectric capacitor conductive layer 124, and its use for ^ 1 The layer 12f is, for example, a polycrystalline silicon layer and a soil neck dielectric layer 128. The storage capacity is produced by lithography, tritium, deposition, oxidation, and so on. Here: J: a = one-sided silicon layer is formed by passivation. 4 5 is in the opening, and ^ ΓΛZ102 'is exposed. One / portion of the bottom surface of the opening (i.e., a portion 104 & 'shown in Fig. 5). As shown in FIG. 2, the formation of 1 40 can be said as follows: the idle step includes deposition—the Shi Xi layer 1 40 in the opening 1 30. The Shi Xi layer Λ Λ technology fills the polycrystalline silicon layer of the opening 130. Next, go to n, 0 to form-recess 135. Recess ι35 /: =, engraving technology, chemical mechanical polishing technology, etc. [Deposited as a ς = 15〇 in the recess 135. The material of the dielectric layer 15 and the stone layer 14 or the polycrystalline layer has a better etching selectivity ratio, such as silicon oxide, and the formation method can be determined according to

1242800 V. Description of the invention (5) The design needs to use traditional deposition, etching or chemical mechanical polishing. Next, a conformal polycrystalline stone layer 160 is formed on the dielectric layer 150. For example, chemical vapor deposition technology is used to conformally deposit a substantially polycrystalline silicon layer on the entire substrate 100. As shown in FIG. 3, a part of the conformal polycrystalline layer 160 is ion-implanted to form an implanted polycrystalline layer 162 and an unimplanted polycrystalline layer 164 is retained. Ion implanted conformal polycrystalline silicon layer 160 is an implantation method with an oblique angle. Therefore, according to the barrier of the substrate topography, a part of the conformal polycrystalline silicon layer can be retained without being implanted. Next, using the implanted polycrystalline silicon layer 16 2 as a mask, the non-implanted polycrystalline silicon layer 1 64 and the dielectric layer 150 below it are removed. That is, because the implanted and non-implanted polycrystalline silicon layers 16, 2 and 16 are changed in nature due to the implantation step, they can be selectively removed by an etching process. Furthermore, because the dielectric layer 150 has a selectivity ratio with the implanted polycrystalline silicon layer 16 2, the exposed dielectric layer 150 can be selectively removed (as shown in FIG. 4). ). Referring to FIG. 5, using the unremoved dielectric layer 15 0 as a mask, the implanted polycrystalline silicon layer 16 2 and the unprotected silicon layer 140 are removed. Then, the dielectric layer 150 is removed. In this way, a single-sided silicon layer 1 4 5 is formed, which is adjacent to the side wall 10 2 and exposes a part 1 0 4 a of the surface 104 of the storage node. Next, fluoride-containing ions were implanted in the unilateral stone layer 145. The implanted fluoride ion may include fluoride ion or boron fluoride ion (BF2 +), and the implanted fluorine ion concentration is about 1x10 13 ~ 1x10 16 ions / cm2. In addition, the implantation angle is about 10 to 30 ° and the energy is about 5 to 20 K e V. Then, the substrate 100 and the single-sided silicon layer 1 45 are thermally oxidized to form

4NTC04005TW.ptcl Page 10 1242800 V. Description of the invention (6) A thermal oxide layer 170 is in the recess 135, as shown in FIG. Chemical conversion = = Yes = Included, the taxi process can be integrated into the active area of the existing technology. Thermal Oxygen: Manufacturing: This :: Although the size of the components is getting smaller, it is becoming more difficult to fill the openings with high aspect ratios. By using the technology of implanting fluorine-containing ions and thermal oxidation in the present invention, the problem of holes in the dielectric layer can be improved, and the effective dielectric capacity of the dielectric layer can be improved. In addition, although the present invention is described in detail by using a capacitor having a single-sided conductor layer as an example, other semiconductor elements having a single-sided conductor layer may also be used. The method of the present invention can also be applied. The above is only a preferred implementation of the present invention. The examples are not intended to limit the scope of patent application of the present invention; all other equivalent changes or modifications made without departing from the spirit disclosed by the present invention should be included in the scope of patent application described below.

4NTC04005TW.ptd Page 11 1242800 Brief Description of Drawings [Simplified Description of Drawings] Figures 1-6 are cross-sectional schematic diagrams of semiconductor devices fabricated by using the method of forming a single-sided conductor layer of the present invention. Symbol description of graphic elements 100 Base material 102 Side wall 104 Open bottom surface 104a Open bottom exposed Table 1 110 Pad dielectric layer 112 Pad oxide layer 114 Pad nitride layer 120 Storage node 122 Capacitance dielectric layer 124 Conductor layer 126 Conductive plug 128 Ring neck dielectric layer 130 opening 135 recess 140 silicon layer 145 single-sided silicon layer 150 dielectric layer 160 conformal polycrystalline silicon layer 162 implanted polycrystalline silicon layer 164 non-implanted polycrystalline silicon layer 170 thermal oxide layer

4NTC04005TW.ptcl Page 12

Claims (1)

1242800 VI. Application scope 1. A method for forming a single-sided conductor layer, comprising: providing a substrate having an opening, the opening exposing a sidewall and an opening bottom surface; forming a single-sided silicon layer on In the opening, the single-sided silicon layer is adjacent to the side wall and exposes a part of the bottom surface of the opening; implanting fluorine-containing ions into the single-sided silicon layer; and thermally oxidizing the substrate and the single-sided silicon layer, A thermal oxide layer is formed in the opening. 2. The method according to item 1 of the scope of patent application, wherein the substrate is a silicon substrate. 3. The method according to item 1 of the scope of patent application, wherein the step of forming the single-sided silicon layer includes: _ depositing a silicon layer in the opening; removing a part of the silicon layer to form a recess; Λ deposition A dielectric layer on the recess; forming a conformal polycrystalline silicon layer on the dielectric layer; ion implanting a part of the conformal polycrystalline silicon layer to form an implanted polycrystalline silicon layer and retaining an unimplanted polycrystalline silicon layer; removing the The polycrystalline silicon layer and the dielectric layer underneath are not implanted; the dielectric layer is used as a mask to remove the implanted polycrystalline silicon layer and the silicon layer; and the dielectric layer is removed to form the single-sided silicon layer. 4NTC04005TW.ptcl Page 13 1242800 6. Scope of Patent Application 4. The method described in item 1 of the scope of patent application, wherein the step of implanting fluorine-containing ions includes implanting fluoride ions or fluoride ions (B F 2 +). 5. The method as described in item 4 of the scope of patent application, wherein the fluorine-containing ion concentration is about lxlO13 to lxlO16 ions / cm2. 6. The method as described in claim 1, wherein the step of implanting fluorine-containing ions is performed at an implantation angle of about 10 to 30 °. 7. The method according to item 1 of the scope of patent application, wherein the step of implanting fluorine-containing ions is performed at an energy of about 5 to 20 KeV. 8. —A method of forming a semiconductor element having a single-sided conductor layer, comprising: providing a semiconductor substrate having a pad dielectric layer thereon, a storage node and an opening etched therein, the An opening exposes a side wall and a surface of the storage node; a silicon layer is deposited in the opening; a portion of the silicon layer is removed to form a recess; a dielectric layer is deposited in the recess; t forms a conformal A polycrystalline silicon layer on the dielectric layer; ion implanting a part of the conformal polycrystalline silicon layer to form an implanted polycrystalline silicon layer and retaining an unimplanted polycrystalline silicon layer; using the implanted polycrystalline silicon layer as a mask to remove The unimplanted polycrystalline silicon layer and 4NTC04005TW.ptd Page 14 1242800 VI. Application for a part of the dielectric layer; using the dielectric layer as a mask, removing the implanted polycrystalline stone layer and a part of the stone layer; removing the dielectric layer Implanting fluorine-containing ions into the silicon layer; and thermally oxidizing the semiconductor substrate and the silicon layer to form a thermal oxide layer in the opening. 9. The method according to item 8 of the scope of patent application, wherein the step of implanting fluorine-containing ions includes implanting fluoride ions or boron fluoride ions (BF2 +). + 1 0. The method as described in item 9 of the scope of patent application, wherein the concentration of the fluorine-containing ion is about 1 X1 013 to 1 X1 016 i ons / cm2. 1 1. The method according to claim 8 in the scope of the patent application, wherein the step of implanting fluorine-containing ions is performed at an implantation angle of about 10 to 30 °. β 1 2. The method according to item 8 of the scope of patent application, wherein the step of implanting fluorine-containing ions is performed at an energy of about 5 to 20 KeV. 4NTC04005TW.ptcl Page 15