TWI239590B - Methods of simultaneously fabricating shallow trench isolation structures having varying dimensions and structure thereof - Google Patents

Abstract

Shallow trench isolation structures are simultaneously fabricated such that ones in a cell region have first-type features and others in a periphery region have second-type features. The first-type features can be rounded edges or can be first depths and widths, and the second-type features can be unrounded edges or can be second depths and widths which are different from the first depths and widths. The method includes forming patterned photoresist over a hard mask over portion of a cell and a periphery region, and removing the exposed hard mask layer in the periphery region while removing a portion of the exposed hard mask layer in the cell region. A trench is then partially formed in the periphery region and more of the hard mask layer is removed in the cell region, followed by the trench in the periphery region being deepened while a trench in the cell region is formed.

Description

1239590 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a semiconductor, and in particular, to a method for simultaneously manufacturing a plurality of shallow low trench isolation (STI) structures. So that some selected shallow trench isolation structures have a first type of feature and other selected shallow trench isolation structures have a second type of pattern. [Prior art] Integrated circuits are well known. Integrated circuits are often used to make a wide variety of electronic components such as memory chips. There is a strong desire to reduce the size of integrated circuits in order to increase the density of their individual parts and further improve the functionality of the integrated circuits. For example, there is a strong desire to reduce the size of integrated circuits used to make memory chips. By reducing the size of the integrated circuit, each memory chip can have more capacity and thus more functionality. However, the larger density of semiconductor components due to miniaturization itself results in an increased potential, which is an objectionable electrical interaction between nearby components.讨厌 For example, nasty parasitic inter-device current tends to be emphasized as the density of semiconductor components increases. This parasitic internal element current occurs when carriers such as electrons or holes are shown between adjacent active elements on half the V-body substrate. This type of carrier becomes more apparent as the distance between active components decreases. Therefore, 'in the manufacture of integrated circuits, it is often necessary to isolate semiconductor parts from each other' in order to mitigate this unpleasant electrical interaction.

9907twf1.ptd Page 7 1239590 V. Description of the invention (2) digits. A technique widely used to isolate nearby nietal oxide semi conductor (MOS) circuits includes silicon local oxygen < iocai oxidation of silicon (LOCOS), in which the silicon substrate is not inactive or inactive The field area is exposed to a thermal oxidizing atmosphere, whereby the rear-walled or semi-recessed silicon dioxide (recessed or semi-recessed silicon dioxide) such as field oxide is grown. Silicon dioxide on unshielded areas is usually grown thick enough to reduce any parasitic capacitance that occurs in areas of interest (i n t e r e s t), but not thick enough to cause step coverage problems. Different from the non-active area, the base area made as the active area is covered and protected to facilitate the subsequent formation of active components in the active area. '' However, there is no limit to the application of silicon partial oxidation isolation. For example, the general cognitive limitation is that there is an oxide undergrowth at the edge of the mask, where the growing dioxide is squeezed laterally under the edge of the mask and penetrates into the active area of the substrate . This phenomenon is commonly referred to as "bird's beak (b i r d s s b e a k)" which adversely affects the device's efficacy, reduces the area where active areas can be established, and generates stress in the substrate. 3 Obviously, it provides component isolation. Furthermore, when the oxide grows under the mask, the mask layer is pushed up to form an uneven oxidation defect. To some extent, this uneven oxidation defect stem (stem e) from the thermal oxidation to grow the oxide can be about twice the thickness of the oxide consumed in the thermal oxidation process. The uneven formation of the result may have problems such as conformity and lithography of subsequent layers.

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1239590 5. Description of the invention (3) Recognizing the shortcomings of Shi Xi ’s local oxidation isolation (imp 1 ementati ο η), contemporary complementary metal-oxide-semiconductor (CMOS) structures have increasingly used trenches between active areas , Especially shallow trench isolation structures. The formation of a shallow trench isolation structure usually requires the use of a non-isotropic money engraving process to use a mask to define and pattern a shallow trench on a substrate, and then fill the shallow trench with an insulating material, followed by a step. The insulating material is flattened to define a shallow trench isolation structure. Shallow trench isolation structures can reduce or eliminate the "bird's beak" problem of oxides intruding into active areas, and therefore allow greater operability (〇perabi 1 it Υ) and smaller spacing of isolation elements (Spacing) 〇About shallow The trench isolation structure may, in some cases, want to form different sizes (such as size or shape) at different locations on a substrate. In a memory element, for example, the operating voltage in a peripheral region (P r r p h e r y r e g i ο η) is usually higher than the operating voltage in a cell region. Therefore, it is assumed that the shallow trench isolation structure formed in the peripheral region is deeper and larger than the shallow trench isolation structure formed in the cell region. Shallow trench isolation structures typically include steep sides and corners derived from the trenches used to form trench isolation, such as anisotropic etching. These steep geometries lead to unwanted electrical characteristics' such as "edge conduction" where excessive leakage occurs in the upper part between the top of the isolation trench and an adjacent active area. An active element disposed at a small radius or corner close to an isolation trench may exhibit, for example, a relatively high edge conduction including an unwanted parasitic leakage path. This nasty effect can produce ‘like the unique I-V curve of known active components (see US

9907twfl.ptd Page 9 1239590 V. Description of the Invention (4) Patent No. 6 0 74 9 3 1) Double hump. In addition, the sharp corners of the shallow trench isolation structure (shar p c 〇 r n e r) can also cause difficulty in depositing the trenches with a dielectric filler (f i Π e: r) material during subsequent processes. For example, the sharp corners of the upper opening of the trench can cause pinching-off of the trench opening during dielectric deposition before the trench is completely filled, leaving nasty holes in the trench filling (v 〇 〇 id). As the trend toward miniaturization of components and component density continues, the formation of narrower deep trench isolation structures with larger aspect ratios has become increasingly desirable. However, the problem of hole formation will increase as the aspect ratio of the trench isolation structure increases. For example, when the isolation trench is formed with a large aspect ratio, during the filling of the isolation trench with silicon dioxide, the opening of the isolation trench from the formation of the silicon dioxide under the hill of the trench is narrowed. Proper and complete filling of obstructing trenches has made it increasingly possible to form holes. The rounding of the corners or edges of a shallow trench isolation structure can lead to slowing down at least some of the aforementioned problems with its sharp corners. However, while it may be desirable to round the corners of a shallow trench isolation structure in some cases, it may not be necessary in others. For example, the critical dimension, i.e., the width, of a shallow trench isolation structure in a cell region in a memory element is generally smaller than the critical dimension of the shallow trench isolation structure in a peripheral region. Although it may be necessary to round the corners of the shallow trench isolation structure in the peripheral area of the memory element to slow down the double peaks in its characteristic I-V curve, the shallow trench isolation structure in the cell area is maintained relatively small without being implemented Key dimensions.

9907twf1.ptd Page 10 1239590 V. Description of the invention (5) In this case, the rounding of the corners will force an unacceptable reduction in the critical dimensions of the shallow trench isolation structure in the cell area. Furthermore, as previously mentioned, it is quite difficult to properly fill a shallow trench isolation structure with one of these reduced critical dimensions with an insulating material. Therefore, in this case, it is necessary or desirable to keep the shallow trench isolation structure in the cell area not rounded. However, for the reasons described above, the corners of the shallow trench isolation structure in the peripheral region of the memory element must still be rounded. Therefore, an integrated circuit should be formed so that some shallow trench isolation structures have rounded corners, while the remaining shallow trench isolation structures have non-rounded corners. Of course, using a method other than forming a shallow trench isolation structure without rounded corners to form a shallow trench isolation structure with rounded corners would be inefficient, expensive, and potentially detrimental to yield (y i e 1 d). Therefore, it is conventionally required to have a method for forming shallow trench isolation structures with multiple sizes in related positions on a substrate at the same time, such as the size and shape. [Summary of the Invention] The present invention provides a method for simultaneously manufacturing a plurality of shallow trench isolation structures to meet these needs, so that some selected shallow trench isolation structures have a first-type pattern, and other selected shallow trench isolation structures have Second type pattern. The shallow trench isolation structure having the first type pattern can be disposed in a peripheral area, and the shallow trench isolation structure having the second type pattern can be disposed in a cell area. The first type pattern may include rounded corners and the second type pattern may include non-rounded corners. In another example, the first type pattern may include a depth and width of a first size and the second type pattern may include a depth and width of a second size different from the first size.

9907twf1.ptd Page 11 1239590 V. Description of the Invention (6) The present invention discloses a method for forming a shallow trench isolation structure, wherein the method includes providing a substrate with a cell region and a peripheral region. The substrate is then formed on the substrate. A hard mask layer to cover at least a part of the cell area and at least a part of the peripheral area. Then a patterned photoresist layer is formed on the hard mask layer to expose a part of the hard mask layer in the cell area and to expose A part of the hard mask layer in the peripheral area is implemented. After the absence, a first insect engraving process is performed to remove the hard mask layer exposed by the photoresist layer in the peripheral area and the part of the hard mask layer exposed in the cell area. The mask layer is then subjected to a second engraving process to form a trench in the peripheral area and remove the cell area. After the hard cover layer, a third insect engraving process is performed to deepen the trenches formed in the surrounding area and a trench in the cell area, and then fill the trenches in the peripheral area with an insulating material and fill the cell area. The trench formed partly in the first _ inscription process can have rounded corners and still maintain its rounded corners in the third etching process. In another example, in the surrounding area after the third inscription process The trench has a width and depth greater than the width and depth of the trench in the cell area. According to another disclosure, the present invention discloses a method for forming a trench for a shallow trench isolation structure. A hard mask layer in the peripheral area is deeper than a hard mask layer in a cell area, and then a further worm during the second ik-etching process. The hard mask layer of the cell area and the base of the peripheral area are engraved so as to form a trench in part. Then J, during a third inscription process, the substrate in the cell area is engraved to form a trench in the cell area and the base of the peripheral area. In order to deepen the ditch formed in the peripheral area, in the aspect of the present invention 5

9907twf1.ptd Page 12 1239590 V. Description of the Invention (7) The trenches formed in the process may have rounded corners and maintain their rounded corners in subsequent etching processes. On the other hand, after the third etching process, the trenches in the peripheral region have a width and depth greater than the width and depth of the trenches in the cell region. The present invention discloses a method for forming a trench for a shallow trench isolation structure according to still another object. The method includes etching a hard mask layer in a peripheral area almost to a pad oxide layer and etching a cell area during a first etching process. A hard cover curtain layer instead of a pad oxide layer, and the hard cover curtain layer is partially exposed by the remaining cell area. After that, during a second etching process, the exposed part of the hard mask layer is etched up to the pad oxide layer and the substrate in the peripheral area is etched to form a trench. Then, during a third etching process, the substrate in the cell region is etched to form a trench in the cell region and the substrate in the peripheral region is etched to deepen the trench formed in the peripheral region. The trenches partially formed in the second etching process may have rounded corners and maintain their rounded corners in subsequent etching processes. On the other hand, the etching of the hard mask layer in the peripheral area to the pad oxide layer includes etching through the pad oxide layer to the substrate, and the trenches in the peripheral area have a width and depth greater than the width and depth of the trenches in the cell area. According to other objects, the present invention discloses a shallow trench isolation structure formed by using the method of the present invention. According to another aspect, the present invention includes an integrated circuit formed by the method of the present invention. The present invention further provides a trench isolation structure including a first trench formed in a peripheral region of the substrate. The first trench has a first pattern such as a rounded corner or a large size; and a second trench formed on the substrate. of

9907twfl.ptd Page 13 1239590 V. Description of the invention (8) In a cell area, the second trench has a second-type pattern such as an out-of-round corner or a relatively small size. The present invention further provides a integrated circuit including a substrate and a first trench formed in a peripheral region of the substrate. The first trench has a first pattern such as a rounded corner or a relatively large width and depth; and A second trench is formed in a cell region of the substrate. The second trench has a second pattern such as an unrounded corner or a relatively small width and depth. Although for the sake of grammatica 1 f 1 uidity 'the device and method have been or will be described by a functi ο na 1 explanation, it should be clearly understood that the scope of patent application will not be covered by "tools (tools ( means ") or" steps "is interpreted as necessarily bound to any way (way), but conforms to the scope of patent application under the trial principle of the equivalent (judicia 1 d octrine) The meaning of the definition provided is the full range of equivalents. Any feature or combination of features described herein is included in the features provided by the present invention, and it is obvious from the context, description of the description, and knowledge of those skilled in the art that the combination of the above features is not mutually shielded. . In order to make the above and other objects, features, and advantages of the present invention more comprehensible, preferred embodiments are described below in detail with reference to the accompanying drawings, as follows. [Embodiment] The preferred embodiment of the present invention will be described in detail below, and the accompanying drawings will be taken as examples. Whereas, the same or similar reference signs in the drawings and the description refer to the same or similar

1239590 V. Description of the invention (9) Similar parts. Please note that the figures are simplified and not exact ratios. The descriptions disclosed here are for convenience and clarity only, that is, the terms such as up, down, front, back, left, right, etc. are used to describe the illustrations, not to limit the present invention. Although an embodiment is disclosed herein, this embodiment is only for the purpose of illustration and not for limitation. Although the following description details the examples used for the examples, it can be modified and modified within the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application. It should also be noted that the process steps and structures described herein do not include the fabrication of a complete shallow trench isolation structure. The present invention can be implemented using various existing integrated φ circuit manufacturing techniques, and what is described in the embodiments is only for the purpose of understanding the present invention. The applicability of the present invention extends to general semiconductor devices and processes. However, for illustrative purposes, a method for manufacturing multiple shallow trench isolation structures (sha 1 1 0wtrenchis ο 1 ati ο η, ST I) simultaneously will be described below, so that some selected shallow trench isolation structures have a circular shape Corners (r undundc ner) and other selected shallow trench isolation structures have no rounded corners. According to one aspect, the present invention includes a method for forming a shallow trench isolation structure, wherein the method includes simultaneously forming a relatively small trench or a trench without rounded corners in a cell region of a substrate (ce 1 1 region), and A relatively large lug trench or a rounded trench is formed in a peripheral region of a substrate. According to this aspect, the present invention includes providing a

9907twf1.ptd Page 15 1239590 V. Description of the Invention (ίο) A base of the side area. A hard mask layer is formed on the substrate to cover at least a part of the cell area and at least a part of the peripheral area. Subsequently, a patterned photoresist layer is formed on the hard mask layer. The photoresist layer exposes part of the hard mask layer in the cell area and part of the hard mask layer in the peripheral area. Then, a first etching process is performed to remove the hard mask layer exposed by the photoresist layer in the peripheral region and remove a part of the hard mask layer exposed by the photoresist layer in the cell region. Next, a second etching process is performed to form a trench in the peripheral area and remove the hard mask layer in the cell area. Then, a third etching process is performed to deepen the trench formed in the peripheral region and form a trench in the cell region. The trenches in the surrounding area and the trenches in the cell area are filled with an insulating material, preferably during the same process step. The patterned photoresist layer is preferably removed after the third etching process is performed. The hard cover is best removed after filling the trench with insulating material. A pad oxide layer may be formed on the substrate before the hard mask layer is formed on the substrate. And the pad oxide layer is preferably removed after removing the photoresist layer. The first etching process is preferably performed by removing substantially all of the hard mask layer in the peripheral area exposed by the patterned photoresist layer. The implementation of the second etching process preferably includes removing substantially all of the hard mask layer exposed by the patterned photoresist layer in the cell area. An etching gas in the first etching process preferably includes CF4 / CH2F2 or CF4 / CHF3. An etching gas in the second etching process may include CF4 / CHF3 or HBr / CF4 / Cl2 / He-02. A preferred etching gas for the third etching process includes Cl2 / 02.

9907twf1.ptd Page 16 1239590 V. Description of the invention (11) The trenches in the surrounding area and the trenches in the cell area are preferably filled with the same material. The trenches in the peripheral region and the trenches in the cell region are preferably filled with a dielectric oxide such as silicon dioxide. Those skilled in the art will understand that the remaining dielectric materials can also be used to fill trenches. Referring to a more detailed diagram, FIGS. 1 to 5 depict a preferred embodiment of the present invention, in which a shallow trench isolation structure with rounded corners or edges is isolated from a shallow trench isolation structure with rounded or square corners or edges Formed at the same time. Those skilled in the art will understand that although the structures 19 are shown as angles (c 〇 r n e r) in the figure, in fact these structures are along the edge (e d g e) of the upper side of the trench. Therefore the names of corners and edges can be used interchangeably here. Please refer to FIG. 1. A substrate 11 includes a cell region and a peripheral region are shown in the figure. The substrate 11 may include a silicon substrate such as those commonly used in the fabrication of integrated circuits such as memory devices. The substrate 11 may optionally include any other desired material. A pad oxide layer 12 may be formed on the substrate 11. Those skilled in the art should understand that according to known principles, the pad oxide layer 12 will alleviate the stress caused by the mismatch of the crystalline structure between the substrate 11 and a subsequent hard mask layer 13 provided ( stress) 〇 According to a preferred embodiment of the present invention, the hard cover curtain layer 13 may be formed on the substrate 11, and is preferably formed on the pad oxide layer 12. However, those skilled in the art should understand that the hard cover curtain layer can choose to include multiple materials. The hard mask layer 1 3 in combination with the subsequent photoresist layer 1 4 can provide a mask that determines which part of the substrate is to be etched. Materials are deposited on it or other methods are used according to known principles. machining.

9907twf1.ptd Page 17 1239590 V. Description of the Invention (12) A patterned photoresist layer 14 may be formed on the hard cover curtain layer 13. The patterned photoresist layer 14 has openings 15 and 16 which are patterned here to assist in the similar patterning of the hard cover layer 13 in order to help the name of the underlying material in the following based on known principles. Worm engraving and deposition of materials on it. Those skilled in the art will understand that there are multiple methods for patterning the hard cover curtain layer 13 as well. For example, the hard mask layer 13 can be patterned by laser cutting or ion milling. Some of the openings 15 formed in the photoresist layer 114 may be formed on the cell region of the substrate 11 to facilitate the formation of trenches with unrounded corners. As noted above, trenches with out-of-round corners are sometimes required to maintain their critical dimensions. It is particularly suitable when trenches are formed in an area where semiconductor elements are densely populated, so that the critical dimensions of the trenches must be maintained to avoid physical interference with neighboring semiconductor elements. Some are formed in photoresist The openings 16 in the layer 114 may be formed on the peripheral area of the substrate 11 to facilitate the formation of rounded trenches. As described above, sometimes it is necessary to form a trench with rounded corners in order to reduce the double hump of the unique I-V curve of the adjacent semiconductor device. As shown in FIG. 1, the photoresist layer on the cell region 1 1 4 The opening 15 in the center is slightly smaller than the opening 16 in the photoresist layer 1 1 4 on the peripheral region. Slightly smaller openings 15 contribute to the formation of shallow trench isolation structures with slightly smaller critical dimensions in the cell area, while slightly larger openings 16 facilitate the formation of shallow trenches with slightly larger critical dimensions in the peripheral area Formation of isolation structures.

9907twf1.ptd Page 18 1239590 ____________________ — V. Description of the Invention (13) It is worth noting that in the implementation of the present invention, for example, a wafer has many of these in a chemical vapor deposition (CVD) process. Cell District Cheng and many such peripheral areas exist in close proximity to each other. After that, please refer to FIG. 2 'Implement a first-etching process to partially remove a part of the exposed hard mask layer in the cell area to form a engraved part 17 and substantially remove all exposed parts in the surrounding area. The hard cover curtain layer 13 forms an etched portion 18 there. Therefore, the hard mask layer 13 in the peripheral region is preferably etched to the pad oxide layer 12. Those skilled in the art should understand that there are several methods (me t h 〇 d ο 1 〇 g y) can help this material to a selected depth. For example, the hard mask layer 13 in the cell region may be processed to be thicker than the hard mask layer 13 in the peripheral region or more resistant to etching than the hard mask layer 13 in the peripheral region. ) 〇 During the etching process, there will be etching micro-loading effect in different key dimensions. General hard cover curtain opening techniques will attempt to reduce these effects with low polymer (10w pom ymer) gas (such as CF4, CF4 / 〇2). From the viewpoint of the present invention, a high polymer gas (such as CHF3, CH2F2) can be added to selectively enhance the etching microload effect. Using this method, a larger hard mask layer can be achieved in the cell area while the hard mask layer in the peripheral area is all engraved. An etching gas in the first etching process preferably includes cf4 / ch2f2 or CF4 / CHF3. The ratio of CF4 to CD is preferably about 2 to about 5. The ratio of CF4 #CHF is preferably about 3 to about 5. Those familiar with the technology should understand the other 3

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Page 19 1239590 V. Description of the invention (14) Etching gas and other ratios are also suitable. Then, referring to FIG. 3, a second etching process is performed to remove the hard mask layer remaining in the cell area and select to form a trench in the cell area. Any trench that starts in the cell area usually has square or non-rounded corners. At the same time, the second etching process begins with the formation of a trench in the peripheral area so that the trench in the peripheral area has a rounded top corner 19. The fillet of the trench formed in the peripheral region may have a radius between about 30 nm and about 60 ηm during the second etching process, and preferably a radius of about 60 nm. To round the corners in the surrounding area, a gas such as CF4 / CHF3 is used to form a heavy polymer (heavy ρ ο 1 y m r) near the side wall of the trench to start forming the trench. With the deposition of sidewall polymer, the top rounding can naturally occur. Preferably, after the second etching process, the etched area 17 in the cell area extends through the pad oxide layer 12 and the etched area 18 in the peripheral area substantially extends into the substrate 11. An etching gas of the second etching process preferably includes CF4 / CHF3. The ratio of CF4 to CHF3 is preferably about 4 to about 6. Those skilled in the art will understand that other gases and other ratios are equally suitable. Next, referring to FIG. 4, a third etching process is performed to form a trench 17 in the substrate 11 in the cell region and complete a trench 18 in the substrate 11 in the peripheral region. The corners of the trenches 17 in the cell area remain substantially square or non-circular, while the corners of the trenches 18 in the peripheral area remain substantially round. The fillet of the trench formed in the peripheral region may be formed during the third etching process.

9907twf1.ptd Page 20 1239590 V. Description of the invention (15) There is a radius between about 30 nm and about 60 nm, and preferably a radius of about 60 nm. In the illustrated embodiment, trenches in the peripheral region and trenches in the cell region may be formed to have approximately the same depth. However, the trenches in the peripheral region and the trenches in the cell region may be selected to have different depths from each other ', for example, FIGS. 6 to 9 as examples later. The first gas of the third process is preferably Cl2 / 02. The ratio of Cl2 to 02 is preferably about 6 to about 12, and the etching gas plasma may contain 60 to 120 sccm of Cl2 and 5 to 12 sccm of 02. Those skilled in the art will understand that other etching gases are equally suitable. Subsequently, referring to FIG. 5, the photoresist layer 14 is removed and an insulating material 21, 22 such as silicon dioxide is deposited in the trenches 17, 18 to form a shallow trench isolation structure. After the insulating materials 2 1, 2 2 are deposited in the trenches 17 and 18, the hard mask layer 13 and the pad oxide layer 12 are preferably removed. Shallow trench isolation structures in the cell area have essentially square or non-rounded corners in order to maintain their critical dimensions (because, for example, rounded corners tend to improperly invade adjacent active components). The shallow trench isolation structure in the peripheral area substantially has rounded corners 19 to slow down the double peaks of the characteristic I-V curve adjacent to the active element. The shallow trench isolation structure with square corners in the cell area and the shallow trench isolation structure with rounded corners in the peripheral area can be formed at the same time, in order to reduce the additional process steps of undesirably reducing the yield (yie 1 d) and the tendency to increase costs. Demand. Please refer to FIGS. 6-9, which illustrate another preferred implementation of the present invention.

9907twfl.ptd Page 21 1239590 V. Description of Invention (16) For example, a shallow trench isolation structure having a first type pattern of a first size and a shallow trench isolation structure having a second type pattern of a second size are simultaneously formed. And the second size is smaller than the first size. In FIG. 6, a cross-sectional view of a substrate 11 includes a cell region and a peripheral region as shown in the figure, a pad oxide layer 12 formed on the substrate 11, and a hard mask curtain layer 13 preferably of silicon nitride. With a patterned photoresist layer 14. In the illustrated embodiment, a portion of the hard mask layer 13 exposed in the structure contiguous cell area of FIG. 6 consistent with the structure of FIG. 1 is removed by a first etching process to form an etched portion 17. And substantially all of the hard mask layer 13 and pad oxide layer 12 exposed in the peripheral area are removed to form an etched portion 18. Therefore, it is preferable to be etched to the substrate 11 in the peripheral region. The etching gas of the first etching process preferably includes CF4 / CH2F2 or CF4 / CHF3. The ratio of CF4 to CH2F2 is preferably about 2 to about 5. The ratio of CF4 to (: 1 ^ 3 is preferably from about 3 to about 5. Those skilled in the art should understand that other etching gases are also suitable for other ratios. The slightly smaller opening of the etching site 17 helps the cell The formation of a shallow trench isolation structure with one of the key critical dimensions in the area, and the slightly larger opening of the etched area 18 helps to form a shallow trench isolation structure with a slightly larger critical dimension in the surrounding area. As shown in the following discussion, the shallow trench isolation structure in the peripheral area will be formed deeper and larger than the shallow trench isolation structure in the cell area, so that the shallow trench isolation structure in the peripheral area can effectively suppress leakage current, for example. At the same time, according to one aspect of the present invention, the shallow trench isolation structure in the cell region will be formed to maintain a relatively small optimal integration enhancement.

1239590 5. Description of the invention (17), please refer to FIG. 7 to perform a first etching process to remove the hard mask layer exposed in the cell area and choose to start a trench in the cell area. The second etching process also begins to form a trench in the surrounding area. Preferably, after the second etching process, the etched area 17 in the cell area extends through the pad oxide layer 12 and the etched area 18 in the peripheral area substantially extends into the substrate 11. In the second etching process, the etch rate (e t c h i n g r a t e) of the hard mask layer 13 is smaller than the money etch rate of the substrate 11. Therefore, the etching selection ratio between the substrate 11 and the hard mask layer 13 is selected accordingly. In a preferred example, the etching selection ratio between the substrate 11 and the hard mask layer 13 is selected to be greater than 5 (substrate to hard mask layer), and the second etching process is an etching recipe (recipe) including Η B r / C F4 / C 12 / H e-02. Those skilled in the art will understand that other etching gases are equally suitable. Next, referring to FIG. 8, a third etching process is performed to form a trench 17 in the substrate 11 in the cell region and complete the trench 18 in the substrate 11 in the peripheral region. In the illustrated embodiment, the trench 18 in the peripheral region is wider than the trench 17 in the cell region and / or deeper than the trench 17 in the cell region. As currently implemented, the trench 18 in the surrounding area is about 100 angstroms deeper than the trench 17 in the cell area. In one example, the trench 17 in the cell region has a depth of about 2000 angstroms, and the trench 18 in the peripheral region has a depth of about 3,000 angstroms. An etching gas in the third etching process preferably includes Cl2 / 02. The ratio of Cl2 to 02 is preferably from about 6 to about 12 and the etching gas plasma may include C 12 of 60 to 1 2 0 s c c m and 0 2 of 5 to 1 2 s c c m. Those skilled in the art will understand that other etching gases are equally suitable.

9907twfl.ptd Page 23 1239590 V. Description of the invention (18) Then, referring to Figure 9, remove the photoresist layer 14 and deposit a thermal insulation material 21, 22 such as silicon dioxide 4 silicon dioxide In the trenches 17, 18 so as to form a shallow trench isolation structure. The second trench in the area forming a shallow trench isolation structure remains wider and deeper than the first trench also used to form a shallow trench isolation structure. After the insulating materials 2 1, 2 2 are deposited in the trenches 17 and 18, the hard mask layer 13 and the unnecessary pad oxide layer 12 are preferably removed. Rounding the corners of the shallow trench isolation structure can be achieved by a subsequent thermal process. In view of the foregoing, those skilled in the art should understand that the method of the present invention can help to form shallow trench isolation structures with different sizes at different locations on a substrate. The above embodiments have been provided as examples, and the present invention is not limited to these examples. Anyone skilled in this art can make various modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application.

9907twf1.ptd Page 24 1239590 Brief Description of Drawings Figure 1 is a cross-sectional view of a substrate in accordance with one of the preferred embodiments of the present invention. An oxide layer, a hard mask layer and a photoresist layer are formed on the substrate. On its cell and surrounding area. FIG. 2 is a cross-sectional view of the removal of a part of the hard cover curtain layer exposed in the structure contiguous cell area of FIG. 1 and the removal of all the hard cover curtain layers exposed in the peripheral area. Figure 3 is a cross-sectional view showing the removal of the hard mask layer and the pad oxide layer remaining in the cell area, and the beginning of the formation of a trench in the substrate exposed in the surrounding area, where the trench has a circle angle. Fig. 4 is a sectional view showing the formation of a trench in the base of the cell region and the completion of the formation of a trench in the base of the peripheral region. Figure 5 is a cross-sectional view showing that the trenches in the cell area in Figure 4 and the trenches in the surrounding area are filled with an insulating material. FIG. 6 is a cross-sectional view of the removal of a part of the hard cover curtain layer exposed in the structural continuum region of FIG. 1 and the removal of all hard cover curtain layers and pad oxidation layers exposed in the peripheral area. Fig. 7 is a cross-sectional view showing the removal of the hard mask layer and the pad oxide layer remaining in the cell area, and the beginning of the formation of a trench in the substrate exposed in the peripheral area. Fig. 8 is a sectional view showing the formation of a trench in the base of the cell region and the completion of the formation of a trench in the base of the peripheral region. Figure 9 is a cross-sectional view showing that the trenches in the cell area of Figure 8 and the trenches in the surrounding area are filled with an insulating material. [Schematic description]

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Claims (1)

1239590 VI. Scope of patent application 1. A method for forming a shallow trench isolation structure, comprising: providing a substrate having a cell region and a peripheral region; forming a hard mask layer on the substrate to cover at least part of the cell A patterned photoresist layer is formed on the hard mask layer, and the patterned photoresist layer exposes a part of the hard mask layer in the cell area and the peripheral area. Part of the hard mask layer; performing a first etching process to remove all the hard mask layer in the peripheral area exposed by the patterned photoresist layer and removing the cell area exposed by the patterned photoresist layer A part of the hard mask layer is performed; a second etching process is performed to form a trench in the peripheral region and the hard mask layer is removed from the cell region; a third etching process is performed to deepen the Forming the trench in the peripheral region and forming a trench in the cell region; and filling the trench in the peripheral region with an insulating material and filling the cell in the cell region Ditches. 2. The method according to item 1 of the scope of patent application, wherein: the second etching process partially forms the trench with rounded corners in the peripheral region; and the third etching process maintains the trench formed in the peripheral region while deepening Its rounded corners. 3. The method according to item 1 of the scope of patent application, further comprising: removing the patterned photoresist layer after performing the third etching process; and 9907twf1.ptd Page 27 1239590 6. Scope of patent application After the trench is filled with the insulation material, the hard cover curtain layer is removed. 4. The method according to item 1 of the scope of patent application, further comprising forming an oxide layer on the substrate before forming the hard mask curtain layer on the substrate. 5. The method according to item 1 of the scope of patent application, wherein: the method further comprises forming a pad oxide layer on the substrate before forming the hard mask layer on the substrate; the first etching process removes the periphery All of the pad oxide layers in the region exposed by the patterned photoresist layer; and the trench in the peripheral region has a depth greater than a depth of the trench in the cell region. 6. The method according to item 5 of the scope of patent application, wherein the trench in the peripheral region has a width larger than one of the trenches in the cell region. 7. The method according to item 1 of the scope of patent application, wherein: performing the second etching process includes using an etching gas having a selection ratio greater than 5 between the substrate and the hard mask layer; and The trench in the peripheral region after the third etching process has a depth greater than a depth of the trench in the cell region. 8. The method according to item 1 of the patent application scope, wherein the hard mask layer comprises a nitride layer. 9. The method according to item 1 of the scope of patent application, wherein the corner of the trench formed in the cell area is not round. 10. The method according to item 1 of the scope of patent application, wherein: an etching gas of the first etching process includes 0? 4 / (:} 12? 2 and 0? 4 / (:} ^ 3 9907twfl.ptd Page 28 1239590 6. One of the scope of patent application; an etching gas of the second etching process includes Η B r / C F4 / C 12 / He -02; and after the third etching process, The trench in the peripheral region has a depth greater than a depth of the trench in the cell region. 1 1. The method according to item 1 of the scope of patent application, wherein: an etching gas of the first etching process includes one of CF4 / CH2F2 and CF4 / CHF3; and an etching gas of the second etching process includes CF4 / CHF3. 1 2. The method according to item 1 of the scope of patent application, wherein an etching gas of the third etching process includes Cl2 / 02. 1 3. The method as described in item 1 of the patent application scope, wherein filling the trench in the peripheral region and filling the trench in the cell region includes filling the peripheral region with an oxide during a single process step The trench in and the trench in the cell area. 1 4. A shallow trench isolation structure formed using the method described in item 1 of the scope of patent application, wherein after the third etching process, the trench in the peripheral region has a depth greater than that of the trench in the cell region. A depth. 1 5. The method according to item 1 of the scope of patent application, wherein the fillet of the trench formed in the peripheral region has a half diameter between 30 nm and 60 nm. 16. The method according to item 1 of the scope of patent application, wherein the fillet of the trench formed in the peripheral region has a radius of 60 nm. 9907twf1.ptd Page 29 1239590 6. The scope of patent application is 1. The method described in item 1 of the scope of patent application, wherein the trench in the peripheral area and the trench in the cell area are formed to have different depth. 1 8. A method of forming a trench for a shallow trench isolation structure, comprising: during a first etching process, etching a hard mask layer in a peripheral area deeper than a hard mask layer in a cell area; and During a second etching process, the hard mask layer of the cell region and the substrate of the peripheral region are further etched so as to partially form a trench; and during a third etching process, the substrate in the cell region is etched to A trench is formed in the cell region, and the base of the peripheral region is carved to deepen the trench formed in the peripheral region. 19. The method according to item 18 of the scope of patent application, wherein the partially formed trench system portion is formed with rounded corners. 20. The method according to item 18 of the scope of patent application, wherein the trench in the peripheral region is formed deeper than the trench in the cell region. 2 1. A method for forming a trench for a shallow trench isolation structure, including: during a first etching process, etching a hard mask layer in a peripheral area until a oxide layer and a cell area A hard mask layer instead of a pad oxide layer, so that a part of the cell area is exposed to the hard mask layer; during a second etching process, a part of the cell area is exposed to be exposed 9907twf1.ptd Page 30 1239590 VI. The patent application covers the hard mask layer up to the pad oxide layer and the substrate that etches the peripheral area to form a trench, and etch the cell area during a third etching process In the substrate, a trench is formed in the cell region and the substrate in the peripheral region is etched to deepen the trench formed in the peripheral region. 2 2. A shallow trench isolation structure formed using the method described in Item 20 of the scope of patent application, wherein the trench in the peripheral region has rounded corners and the trench in the cell region does not. 2 3. A kind of integrated circuit having a shallow trench isolation structure on a substrate, the shallow trench isolation structure is formed by the method described in the scope of patent application No. 21, wherein the peripheral area of the The trench has rounded corners and is deeper than the trench in the cell region, and wherein the trench in the cell region has an angle that is not as round as the corner of the trench in the peripheral region. 2 4. A shallow trench isolation structure comprising: a first trench formed in a peripheral region of a substrate, the first trench having a first pattern; and a second trench formed in a cell region of the substrate The second trench has a second pattern. 25. The shallow trench isolation structure as described in item 24 of the scope of patent application, wherein the first pattern is a rounded corner and the second pattern is a non-rounded corner. 26. The shallow trench isolation structure according to item 24 of the scope of patent application, wherein: the first pattern has a first size; the second pattern has a second size; and 9907twf1.ptd Page 31 1239590 9907twfl.ptd Page 32