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TWI233198B - Chip-type sensor against ESD and stress damages and contamination interference - Google Patents

Chip-type sensor against ESD and stress damages and contamination interference Download PDF

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Publication number
TWI233198B
TWI233198B TW93110603A TW93110603A TWI233198B TW I233198 B TWI233198 B TW I233198B TW 93110603 A TW93110603 A TW 93110603A TW 93110603 A TW93110603 A TW 93110603A TW I233198 B TWI233198 B TW I233198B
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layer
stress
scope
patent application
interference
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TW93110603A
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TW200536096A (en
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Bruce C S Chou
Wallace Y W Cheng
Chen-Chih Fan
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Lightuning Tech Inc
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Abstract

A chip-type sensor against ESD and stress damages and contamination interference includes a substrate structure and a protection layer covering over the substrate structure. The protection layer includes, from bottom to top, a first layer for providing a first stress against the substrate structure, a second layer for providing a second stress against the substrate structure, and a third layer for providing a third stress against the substrate structure. The first stress and the third stress belong to one of a tensile stress and a compressive stress, and the second stress belongs to the other of the tensile and compressive stresses.

Description

1233198 五、發明說明α) 【發明所屬之技術領域】 本發明係關於一種可抗靜電與應力破壞及防 之晶片式感測器’特別是關於一種晶片式指紋感判哭且^ 一表面保濩層結構的設計,藉以提供破二有 干擾效應,本發明=二渡 〇911〇68〇6 ’申請日為2〇〇2年4月3曰,發明名稱為= 指紋讀取晶片」’暫准專利令;⑴中華民 = 號__0,中請日為2⑽3年5月6日,發明名稱為明 靜電破壞及防殘干擾之電容式指紋感測器及其製造方几 紋感測器及其處Ϊ二“ J、防:/紋殘/之電容式指 0 92 1 32 480,申性日/9」,()中華民國專利申請案序號 裝置的表面處理\為20 03年11月20日’發明名稱為「晶片 里方法及使用該方法所形成之晶片裝置」。 【先前技術】 在半導體勢# ^ 考慮晶片所提^二項域所提供的晶片製造方式中’通常需 隱藏於封裝Λ髀的電特性,並且需將晶片透過封裝的程序 可能的破::’中,以免除例如壓力及靜電等外力的任何· 然而隨著晶 露部份之晶片 應用領域的發展’新的應用使得必須裸 需要提供一與於環境中,例如晶片式的指紋感測器便 / ^曰接觸的晶片表面(中華民國專利申請宰1233198 V. Description of the invention α) [Technical field to which the invention belongs] The present invention relates to a wafer-type sensor capable of resisting static electricity and stress damage and prevention, particularly to a wafer-type fingerprint sensor and a surface protection. The layer structure is designed to provide a disruptive effect. The present invention = Erdu 〇911〇68〇 'The application date is April 3, 2002. The name of the invention is = fingerprint reader chip.' Patent order; ⑴ 中 民 = No. __0, the date of China is May 6, 2003; the invention name is a capacitive fingerprint sensor that is clear of electrostatic damage and anti-residual interference, and its manufacture. Department II "J, Anti- / Residual / Capacitance means 0 92 1 32 480, application date / 9", () Surface treatment of the Republic of China patent application serial number device \ is 20 November 20, 2003 'The name of the invention is "a method in a wafer and a wafer device formed using the method." [Prior art] In the semiconductor manufacturing method provided by the semiconductor potential # ^ binomial domain provided by the wafer, 'the electrical characteristics of the package usually need to be hidden in the package, and the chip may be broken through the packaging process ::' In order to avoid any external force such as pressure and static electricity, etc. However, with the development of the chip application field of the exposed part, the new application makes it necessary to provide an environment-friendly, such as a chip-type fingerprint sensor. / ^ Said wafer surface in contact (ROC patent application

第7頁 1233198 五、發明說明(2) 序號091106806,申請日為?隹/1 容式指紋讀取晶片」暫為隹了利年二月3日,發明名稱為「電 路,作為身份識別使用專利中),以讀取手指的紋 一射片表面的機械特性便必須被加以考量以提供 測曰片】:ί :t T f破壞的結構。又例如電容式指紋感 、J曰日片更而要考慮汷留指紋效應的問題。 砂上’電容式指紋感測晶片的基礎結構為在- 2 =測及控制處理電路,在晶片的表面佈 包含22板作為感測電極(從此感測電極以下 並且形成-介二料統稱為基板結構卜 介電質以及晶片裸露於外:以外Κ ’丨兼,感測電容 ^ m ^ ^ ^ ^ r的保屢層。為達到上述晶片表面 作為,外矣t、性」習知技術都是利用一堅硬的介電材料 03/ 0 98 54 1 )广的汰保護奎層,例如世界專利W〇 〇1/〇 644 8A1、W〇 = /〇m41A1、美國專利第6G91()82、歐洲專利 = 6:9、美國專利第6 1 1 4 8 62號及美國專利第 二都揭露了此一架構。簡而言之,習知技術的 Γ例如氮化石夕、碳化石夕、氧化銘或鑽石之-堅硬 的介電材料,例如氧切 #或在-者之間存留-柔軟 铁材^匕石夕、碳化石夕、氧化銘或鑽石之堅硬材料層雖 質的強度特性良好,但是在半導體製程中製= 等到厚度的限制,其原因乃為該 {种層與基板構間的熱殘餘應力所導致。g常氮化Page 7 1233198 V. Description of the invention (2) Serial number 091106806, what is the date of application?隹 / 1 Capacitive fingerprint reading chip "is temporarily February 3, and the invention name is" Circuit, which is used in identity recognition patents. "In order to read the mechanical characteristics of the surface of the finger, the pattern of the finger must be read. Considered to provide the test film]: ί: t T f Destroyed structure. For example, capacitive fingerprint sense, J film and more, the problem of fingerprint retention must be considered. On the sand 'capacitive fingerprint sensor chip' The basic structure is at-2 = measurement and control processing circuit. The surface of the wafer contains 22 plates as the sensing electrodes (from below the sensing electrode and formed-the dielectric material is collectively referred to as the substrate structure, the dielectric, and the wafer is exposed. : In addition to κ ′ 丨, the sensing capacitor ^ m ^ ^ ^ ^ r is a recurrence layer. In order to achieve the above-mentioned surface of the wafer, the conventional techniques such as “t, t” and “sex” all use a hard dielectric material 03/0 98 54 1) Wide protection layer, for example, world patents WO1 / 1/644 8A1, WO = / 〇m41A1, US patent No. 6G91 () 82, European patent = 6: 9, US patent No. 6 1 No. 1 4 8 62 and the second U.S. patent disclose this structure. In short, conventional techniques such as nitrides, carbides, oxides, or diamonds—hard dielectric materials, such as oxygen-cutting # or between-the-save-soft iron ^ dagger stone Although the hard material layer of carbon fiber, oxidized diamond or diamond is good in strength, it is produced in the semiconductor process until the thickness is limited. The reason is caused by the thermal residual stress between the {layer and the substrate structure. . g often nitriding

1233198 五、發明說明(3) 夕 厌化石夕、氧化銘或鑽石會對以石夕美好氣 構造成張應力彳t ^ 土 為 的該基板結1233198 V. Description of the invention (3) Xi Anoxic fossil, oxidized inscriptions or diamonds will form a tensile stress 彳 t ^ t

Itensiie stress) #廡,上田 該等材料於該美柘έ士椹μ △门應如果沈積太厚的 基板結構上,會因應力而導致破列,, 來’不僅晶片$易受力破;員,也盔法 $ ’如此- 在f導體製程中僅能提供厚度小於2微米又的/朴破壞。通常 問題。雖然如此,仍妙存 士/、、、乍以避免上述 令易產生材料缺陷,造成應力集中:於其中, 成破壞。為此,解氺埶焱防處士 田的施力都可能造 (枝械強度與厚度的三次方成正比),便成―會亚f度 除了上述晶片表面耐壓等機械 課題。 -,課題。解決靜電破壞可以分兩方卜向;:破壞是另 式疋增加保護層的厚度,因為可以承受的靜雷 種方 =度平方成正比,例如一般商用的積體電:強J係 度(其材料通常為氧切及氮;’其保 …構),可以承受的靜電破壞電壓(air㈣“)的雙層 又因為上述發明的保護層結構無法有效增加A户声為1 KV, 上述發明無法僅利用保護層材料達到靜電破壞=ς,故而 、為此,另一種方式是利用裸露金屬網狀結構 ^。 導通至接地狀態,例如上述發明w〇 ⑽、w諍電荷 0 3/0 98 54 1 Α1、歐洲專利ΕΡ 1 25 68 9 9都有採用此一方〇 種金屬導通靜電的概念在許多的電子產品都有採用法,此 同者在於於晶片表面實施時需要考慮與積體電路L唯不 及材料的匹配性。 ^ ^流程 例如,世界專利WO 0 1 / 0 644 8A1揭露了裸露今s 兔屬網狀結Itensiie stress) # 庑, Ueda and other materials in the United States 柘 μ △ door should be deposited on a substrate structure that is too thick, it will cause breakage due to stress. Also, the helmet method $ 'is so-in the f-conductor process, only the thickness of less than 2 microns can be provided. Usually the problem. Nonetheless, it is still a good idea to avoid material defects caused by the above-mentioned orders and cause stress concentration: in them, damage. For this reason, the force exerted by the anti-defense officer Tian may be caused (the strength of the branches is proportional to the cubic power of the thickness), and it will become a degree of f. In addition to the above-mentioned mechanical problems such as the surface pressure of the wafer. -, Subject. Solving electrostatic damage can be divided into two directions: damage is another way to increase the thickness of the protective layer, because the type of static lightning that can withstand is proportional to the square of the degree, for example, general commercial integrated power: strong J series degree (which The material is usually oxygen cut and nitrogen; its protective structure), the double layer that can withstand the electrostatic destruction voltage (air㈣ "), and because the protective layer structure of the above invention cannot effectively increase the sound of A household to 1 KV, the above invention cannot only Using the protective layer material to achieve electrostatic destruction = ς, so, for this, another way is to use an exposed metal mesh structure ^. Conduction to the ground state, such as the above invention w〇⑽, w 诤 charge 0 3/0 98 54 1 Α1 The European patent EP 1 25 68 9 9 has adopted the concept of this kind of metal conducting static electricity. Many electronic products have adopted the method. The same lies in the fact that the implementation of the chip surface needs to consider that the integrated circuit L is inferior to the material. ^^^ For example, the process of the world patent WO 0 1/0 644 8A1 reveals the exposed sylvestris reticulate knot

1233198 五、發明說明(4) 構作為靜電導通結構,然而所使用的製造流程中所採用之 例如單層T i N作為金屬感測電極及裸露金屬網狀結構並不是 積體電路製程所採用的標準方法,且晶片的不平坦度也容 易造成TiN薄膜導線的斷線問題,再者TiN阻質相當大,若 有瞬間的靜電大電流通過則容易燒斷。此外,世界專利w〇 0 3/0 98 54 1 A1亦揭露一種幾乎相同的裸露金屬網狀結構作為 靜電導通結構。主要差別僅在於所裸露的金屬最外表面包 含了金材料,這樣的設計可以解決金屬的腐蝕問題。然而 這種製造流程,卻無法相容於矽積體電路製程中,因 材料會導致污染。 ^洲專利EP 1 2 5689 9號揭露一種鶴金屬網設計。然而 b積及後續的回#步驟中’感測器表面的碳化石夕 等問i m多/孔洞而造成缺陷,並會導致應力集中 .片田手指指曱不小心衝擊感測器之外表面時,备造 形成親水# u A者U孔洞的結構會使保護層表面 而質=當:指的水分接觸外表面時會擴散,進 、只的化學機械研磨(CMP)製程而久後 而達到平黎沾从主丈 竹乳化石夕填滿則述的小孔洞 雜,str表面。然而,此舉又使製造過程太過複 又於一般商業晶圓代工廠的製造程序。 保護層材:til:;: 電容式指紋感測晶片時, 避免手指的油及;θ 查為親水或親油特性)無法 形成殘留少德/ 7 ?召,使得手指指紋殘留於晶片表面 成殘〜像,影響後續使用,甚至可以藉此攻擊系統:1233198 V. Description of the invention (4) The structure is used as an electrostatic conduction structure, but the manufacturing process used, for example, a single layer of T i N as the metal sensing electrode and the exposed metal mesh structure is not used in the integrated circuit manufacturing process. The standard method, and the unevenness of the wafer can easily cause the disconnection of the TiN thin film wire. In addition, the resistance of TiN is quite large, and it is easy to burn if there is an instantaneous large static current. In addition, the world patent WO 03/0 98 54 1 A1 also discloses an almost identical bare metal mesh structure as an electrostatic conduction structure. The main difference is only that the outermost surface of the exposed metal contains gold material. This design can solve the problem of metal corrosion. However, this manufacturing process is not compatible with silicon integrated circuit manufacturing processes, because materials can cause contamination. ^ Zhou patent EP 1 2 5689 9 discloses a crane metal mesh design. However, in the subsequent steps, the carbon carbide on the surface of the sensor will cause defects / holes and cause stress concentration. When Katata ’s fingers accidentally hit the outer surface of the sensor, The formation of a hydrophilic #u A U hole structure will make the surface of the protective layer qualitative = when: the moisture of the finger will diffuse when it contacts the outer surface, and the chemical mechanical polishing (CMP) process will only reach Ping Li after a long time. Filled with the small holes and str, the surface of stratum filled with bamboo emulsified stone. However, this made the manufacturing process too complicated and the manufacturing process of a general commercial foundry. Protective layer material: til:;: Avoid fingerprint oil when using capacitive fingerprint sensor chip; θ is found to be hydrophilic or oleophilic) Cannot form residual Shao De / 7? Call, making finger fingerprints remain on the surface of the wafer to become residual ~ Like, affecting subsequent use, you can even use this to attack the system:

第10頁 1233198 五、發明說明(5) 到破解的目的。 因此,如何提供一種可抗靜電與應力破壞及防殘污干 擾之晶片式感測器,實為本案所欲解決之問題。 【發明内容】 因此,本發明之一 器,其可對抗 藉以提昇感測 為達成上 壞及防殘污干 靜電與應 器之感測 述目的, 擾之晶片 蓋於該基板結構上之 含:一第一層 二層, 用以對 第三應 第二應 少殘留 ,用以對 該基板結 個目的係提供一 力破壞,並能有 效果,並延長其 本發明提供一種 式感測器 保護層。 該基板結 構提供一 結構提供一第三應 於一張應力與一壓 用以對 該基板 力同屬 力屬於該張應力與該壓應 應力。 ,其包 保護層 構提供 第二應 力,其 應力兩 力兩者 種晶片式指紋感測 效防止殘污干擾, 使用壽命。 可抗靜電與應力破 含一基板結構及覆 由下而上依序包 一第一應 力;及一 中該第一 者之其一 之另一者 力;一第 第三層, 應力與該 者,而該 ,藉以減 【實施方式】 本發明之晶片式感測器,係以指紋感測器為例作說 明,其類型可以是電容式指紋感測器、溫差式指紋感測 器、電容壓力式指紋感測器等,然本發明並不以此為限。 圖1顯示利用本發明之電容式指紋感測器來讀取手指指 紋之示意圖。如圖1所示,此指紋感測器2係製作於矽基材Page 10 1233198 V. Description of the invention (5) To the purpose of cracking. Therefore, how to provide a chip-type sensor capable of resisting static electricity and stress damage and preventing residue interference is a problem to be solved in this case. [Summary of the Invention] Therefore, one of the devices of the present invention is capable of resisting the sensing and describing purposes of damage and dry static electricity and the reactor by improving the sensing, and the disturbed wafer cover on the substrate structure includes: A first layer and a second layer, which are used for the third application and the second application which have less residue, and are used to provide a force damage to the purpose of the substrate, which can have an effect and extend the invention. The invention provides a sensor protection Floor. The substrate structure provides a structure that provides a third stress and a pressure applied to the substrate. The force belongs to the tensile stress and the compressive stress. Its protective layer structure provides a second stress, which is both a stress and a chip-type fingerprint sensing effect to prevent the interference of residues and service life. It can resist static electricity and stress, including a substrate structure and covering a first stress in order from bottom to top; and one of the other one of the first force; a third layer, the stress and the other The embodiment of the chip sensor of the present invention is described by taking a fingerprint sensor as an example. The type can be a capacitive fingerprint sensor, a temperature difference fingerprint sensor, or a capacitive pressure. Type fingerprint sensor, etc., but the present invention is not limited to this. FIG. 1 shows a schematic diagram of reading a finger print using a capacitive fingerprint sensor of the present invention. As shown in Figure 1, this fingerprint sensor 2 is fabricated on a silicon substrate

第11頁 ^33198 五、發明說明(6) 上並切割成一晶片形狀,主要涵蓋面積為二維(2 j))矩陣排 列之複數個電容式感測元2 0,及其周邊控制處理電路(圖中 未示)。晶片的表面佈置矩陣型的複數金屬板作為感測電極 (從此感測電極以下包含感測及控制處理電路及石夕基材將 統稱為基板結構),並且形成一介電材料層於晶片的最外 表面,兼做感測電容介電質以及晶片裸露於外的保護層。Page 11 ^ 33198 V. Description of the invention (6) and cut into a wafer shape, mainly covering a plurality of capacitive sensing elements 20 arranged in a two-dimensional (2 j)) matrix arrangement, and its peripheral control processing circuit ( (Not shown). A plurality of metal plates of a matrix type are arranged on the surface of the wafer as a sensing electrode (hereafter the sensing electrode includes a sensing and control processing circuit and a Shi Xi substrate will be collectively referred to as a substrate structure), and a dielectric material layer is formed on the wafer. The outer surface doubles as the sensing capacitor dielectric and the exposed layer of the chip.

當手指1接觸該感測器2時,手指1表面的不規則形狀紋 峰(R i d g e ) 1 1會與部分之電容式感測元2 0接觸,而在該感測 器2上留下對應於該紋峰11的電容值曲線1 1 ^。透過讀取電 容值曲線11 a的形狀,便可以辨認原來紋峰11之形狀。 圖2係為圖1之電容感測元之第一實施例之局部側視示 意圖。如圖2所示,本發明之電容式指紋感測器包含一矽基 材2 1、複數個(圖中僅顯示一個)感測電極2 2及一保護層 2 6。矽基材2 1内含有對應每一感測電極2 2之一感測電路 2 1A ’並且在感測元陣列周邊還包括一信號處理及控制電路 2 1 B (示意地繪於圖4 ),詳細的感測元陣列與周邊電路設置 可以參考本專利發明者另一專利說請書(丨)中華民國專利申 請案序號091106806,申請日為2002年4月3日,發明名稱為When the finger 1 contacts the sensor 2, the irregular shape ridge 11 on the surface of the finger 1 will contact a part of the capacitive sensing element 2 0, and a corresponding response will be left on the sensor 2. The capacitance value curve 1 1 ^ at the ripple peak 11. By reading the shape of the capacitance value curve 11a, the original shape of the peak 11 can be identified. FIG. 2 is a schematic partial side view of the first embodiment of the capacitive sensing element of FIG. 1. FIG. As shown in FIG. 2, the capacitive fingerprint sensor of the present invention includes a silicon substrate 21, a plurality of (only one shown in the figure) sensing electrodes 22, and a protective layer 26. The silicon substrate 21 contains a sensing circuit 2 1A ′ corresponding to each of the sensing electrodes 22 and includes a signal processing and control circuit 2 1 B (schematically depicted in FIG. 4) around the sensing element array. For detailed sensor element array and peripheral circuit settings, please refer to another patent application of the inventor of this patent (丨) Republic of China Patent Application No. 091106806, the application date is April 3, 2002, and the invention name is

「電容式指紋讀取晶片」,暫准專利中。感測電極2 2係位 於石夕基材2 1上’並電連接至感測電路2 1 a (從此感測電極2 2 以下包含感测電路2 1 A及信號處理及控制處理電路2 1 B及矽 基材2 1將統稱為基板結構2 9 )。保護層2 6覆蓋於基板結構 2 9上。因此,於本實施例中,基板結構2 9包含一矽基材2 j 及複數個感測電極2 2。矽基材2 1内含有複數個感測電路2 1 A"Capacitive fingerprint reading chip", patent pending. The sensing electrode 2 2 is located on the Shixi substrate 21 and is electrically connected to the sensing circuit 2 1 a (from here on, the sensing electrode 2 2 includes the sensing circuit 2 1 A and the signal processing and control processing circuit 2 1 B And the silicon substrate 21 will be collectively referred to as a substrate structure 2 9). The protective layer 26 covers the substrate structure 29. Therefore, in this embodiment, the substrate structure 29 includes a silicon substrate 2 j and a plurality of sensing electrodes 22. Silicon substrate 2 1 contains multiple sensing circuits 2 1 A

1233198 發明說明(7) 及一信號處理及控制電路2 1 B。複數個感測電極2 2以陣列排 列的方式形成於石夕基材2 1上’分別對應於該等感測電路2工a 並電連接至該等感測電路2 1 A。 保護層26由下而上依序包含第一至第三層26八至26(:。 苐一層2 6 A用以對該基板結構2 9提供一第一應力。第二声 26B用以對該基板結構29提供一第二應力。第三層26(:用曰以 對該基板結構2 9提供一第三應力。1233198 Description of the invention (7) and a signal processing and control circuit 2 1 B. A plurality of sensing electrodes 2 2 are formed on the Shixi substrate 2 1 in an array manner, and are corresponding to the sensing circuits 2a and electrically connected to the sensing circuits 2 1A. The protective layer 26 includes first to third layers 26 to 26 (:) from bottom to top. A layer 2 6 A is used to provide a first stress to the substrate structure 29. A second sound 26B is used to The substrate structure 29 provides a second stress. The third layer 26 (: provides a third stress to the substrate structure 29.

—於一例子中,第一應力與第三應力同屬於一張應力, 而第二應力屬於一壓應力。亦即,藉由第一層26A與第三層 2 6C所提供的張應力來與第二層2 6B所提供的壓應力抵銷, 使得保護層2 6的熱殘留應力得以減少。於此情況下,第一 層26A與第三層26C係由氮化矽、碳化矽、類鑽碳材料與鑽 石材料之單一層或複合層所組成,而第二層26β係由二氧化 矽所組_成&。在本實施例中的第一至第三層之較佳組合為氮 化一氧化矽/氮化矽,導因為可以與商用積體電路製程 才胃谷降低製造的成本。同時在本實施例中二層氮化石夕的 厚度可以不同以保留適當的應力結構。 於另一例子中,第一應力與第三應力同屬於壓應力,-In one example, the first stress and the third stress belong to the same stress, and the second stress belongs to a compressive stress. That is, the tensile stress provided by the first layer 26A and the third layer 26C is used to offset the compressive stress provided by the second layer 26B, so that the thermal residual stress of the protective layer 26 is reduced. In this case, the first layer 26A and the third layer 26C are composed of a single layer or a composite layer of silicon nitride, silicon carbide, diamond-like carbon material, and diamond material, and the second layer 26β is composed of silicon dioxide. Group _ into &. The preferred combination of the first to third layers in this embodiment is silicon nitride oxide / silicon nitride, which can reduce the manufacturing cost because it can be used with commercial integrated circuit manufacturing processes. Meanwhile, in this embodiment, the thickness of the two-layered nitride can be different to maintain a proper stress structure. In another example, the first stress and the third stress are both compressive stresses.

而第二應力屬於張應力。亦即,藉由第一層26A與第三層 26C/it提供的壓應力來與第二層26B所提供的張應力抵銷θ, 使得保護層2 6的熱殘留應力得以減少。於此情況下,第二 層26Β、係由氮化矽、碳化矽、類鑽碳材料或鑽石材料之單一 層或複合層所組成,而第一層26Α與第三層2 6C係由二氧化 矽所組成。在本實施例中的第一至第三層之較佳組合為二The second stress is a tensile stress. That is, the compressive stress provided by the first layer 26A and the third layer 26C / it is used to offset θ with the tensile stress provided by the second layer 26B, so that the thermal residual stress of the protective layer 26 is reduced. In this case, the second layer 26B is composed of a single layer or a composite layer of silicon nitride, silicon carbide, diamond-like carbon material, or diamond material, and the first layer 26A and the third layer 26C are composed of dioxide. Composed of silicon. The preferred combination of the first to third layers in this embodiment is two

1233198 五、發明說明(8) 氧化石夕/ _几办/ — β 程相办 化夕/二乳化石夕’導因為可以與商用積體電路製 石夕的ί疮降低製造的成本。同時在本實施例中二層二氧化 ί度可以不同以保留適當的應力結構。 蠖厣S t本發明之保護層之三明治構造’可以使得整個保 心:ί留應力降低,目此可以增加保護層之厚度,使得 处Λ f ^強度(與厚度三次方成正比)方面,以及靜電防護 的# 文電場強度與厚度二次方成正比)方面有相當良好 r ^ .。在本發明實施例中,保護層之厚度最佳為3〜5微米 :,例如本發明一較佳實施例依序為二氧化矽〇 · 7 " “ 二姑^ m / 一乳化矽0 · 2 // m ,由此可見機械強度將為習 製t m的至少3倍。同時,相較於商用積體電路 可:二^曰厚度約為1微米,本發明實施例的靜電電場承受 可以增加至少8倍。 音円圖V系闫為Q圖1之電容感測元之第二實施例之局部側視示 可以f白人ϋ μ 古八上述之二明治構造以外,保護層2 6 J以更包含屬於一咼分子材料屛 ^ 於兮篦- M9Rr卜ιν I何杆層之一第四層26D,其乃塗敷 於口哀弟二層2 6C上,以提供與一手 .u ^ _ 表面,藉以防止指紋殘留於苴上一 一斥水及斥油之 鼠龍(Teflon)或類鐵亂遽化學結構材料 ^ 分子材料層26D係藉由使用一呈右古八^斤、、且成。或者,咼 在筮-厣9fir卜,且倉丄 ν、有同刀子單體的溶液而形成 ,二層26C上,具有向分子單體的 ^ 端及一矽烷基之極性端。氱碏肀人触山 ^ 既厌來a體1233198 V. Description of the invention (8) Oxidized stone eve / _ several offices / — β process phase chemical eve / second emulsified stone eve 'Because it can be used with commercial integrated circuit to make the edema of stone eve to reduce the manufacturing cost. At the same time, in this embodiment, the two-layer dioxide may be different to retain a proper stress structure. TS t The sandwich structure of the protective layer of the present invention can keep the whole mind: the remaining stress is reduced, so that the thickness of the protective layer can be increased, so that the strength of Λ f ^ is proportional to the cube of the thickness, and The electrostatic field strength is proportional to the square of the thickness) and has a good r ^. In the embodiment of the present invention, the thickness of the protective layer is preferably 3 to 5 micrometers. For example, in a preferred embodiment of the present invention, it is silicon dioxide in order. 7 " "二姑 ^ m / 一 emulsified silicon 0 · 2 // m, which shows that the mechanical strength will be at least 3 times the custom tm. At the same time, compared to commercial integrated circuits: the thickness is about 1 micron, and the electrostatic field withstand of the embodiment of the present invention can be increased At least 8 times. Partial side view of the second embodiment of the capacitive sensing element shown in FIG. 1 as shown in FIG. 1 is shown in FIG. 1. The white layer can be f white. Μ In addition to the two Meiji structures, the protective layer 2 6 J is more Contains a fourth layer 26D, which belongs to the first molecular material, Yu Xi 篦-M9Rr Bu Iν, which is coated on the second layer 2C of the mouth sad brother, to provide a first-hand .u ^ _ surface, In order to prevent fingerprints from remaining on the water-repellent water- and oil-repellent Teflon or iron-like chemical structure material ^ The molecular material layer 26D is formed by using a quasi-eight ancient catty, or. , 咼 is formed in 筮-厣 9fir, and it is formed by a solution of the same knife monomer. On the second layer 26C, there is a molecular monomer. ^ And the end of a silicon polar end group. Yang Xipianpang tired person to contact both a mountain ^ body

挪係用以將向分子材料層26D 亡矛从u W . 狀反♦合體端係裸露於外,並且 有一柔軚片奴之一鼠碳尚分子鐽,用以保護一積體電 党於外部干擾,矽烷基之極性端係用 _ 、 免The system is used to expose the 26D dead spear to the molecular material layer from the U.W shape. The end system is exposed to the outside, and there is a murine carbohydrate molecule, which is used to protect an integrated electric party. Interference, the polar end of the silane group is used

1233198 五、發明說明(9) 穩固固定於該第三層26C上。於另一實施例中,第四層26D 可以是陶莞原子層(ceramic atomic layer),譬如是氧化 在呂與乳化欽層’以形成同樣的斥水及斥油之表面(請參見中 華民國專利申請案序號092124697,申請日為2003年9月8 曰,發明名稱為「能防止指紋殘留之電容式指紋感測器及 其處理方法」及中華民國專利申請案序號092132480,申請 日為2 0 0 3年1 1月2 0日,發明名稱為「晶片裝置的表面處理 方法及使用該方法所形成之晶片裝置」)。 除了上述藉由應力補償設計的保護層結構可以大幅增 加耐壓強度及靜電破壞防護外,為了更進一步增加本發明 晶片式指紋感測器的靜電防護,請參見圖4,其係為靜電防 護的另一實施例。圖4顯示圖3之電容式指紋感測器之剖視 示意圖。如圖4所示,本發明之電容式指紋感測器2基本上 包含一内含複數個感測電路及一信號處理及控制電路的石夕 基材2 1、屬於感測電極之複數個平板電極22、一金屬網 2 3、複數個靜電放電單元2 4、複數個焊墊2 5及一保護層 26。於本實施例中,基板結構29可以被視為包含矽基材 21、平板電極22、金屬網23、靜電放電單元24及焊墊25。 該等平板電極22係以陣列排列的方式形成於該矽基材2 i 上。金屬網2 3係形成於該等平板電極2 2之間,並與該等平 板電極2 2齊平’且包圍各該平板電極2 2。詳言之,金屬網 2 3係縱橫地穿設於該等平板電極2 2之間隙中。各該平板電 極2 2與該金屬網2 3隔開一預定之間距。該等焊墊2 5係作為 該電容式指紋感測器2之輸入與輸出部分。該金屬網2 3連接1233198 V. Description of the invention (9) It is firmly fixed on the third layer 26C. In another embodiment, the fourth layer 26D may be a ceramic atomic layer, for example, it is oxidized on the Lu and emulsified layer to form the same water and oil repellent surface (see the Republic of China Patent The application number is 092124697, the application date is September 8, 2003. The invention name is "Capacitive fingerprint sensor capable of preventing fingerprint residue and its processing method" and the Republic of China patent application number is 092132480, and the application date is 2000. 3 years 1 November 20th, the invention name is "Surface treatment method of wafer device and wafer device formed by using this method"). In addition to the above-mentioned protective layer structure designed by stress compensation, which can greatly increase the compressive strength and the protection against electrostatic damage, in order to further increase the electrostatic protection of the chip fingerprint sensor of the present invention, please refer to FIG. 4, which is an electrostatic protection Another embodiment. FIG. 4 is a schematic cross-sectional view of the capacitive fingerprint sensor of FIG. 3. As shown in FIG. 4, the capacitive fingerprint sensor 2 of the present invention basically includes a Shi Xi substrate 2 containing a plurality of sensing circuits and a signal processing and control circuit 1. A plurality of flat plates belonging to a sensing electrode The electrode 22, a metal mesh 2 3, a plurality of electrostatic discharge cells 2 4, a plurality of welding pads 25, and a protective layer 26. In this embodiment, the substrate structure 29 can be regarded as including a silicon substrate 21, a plate electrode 22, a metal mesh 23, an electrostatic discharge unit 24, and a bonding pad 25. The plate electrodes 22 are formed on the silicon substrate 2 i in an array arrangement. A metal mesh 23 is formed between the flat electrodes 22 and is flush with the flat electrodes 22 and surrounds each of the flat electrodes 22. In detail, the metal meshes 2 3 are arranged vertically and horizontally in the gaps between the flat electrodes 22. Each of the plate electrodes 22 and the metal mesh 2 3 are separated by a predetermined distance. These pads 25 are used as the input and output parts of the capacitive fingerprint sensor 2. The metal mesh 2 3 connections

第15頁 1233198 五、發明說明(10) 至一接地端GND,主要是要將靜電導引至接地端GND,避免 感測器遭受到靜電破壞。該等靜電放電單元2 4係與該金屬 網23連接,進而連接至接地端。相鄰之靜電放電單元2 4之 距離D遠大於相鄰之平板電極2 2之間距,所以該等靜電放電 單元24之數目遠小於該等平板電極22之數目。 保護層2 6係完全覆蓋於該等平板電極22及該金屬網 23 ’並局部覆蓋於該等靜電放電單元24及該等焊墊25之 上。該保護層26係於該等靜電放電單元24上形成複數之第 一開口 2 7,並於該等焊墊2 5之上形成複數之第二開口 2 8。Page 15 1233198 V. Description of the invention (10) To a ground terminal GND, the main purpose is to guide static electricity to the ground terminal GND to prevent the sensor from being damaged by static electricity. The electrostatic discharge cells 24 are connected to the metal mesh 23 and further connected to the ground terminal. The distance D between the adjacent electrostatic discharge cells 24 is much larger than the distance between the adjacent plate electrodes 22, so the number of the electrostatic discharge cells 24 is much smaller than the number of the plate electrodes 22. The protective layer 2 6 is completely covered on the flat electrodes 22 and the metal mesh 23 ′ and is partially covered on the electrostatic discharge cells 24 and the bonding pads 25. The protective layer 26 forms a plurality of first openings 27 on the electrostatic discharge cells 24, and forms a plurality of second openings 28 on the pads 25.

值得注意的是,各該第一開口 2 7之尺寸遠小於各該第二開 口 28之尺寸。 圖5顯示圖4之局部 放大示意圖。如圖5與6 板2 1上之一欽層5 1,位 位於該鋁合金層5 2上之 該第一開口 2 7露出。各 層5 1,位於該鈦層5 1上 金層5 2,及位於該銘合 一氮化鈦層5 3。值得注 得在各該第一開口 2 7中 於該氮化鈦層5 3之一周 中之氮化鈦層53實質上 圖7顯示圖4之電容 沿著圖7之線4 - 4即可得 剖視示意圖。圖6顯示圖4之焊塾之 所示,鋁金屬疊層3 〇包含位於該基 於該鈦層51上之一鋁合金層52,及 一氮化鈦層5 3。鋁合金層5 2係由各 焊墊25包含位於該基板2 1上之一鈦 且由各該第二開口 28露出之一紹合 金層52上且圍繞各該第二開口 28之 思的是,由於钱刻製程之特性,使 之該氮化鈦層53之一中間厚度T1小 邊厚度T2,而位在各該第二開口 28 完全會被移除。 式指紋感測器之局部俯視示意圖。 到如圖4所示之側視圖。從圖7可以 1233198 五、發明說明(Η) >月邊看出’為了製作靜電放電单元24 ’本發明在不影響感 測效果之情況下犧牲掉某些平板電極之感測面積。所以, 該等平板電極22包含複數個犧牲電極22S及複數個標準電極 22Ν,該等犧牲電極22S係與該等靜電放電單元24鄰接,且 各,犧牲電極22S之尺寸小於各該標準電極22Ν之尺寸。於 本實施例中,各該靜電放電單元24係僅與一個犧牲電極22S 鄰接。所以在九個平板電極22中,只有一個犧牲電極22S。 平板電極22與金屬網23可以是由相同之材料所製造 成。舉例而言,平板電極22與金屬網23可以是積體電路製 程中的最頂層之金屬薄膜,如鋁金屬疊層3〇或銅^屬疊、 層。於士實施例中,平板電極22之面積約為4〇微米微 米,電容式感測元20之面積為50微米*5〇微米,平板電極22 與手,1間形^成感測電容,而金屬網23係作為靜電防護用。 當手指靠近感測器時,靜電可以從第一開口 27 _ 屬網23而流向接地端gnd。於太眚#点丨士 " .φ ^ 於本實施例中,二個相鄰之靜電 放電早兀24的最佳化間距!)為5〇〇至1〇〇〇微米。 俯调圖8Λ示7本發明第三實施例之電容式指紋感測器之 匕 感測器係與圖7類似,不同之處在於圖8 之各該靜電放電單元24係僅與兩It is worth noting that the size of each of the first openings 27 is much smaller than the size of each of the second openings 28. Fig. 5 is a partially enlarged schematic view of Fig. 4. As shown in Figs. 5 and 6, one of the first layers 27 is located on the plate 21, and the first opening 27 on the aluminum alloy layer 52 is exposed. Each layer 51 is located on the titanium layer 51 and the gold layer 52 is located on the titanium layer 51 and the titanium nitride layer 53 is located on the same layer. It is worth noting that in each of the first openings 27, the titanium nitride layer 53 in one week of the titanium nitride layer 53 is substantially as shown in FIG. 7 and the capacitance of FIG. 4 can be obtained along the line 4-4 of FIG. 7. Cutaway schematic. Fig. 6 shows the welding pad shown in Fig. 4. The aluminum metal stack 30 includes an aluminum alloy layer 52 on the titanium layer 51 and a titanium nitride layer 53. The aluminum alloy layer 52 is formed by each pad 25 including a titanium on the substrate 21 and exposed by each of the second openings 28 on the alloy layer 52 and surrounding each of the second openings 28. Due to the characteristics of the money engraving process, one of the middle thickness T1 and the small side thickness T2 of the titanium nitride layer 53 is completely removed from each of the second openings 28. Partial top view of a fingerprint sensor. Go to the side view shown in Figure 4. From Figure 7, we can see 1233198 V. Description of the invention (Η) > From the moon, it is seen that 'in order to make the electrostatic discharge unit 24', the present invention sacrifices the sensing area of some flat electrodes without affecting the sensing effect. Therefore, the plate electrodes 22 include a plurality of sacrificial electrodes 22S and a plurality of standard electrodes 22N. The sacrificial electrodes 22S are adjacent to the electrostatic discharge cells 24, and each of the sacrificial electrodes 22S has a size smaller than that of each of the standard electrodes 22N. size. In this embodiment, each of the electrostatic discharge cells 24 is adjacent to only one sacrificial electrode 22S. Therefore, among the nine plate electrodes 22, there is only one sacrificial electrode 22S. The plate electrode 22 and the metal mesh 23 may be made of the same material. For example, the plate electrode 22 and the metal mesh 23 may be the topmost metal thin film in the integrated circuit manufacturing process, such as an aluminum metal laminate 30 or a copper laminate. In the embodiment, the area of the flat electrode 22 is about 40 microns, the area of the capacitive sensing element 20 is 50 microns * 50 microns, and the sensing capacity is formed between the flat electrode 22 and the hand, and The metal net 23 is used for electrostatic protection. When a finger approaches the sensor, static electricity can flow from the first opening 27 _ to the ground 23 to the ground terminal gnd.于 太 眚 # 点 丨 士. In this embodiment, the optimal distance between two adjacent electrostatic discharge cells 24 is 500 to 1000 microns. The top-down view 8Λ shows a dagger of a capacitive fingerprint sensor according to a third embodiment of the present invention. The sensor is similar to FIG. 7 except that each of the electrostatic discharge units 24 in FIG.

即,兩個鄰接之平板電極22夂膳从枯 ^ ^ 7J 電單元24使用。 各犧牲掉-個區域來供靜電放 俯視r二示依rr月第四實施例之電容式指紋 單J則器係與圖7類似,不同之處在於圖丨 70係僅與四個犧牲電極22S鄰接。亦 1233198 五、發明說明(12) =四個鄰接之平板電極22各犧牲掉一個區域來供 尾早元24使用。 藉由上述構造,供靜電放電單元24使用之第一開口27 糸與供焊塾25使用之第二開口28係設計於同一道光罩中, 但其尺寸則有相當大差距。舉例而言,第一開口 27之尺 通常為5至10微米’而第二開口 28夕、 伞 ^ ^ 闹之尺寸通常為100至150微 :蔓二二ϊΐ開口形成之過程中,不僅可以完全去除保 入:土形成弟一開口 2 8,最上面的氮化鈦層5 3亦可以完 :被去除而使紹合金層52完全裸露出,以利後續的打線動 Κ = 藝者應可輕易理解到,形成開口所使用的 t It :有負載效應(loading effect),也就是 枓,二:較小者蝕刻速度較慢。本發明即是利用這一特 .,错由時間的控管,得以保留第一開口 27中之邙分的氮 化鈦層53 (厚度約為n ! %上、丄 〖〒之口P刀的鼠 而于腐钱、適合長期使用於氮化1 太層53不易氧化’ 感測器之物體可:==氣:7?°此,靠近 及鋁合金#52 i車錄基、s 由苐一開口27、氮化鈦層53 且本發明^用的仝屈k至接地端,藉以避免靜電破壞。並 S = 2 網材料及製造程序完全等同於任何商 +成ΐΐ t、私,係利用最頂層的鋁或者銅金屬製程同時 完成感測電極及靜雷陝嗅人府 两衣々丨J 丁 盥製造产# Τ 4 ^ ^防蠖金屬網。可以免除上述習知技術 與I^私不相容或材料不相容的問題。 抑知^彳ί之製程設計完全不需要使用具有高複雜度之前述 二及材:方Γ且可完全利用商業用積體電路工廠的標準流 私及材㈣製造本發明之感測器。 Ι^ΒΙΙΜΙ 第18頁 1233198 五、發明說明(13) 本發明優點不僅在於ESD防護能力,同時僅利用長間距 之少數靜電放電單元便可以完成ESD防護,即使使用後有殘 污,大部分殘污也是獨立的,並不與金屬網2 3連接,減少 了許多殘污電容對影像所造成的干擾。 在較佳實施例之詳細說明中所提出之具體實施例僅用 以方便說明本發明之技術内容,而非將本發明狹義地限制 於上述實施例,在不超出本發明之精神及以下申請專利範 圍之情況,所做之種種變化實施,皆屬於本發明之範圍。That is, the two adjacent flat electrodes 22 are used from the dead 7J electric unit 24. Each area is sacrificed for electrostatic discharge. The second embodiment of the capacitive fingerprint sensor according to the fourth embodiment is similar to that of FIG. 7 except that the 70 series is only associated with four sacrificial electrodes 22S. Adjacency. Also 1233198 V. Description of the invention (12) = Four adjacent plate electrodes 22 each sacrifice one area for the early element 24. With the above-mentioned structure, the first opening 27 供 for the electrostatic discharge unit 24 and the second opening 28 for the welding 系 25 are designed in the same mask, but their sizes are quite different. For example, the size of the first opening 27 is usually 5 to 10 micrometers, and the size of the second opening 28 and the umbrella ^ ^ are usually 100 to 150 micrometers. During the process of forming the opening of the mantle, it can not only completely Removal and retention: the soil formation opening 2 8 and the uppermost titanium nitride layer 5 3 can also be completed: it is removed and the Shao alloy layer 52 is completely exposed, in order to facilitate subsequent threading KK = artist should be able to easily It is understood that the t It used to form the opening has a loading effect, that is, 枓, and the second: the smaller the etching speed is slower. The present invention utilizes this feature. By time control, the titanium nitride layer 53 (thickness of about n!% On the upper side of the P-knife in the first opening 27) can be retained. Rats are rotten and suitable for long-term use. Nitrides 1 The layer 53 is not easy to oxidize. The object of the sensor can be: == gas: 7? ° this, close to and aluminum alloy # 52 i 车 录 基, s by 苐 一The opening 27 and the titanium nitride layer 53 are used in the present invention to the ground terminal, so as to avoid electrostatic damage. And S = 2 mesh materials and manufacturing procedures are completely equivalent to any quotient + Cheng t, private, and most use of The top aluminum or copper metal process simultaneously completes the sensing electrode and the static clothing of the two people. JJ 丁 沐 制造 产 # Τ 4 ^ ^ Anti-knock metal mesh. The above-mentioned conventional technology can be exempted. The problem of compatibility or material incompatibility is eliminated. The design of the process does not require the use of the aforementioned two materials with high complexity: Fang Γ and can fully utilize the standard flow and materials of commercial integrated circuit factories. Manufacture the sensor of the present invention. I ^ ΒΙΙΜΙ Page 18 1233198 V. Description of the invention (13) The advantages of the present invention are not only in E SD protection capability. At the same time, ESD protection can be completed using only a few electrostatic discharge cells with long distances. Even if there is residue after use, most of the residue is independent, and it is not connected to the metal mesh 2 3, which reduces many residue capacitors. Interference caused by the image. The specific embodiments proposed in the detailed description of the preferred embodiments are only used to facilitate the description of the technical content of the present invention, rather than limiting the present invention to the above embodiments in a narrow sense without exceeding The spirit of the invention and the scope of the patent application below, and the various changes made are all within the scope of the present invention.

第19頁 1233198 圖式簡單說明 圖1顯示利用本發明之電容式指紋感測器來讀取手指指 紋之示意圖。 圖2係為圖1之電容感測元之第一實施例之局部側視示 意圖。 圖3係為圖1之電容感測元之第二實施例之局部側視示 意圖。 圖4顯示圖3之電容式指紋感測器之剖視示意圖。 圖5顯示圖4之局部剖視示意圖。 圖6顯示圖4之焊墊之放大示意圖。 圖7顯示圖4之電容式指紋感測器之局部俯視示意圖。 圖8顯示依據本發明第三實施例之電容式指紋感測器之 俯視不意圖。 圖9顯示依據本發明第四實施例之電容式指紋感測器之 俯視示意圖。 [元件代表符號說明] T 1〜中間厚度 GND〜接地端 1〜手指 11〜紋峰 2 0〜電容式感測元 2 1 A〜感測電路 22〜平板電極(感測電極) 22S〜犧牲電極 T2〜周邊厚度 D〜間距 2〜指紋感測器 1 la〜電容值曲線 2 1〜矽基材 2 1B〜信號處理及控制電路 22N〜標準電極 2 3〜金屬網Page 19 1233198 Brief Description of Drawings Figure 1 shows a schematic diagram of reading fingerprints using a capacitive fingerprint sensor of the present invention. FIG. 2 is a schematic partial side view of the first embodiment of the capacitive sensing element of FIG. 1. FIG. FIG. 3 is a schematic partial side view of the second embodiment of the capacitive sensing element of FIG. 1. FIG. FIG. 4 is a schematic cross-sectional view of the capacitive fingerprint sensor of FIG. 3. FIG. 5 is a schematic partial cross-sectional view of FIG. 4. FIG. 6 shows an enlarged schematic view of the bonding pad of FIG. 4. FIG. 7 is a partial top view of the capacitive fingerprint sensor of FIG. 4. FIG. 8 shows a plan view of a capacitive fingerprint sensor according to a third embodiment of the present invention. FIG. 9 shows a schematic top view of a capacitive fingerprint sensor according to a fourth embodiment of the present invention. [Explanation of Symbols of Components] T 1 ~ Intermediate thickness GND ~ Ground terminal 1 ~ Finger 11 ~ Wave peak 2 0 ~ Capacitive sensing element 2 1 A ~ Sense circuit 22 ~ Flat electrode (sensing electrode) 22S ~ Sacrifice electrode T2 ~ peripheral thickness D ~ pitch 2 ~ fingerprint sensor 1 la ~ capacitance value curve 2 1 ~ silicon substrate 2 1B ~ signal processing and control circuit 22N ~ standard electrode 2 3 ~ metal mesh

第20頁 1233198 圖式簡單說明 2 4〜靜電放電單元 2 6〜保護層 26B〜第二層 2 6 D〜第四層 2 8〜第二開口 30〜鋁金屬疊層 5 2〜铭合金層 2 5〜焊墊 2 6 A〜第一層 2 6 C〜第三層 2 7〜第一開口 2 9〜基板結構 5 1〜鈦層 5 3〜氮化鈦層Page 20 1233198 Brief description of drawings 2 4 ~ ESD 2 6 ~ Protective layer 26B ~ Second layer 2 6 D ~ Four layer 2 8 ~ Second opening 30 ~ Aluminum metal layer 5 2 ~ Ming alloy layer 2 5 ~ pad 2 6 A ~ first layer 2 6 C ~ third layer 2 7 ~ first opening 2 9 ~ substrate structure 5 1 ~ titanium layer 5 3 ~ titanium nitride layer

第21頁Page 21

Claims (1)

1233198 六、申請專利範圍 1. 一種可抗靜電與應力破壞及防殘污干擾之晶片式感 測器,包含: 一基板結構;及 一保護層,覆蓋於該基板結構上,該保護層由下而上 依序包含: 一第一層,用以對該基板結構提供一第一應力; 基板結構提供一第二應力;及 基板結構提供一第三應力,其 同屬於一張應力與一壓應力兩 一第二層,用以對該 一第三層,用以對該 中該第一應力與該第三應力 者之其一者,而該第二應力屬於該張應力與該壓應力兩者 之另一 2. 及防殘 係由二 類鑽碳 3. 及防殘 矽所組 類鑽碳 4. 及防殘 者。 如申請專利範圍第1 污干擾之晶片式感測 氧化石夕所組成,而該 材料與鑽石材料之單 如申請專利範圍第1 污干擾之晶片式感測 成,而該第一層與該 材料與鑽石材料之早 如申請專利範圍第1 污干擾之晶片式感測 高分子材料層或陶瓷 以提供 紋殘留於其上 原子層, 與一手指接觸之一斥水及斥油 該第一 由氮化 合層所 可抗靜 該苐二 由氮化 合層所 可抗靜 該保護 塗敷於 之表面 項所述之可抗靜 器,其中 第二層係 一層或複 項所述之 器,其中 第三層係 一層或複 項所述之 器,其中 電與應力破壞 層與該第三層 矽、碳化矽、 組成。 電與應力破壞 層係由二氧化 矽、碳化矽、 組成。 電與應力破壞 層更包含: 該第三層上, ,藉以防止指1233198 VI. Scope of patent application 1. A wafer-type sensor capable of resisting static electricity, stress damage and anti-fouling interference, including: a substrate structure; and a protective layer covering the substrate structure, the protective layer is The above sequence includes: a first layer to provide a first stress to the substrate structure; a substrate structure to provide a second stress; and a substrate structure to provide a third stress, which are both a sheet stress and a compressive stress A pair of two layers is used for the one third layer and used for one of the first stress and the third stress, and the second stress belongs to both the tensile stress and the compressive stress. The other 2. and anti-residue system are composed of second-class diamond carbon 3. and anti-residue silicon group diamond 4. and anti-disability. For example, the patent application scope of the first fouling interference is composed of wafer-type sensing oxide oxide, and the material and diamond materials are only as the patent application scope of the first fouling interference-type wafer-type sensing, and the first layer and the material As early as the patent application scope of the patent application, the wafer type sensing of the polymer material layer or ceramic is used to provide the atomic layer remaining on the surface, and it is in contact with a finger to repel water and oil. The first is made of nitrogen. The compound layer can be antistatic. The second layer can be antistatic by the nitride compound layer. The second layer is a layer or a device described in the second item. The layer is a device described in one or more items, wherein the electrical and stress destruction layer is composed of the third layer of silicon, silicon carbide. The electrical and stress failure layers are composed of silicon dioxide, silicon carbide, and silicon dioxide. The electrical and stress damage layer further includes: on the third layer, to prevent the finger 第22頁 1233198 六、申請專利範圍 可抗靜電與應力破壞 該高分子材料層係由 材料所組成。 可抗靜電與應力破壞 該高分子材料層係藉 成在該第三層上,該 合體端及一矽烷基之 ,用以保護一積體電 端係用以將該高分子 可抗靜電與應力破壞 該氟碳聚合體端具有 5. 如申請專利範圍第4項所述之 及防殘污干擾之晶片式感測器,其中 鐵氟龍(Teflon)或類鐵氟龍化學結構 6. 如申請專利範圍第4項所述之 及防殘污干擾之晶片式感測器,其中 由使用一具有高分子單體的溶液而形 具有高分子單體的溶液具有一氟碳聚 極性端,該氟碳聚合體端係裸露於外 路免受於外部干擾,該矽烷基之極性 材料層穩固固定於該第三層上。 7. 如申請專利範圍第6項所述之 及防殘污干擾之晶片式感測器,其中 一柔軟片段之一氟碳高分子鍵。 8. 及防殘 氧化鋁 9. 及防殘 微米。 10 及防殘 5微米 11 及防殘 如申請專利範圍第4項所述之可抗靜電與應力破壞 污干擾之晶片式感測器,其中該陶瓷原子層係為一 層或一氧化欽層。 如申請專利範圍第1項所述之可抗靜電與應力破壞 污干擾之晶片式感測器,其中該保護層之厚度大於2 .如申請專利範圍第1項所述之可抗靜電與應力破壞 污干擾之晶片式感測器,其中該保護層之厚度為3至 .如申請專利範圍第1項所述之可抗靜電與應力破壞 污干擾之晶片式感測器,其中該基板結構包含:Page 22 1233198 VI. Scope of patent application Anti-static and stress damage The polymer material layer is composed of materials. The layer of polymer material capable of resisting static electricity and stress is borrowed on the third layer. The combined end and a silane group are used to protect an integrated electrical end system for protecting the polymer from static electricity and stress. Destruction of the fluorocarbon polymer end has 5. As described in the scope of the patent application and the anti-fouling interference chip sensor, in which Teflon or Teflon-like chemical structure 6. If applied The chip sensor described in item 4 of the patent scope and preventing fouling interference, wherein a solution having a polymer monomer is formed by using a solution having a polymer monomer having a fluorocarbon polypolar end, and the fluorine The end of the carbon polymer is exposed to the outside to avoid external interference, and the silane-based polar material layer is firmly fixed on the third layer. 7. The chip-type sensor described in item 6 of the scope of patent application and anti-fouling interference, wherein one of the soft segments is a fluorocarbon polymer bond. 8. Anti-residue alumina 9. Anti-residue micron. 10 and anti-residue 5 micron 11 and anti-residue As described in item 4 of the scope of the patent application, a wafer-type sensor capable of resisting electrostatic interference and stress damage pollution, wherein the ceramic atomic layer is a layer or an oxide layer. The chip sensor capable of resisting static electricity and stress damage pollution as described in item 1 of the scope of patent application, wherein the thickness of the protective layer is greater than 2. The electrostatic resistance and stress damage as described in item 1 of the scope of patent application Wafer-type sensor with fouling interference, wherein the thickness of the protective layer is 3 to. As described in item 1 of the scope of the patent application, the wafer-type sensor with anti-static and stress-damaging fouling interference, wherein the substrate structure includes: 第23頁 1233198 六、申請專利範圍 15. 如申請專利範圍第1 3項所述之可抗靜電與應力破 壞及防殘污干擾之晶片式感測器,其中二個相鄰之靜電放 電單元的間距實質上在5 0 0至1 0 0 0微米之間。 16. 如申請專利範圍第1 1項所述之可抗靜電與應力破 壞及防殘污干擾之晶片式感測器,其中該等感測電極包含 複數個犧牲電極及複數個標準電極,該等犧牲電極係與該 等靜電放電單元鄰接,且各該犧牲電極之尺寸小於各該標 準電極之尺寸。Page 23, 1233198 VI. Application for patent scope 15. As described in item 13 of the scope of patent application, the chip-type sensor can resist static electricity and stress damage and anti-fouling interference, of which two adjacent electrostatic discharge cells The pitch is substantially between 500 and 100 microns. 16. The chip-type sensor capable of resisting static electricity, stress damage and anti-fouling interference as described in item 11 of the scope of patent application, wherein the sensing electrodes include a plurality of sacrificial electrodes and a plurality of standard electrodes, and The sacrificial electrodes are adjacent to the electrostatic discharge cells, and the size of each of the sacrificial electrodes is smaller than that of each of the standard electrodes. 第25頁Page 25
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