TW540106B - Manufacturing process of increasing trench capacitance - Google Patents

Abstract

The invention provides a kind of manufacturing process for increasing the trench capacitance. The invention is suitable for use in a substrate having a pad layer structure and a trench, and includes the following steps: forming a ring shape insulation layer on the upper part of the trench sidewall; performing the first stage of ion implantation process to implant ions into the trench sidewall in a specified angle for destroying the substrate lattice structure of the trench sidewall uncovered by the ring-shaped insulation layer; performing the second stage of ion implantation process to vertically implant ions into the trench bottom part for destroying the substrate lattice structure of the trench bottom part; and conducting an etching process to remove the destroyed substrate part inside the trench.

Description

540106 V. Description of the invention, (1) [Field of the Invention] The present invention relates to a process for manufacturing a trench capacitor of a semiconductor integrated circuit. In particular, it relates to a process for increasing a trench capacitor. Wang [Known Technical Description] Generally speaking, the capacitors in Dynamic Random Access Memory (DRAM), which is currently widely used, are formed by the surfaces of two conductive layers (ie, electrode plates) with an insulating material in between. The ability of a silicon capacitor to store charge is determined by the thickness of the insulating material, the area of the electrode, and the electrical properties of the insulating material. With the recent half year: process design has been toward the direction of reducing the size of semiconductor elements to increase density _private exhibition, the base area of memory cells in the memory must continue to reduce so that the product can accommodate a large number of memory cells to increase the density, but At the same time, the memory cell capacitor plate must have sufficient surface area to store sufficient charge. ”However, in the case of continuous miniaturization, the trench storage node capacitance (capacltance) in the dynamic random memory also shrinks. Therefore, it is necessary to increase the storage power to maintain the good operating performance of the memory. Therefore, there is a need to develop methods for increasing storage capacitance, such as etching a conductor substrate to form a bottle-shaped trench (b0tUe sh ^ trenc ^ i) at the bottom of a large trench. W has been widely used to increase the storage capacitance of DRAM. Method 2, such as forming a bottle shaped capacitor by increasing the width of the bottom of the trench to increase the surface area. The manufacturing method of the following wires aa,, is explained below. From ignorance see Figure 1A, rolled on a silicon base

540106 V. Description of the invention (2) The pattern formed on the bottom 10 is to etch a trench 14, 18 °. Then, after part of the trench, deposit one and extend to and anisotropy, that is, shape. A pad layer 12 pattern, and then the pad layer. The mask is formed on the silicon substrate by dry etching. The trench 14 has—an upper peripheral portion 16 and a lower peripheral portion. Please refer to FIG. 1B. For example, a photoresist layer is deposited first (not shown). 14 inside and covers the trench 丨 4 and the lower peripheral part 丨 8. The complex aa stone evening sacrificial layer 2 0 is on the upper part of the trench 1 4 Qiu 彳 β on the 塾 layer 12. Then the photoresist is removed. The sacrificial polycrystalline sacrificial layer 20 located above the cushion layer 12 is removed in a layered manner. A polycrystalline silicon sacrificial layer 20 is formed on the upper part of the trench 14 and the peripheral part 16 is connected to a wet etching process (also known as wet bottle etching). Tooth =), the silicon substrate under the trench 14 that is not protected by the polycrystalline sacrifice layer 20 is isotropically etched with ammonia or dilute hydrogen acid solution (dllute HF solutin) to form a bottle-like shape The surrounding area of the lower part of the groove 14 is 22, ⑶ it is shown in the hall. However, the steps required for the above process are complicated. 'A separate process is required to form a wood groove first, and then a bottle groove is formed. Due to the etching process, a tapered groove is formed. Deep trenches cannot be formed, and there will be problems such as generation of hydrogen gas, which increases the difficulty of the process and Adding process time is not conducive to large-scale production. Another traditional method of forming the ampoule groove is to use anisotropic dry etching, but the above method has restrictions on equipment and last name etchants. May cause process problems such as the formation of pockets on the side walls of the trench and the thickness of the hard cover. The dry-etching method will enlarge the bottom of the trench

540106 V. Description of the invention (3) The effect of the method of the invention is based on the process. It is automatically and selectively enough to effectively expand the cushion structure of the invention and the upper part to form an ion implanted with a specific insulating layer. . If the results are limited, the present invention uses the engraving method to apply the ion side lattice structure to the groove side distance of the incident angle i of the ring-shaped insulating layer for increasing the base of the trench. The uncontrollable main objective is to increase the DRAM and the trench capacitance by destroying the dynamic randomness, including the following; the first implantation of the base crystal of this trench wall is vertically implanted and the etching is performed. Provide a manufacturing process for the storage of the lattice junction memory. Steps are: step away from the side wall, the lattice structure, and the trench bottom is subject to an increase in the structure and capacitance of the memory. It is suitable for this trench implantation to destroy the »Executive part to destroy the trench capacitor. Capacitor with phosphoric acid can be used in a process with trench sidewalls, which will not damage the trench in the second stage.

Other objects, features, and advantages can make the embodiments clearer, and in conjunction with the accompanying drawings, to make the above and the present invention more understandable, the following are particularly preferred and detailed descriptions are as follows: & Examples

Semiconducting base 1: Refer to the second picture 'in-base', for example: a 1 η 9 contactor formed by ㈣ is formed into a pad structure composed of a nitride layer 104 and a pad oxide layer f 106. For example, a thermal oxidation method (thermal 0X1 ajion) is used to form a pad oxide layer dm with a thickness of about 100 angstroms on the pad oxide 202 and a nitride layer is formed by chemical vapor deposition. Then, Photolithography

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540106

Ξ ί (not shown) on the nitride layer 104. Next, the photoresist pattern is used to remove the nitride layer 104 and the underlying pad oxide layer 102, which are not covered by the photoresist pattern, to form a nitride layer 104 and a pad oxygen and compound layer 1. 〇2 structure of the cushion structure 〇6. Then, the photoresist pattern and the pad layer are used as a mask to remove the substrate 100 that is not covered by the pad layer and the structure 106, for example, using a reactive ion etching method (Reactive Ion).

Etching; R E), and a trencher is etched. Thereafter, the photoresist is removed ', and the result is shown in Fig. 2A.

Eighteen people, see for example, Figure 2B. 'A ring% margin layer (⑶Uar × ide) 1 1〇 is formed on the upper part of the side wall of the trench 丨 〇8, and the ring-shaped insulating layer i ι〇, for example, using the oxygen method Or chemical vapor deposition to form an oxide layer 1 1 0. The process of ring insulation 2 i 〇 includes the application of various existing formation methods, such as the use of protective layer and sacrificial layer structure to form the ring insulation layer, but there is no certain limit. Then, please Mai according to Figure 2C, the first Stage I ion implantation process: Ions are implanted into the sidewall of the trench 108 at a special incident angle, and the substrate 100 of the sidewall of the trench 108 is covered by a ring-shaped insulating layer 110 kg. ^ σ structure. In order to completely destroy the lattice structure of the trench ^ 8 sidewall not covered by the ring-shaped insulating layer, the substrate 100it can be rotated from 0 °, 90 °, 180 ° at this time. Degrees and 270 degrees were carried out four times into the private clothing. The ions used in the ion implantation process, such as phosphorus ions, Shishen ions, or argon ions or other pure gases that are passive ions, are implanted into the sidewall of the trench 108 at a special incident angle. This specific angle About 0-45 degrees from the normal, the energy of the material implantation will be affected by the ion response and weight.

540106 V. Description of the invention (5) It varies from 5KeV to 60KeV, and the ion implantation dose is between 1E12 and 1E16 atoms / cm2. Then "clearly refer to Figure 2D" to perform the second stage ion implantation process 1 12 to implant the ions vertically into the sidewall of the trench 丨 〇8 to destroy the crystal at the bottom of the substrate 100 Lattice structure. The ions used in the ion implantation process are, for example, phosphorus ions, arsenic ions, or argon ions that are passive ions or other passive ions. The energy of ion implantation will vary depending on the type and weight of the ions. The ion implantation dose is between 5 K e V and 60 Ke V, and the ion implantation dose is between 1E12 and 1E16 atoms / cm2. Please refer to FIG. 2E. After the above-mentioned first and first stage sonless implantation process, the lattice structure of the substrate 100 which is not covered by the ring-shaped insulating layer 110 in the trench 108 will be damaged. Area 丨 丨 4. Next, the substrate 10 () may be cleaned using a dilute HF solution. Finally, please refer to FIG. 2F, and remove the part of the substrate 100 that is not covered by the ring-shaped insulating layer 11 0 in the trench etched by etching. The grid has been destroyed due to the impact of ions. When this last name carving process is performed, there will be an automatic selective effect to completely remove the damaged area Π4. The last name carving agent can use phosphoric acid for meal carving. The effect of the present invention # ^ αλ- 〇a ^ or by the experiment is demonstrated by experiments. Please refer to Figures 3A and 3B to show that it has not undergone and passed the argon ion palladium: Ting value and phosphoric acid etching Scanning electron microscope photo of trench. In Figure 3B, the vanadium-Xie 7 & η # a _ _ ^ mouth τ after lice ion implantation and phosphoric acid etching, the groove I degree is 201 microns, the light stem β is the same, ^ the original 3D Without argon ion

The width of the trench after implantation and acid filling is 1 Q q W —, ^ The visibility is 193 micrometers and 8 micrometers more, which proves that the present invention can consistently increase the surface area of the trenches. #

0548-8141TWF (N); 90060; ycchen.ptd Page 8 540106 V. Description of the invention (6) [Features and advantages of the invention] Compared with the conventional technology, the process of increasing the trench capacitance of the invention is The advantages of the method are at least: (1). The manufacturing process of the present invention is simpler than conventional techniques. (2). The area where the lattice structure is destroyed can be easily and selectively removed by filling with acid. (3). The process of the present invention does not need to add additional chemicals, processes and equipment and is easy to mass produce. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application.

05488141TWF (N); 90060; ycchen.ptd Page 9 540106 Brief Description of Drawings Figures 1 A to 1 C are cross-sectional views showing the process of the traditional method of forming a bottle groove. 2A to 2F are cross-sectional views of a process for increasing trench capacitance according to an embodiment of the present invention. Figure 3A is a scanning electron microscope photograph showing the trench without argon ion implantation and phosphoric acid etching. Figure 3B is a scanning electron microscope photograph showing the trench after argon ion implantation and phosphoric acid etching. [Symbol description] 100 to semiconductor substrate; 106 to pad structure; 102 to hafnium oxide layer; 104 to nitride layer; 108 to trench; 110 to ring insulation layer 111 ~ 1st stage ion implantation process; 1 12 ~ 2nd stage ion implantation process; 1 1 4 ~ area with damaged lattice structure.

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Claims (1)

540106 VI. The scope of the patent application trench electricity includes the upper ion wall of the lower wall to structure; the bottom of the ion channel to the destruction range is silicon-based. 1. The bottom of the trench is implanted into the side of the sidewall of the base. Etching 2. Rucheng, where 3. Rucheng, in which the ion and arsenic species increase the substrate, the trench side first order trench side bottom lattice second order destruction trench removal is subject to the application for the substrate application patent scope first or The process of the second-order ion or inert gas leaving the valley is suitable for a step with an underlayer structure when it is ancient X 丨: a ring-shaped insulating layer is formed at the ^ part; the implantation process is to destroy ions at a specific incident angle. The trench covered by the ring-shaped insulating layer is implanted in a process of implanting ions of the gu gu * tomb directly into the trench-like base lattice structure; and the base portion in the trench. The substrate for increasing trench capacitance as described in item 1. The ion used in the ion implantation process for increasing the trench capacitance as described in item 1 is phosphorus. The process for increasing trench capacitance as described in item 1 of the patent application scope, wherein the specific incident angle is about 0 to 45 degrees from normal. 5. The process for increasing trench capacitance as described in item 1 of the scope of patent application, wherein in the first or second stage ion implantation process, the ion implantation energy is between 5 and 60 KeV. 6 · The process for increasing trench capacitance as described in item 1 of Shen Qing's patent scope, where the first or second stage ion implantation process, the ion implantation dose is between 1E12 and 1E16 atoms / cm2. 7 · The process for increasing trench capacitance as described in item 1 of the scope of the patent application, wherein the removal of the substrate in the damaged trench by etching will use phosphorus 0548-8141TWF (N); 90060; ycchen.ptd Page 11 540106 6. Scope of patent application " One acid to complete. 8. The dream process for increasing trench capacitance as described in item 1 of the patent application scope, wherein the ring-shaped insulating layer is an oxide layer. 9) The process of increasing the trench capacitance as described in item 1 of the scope of the patent application, wherein after the second stage ion implantation process is performed, it further includes a dilute HF solution ) To clean the substrate 1 · The trench capacitance increase process as described in item 1 of the scope of the patent application, where the first stage ion implantation process is performed, and the rotation of the substrate along the axis of the axis by 0 °, 90 ° Degrees, 180 degrees, and 270 degrees, respectively, four implantation procedures. 1 1 · A process for increasing trench capacitance is applicable to a substrate having a pad structure and a trench, including the following steps: ′ ° forming a ring-shaped insulating layer on the upper part of the trench sidewall; performing the first stage ion The implantation process implants ions into the sidewall of the trench at a specific incident angle to destroy the base lattice structure of the trench sidewall that is not covered by the ring-shaped insulating layer. Implanted at the bottom of the trench to destroy the base lattice structure at the bottom of the trench; Use a dilute hydrofluoric acid solution to clean the substrate; and use acid filling to remove the substrate portion in the damaged trench. 12 The process for increasing trench capacitance as described in item 11 of the scope of patent application, wherein the substrate is a silicon substrate. 13. The process for increasing trench capacitance as described in item n of the scope of the patent application, wherein the winter ion used in the first or second stage ion implantation process is phosphorus 540106 6. Scope of patent application Ion, arsenic ion or passivation ion. 1 4 · The process for increasing trench capacitance as described in item 11 of the scope of patent application, wherein the specific incident angle is approximately 0 to 45 degrees from the normal. 15. The process of increasing trench capacitance as described in item 11 of the scope of patent application, wherein in the first or second stage ion implantation process, the ion implantation energy is between 5 and 60 KeV. 16 · The process for increasing the trench capacitance as described in item 11 of the scope of the patent application, which makes the amount of ion implantation agent in the first or second stage ion implantation process 1E12 to 1E16 atoms / cm2. between. 17. The process for increasing trench capacitance as described in item 11 of the scope of patent application, wherein the ring-shaped insulating layer is an oxide layer. t 1 8 · The process for increasing trench capacitance as described in item 11 of the scope of patent application, wherein the first stage of ion implantation process' further includes rotating the substrate along the axis by 0 degrees, 90 degrees, 1 Four ion implantation processes were performed at 80 degrees and 270 degrees.