TW536771B - Integrated circuit testing apparatus and method for semiconductor wafer with auto-reset fuse - Google Patents

Abstract

The present invention is related to integrated circuit testing apparatus and method for semiconductor wafer with auto-reset fuse. The invention is an integrated circuit testing apparatus used in a semiconductor wafer and contains the followings: a tester, which has a test channel to output a test signal provided by the tester; plural probes, in which one end of the probe is electrically connected to the tester channel to share the test signal, and the other end of the probe is electrically connected to plural devices to be tested; and plural auto-reset fuses, which are connected to plural probes respectively. When short-circuit occurs in any one device to be tested, the auto-reset fuse connected to the short-circuited device to be tested will make the other devices to be tested be insulating with the short-circuited device to be tested. Thus, the test error caused by short circuit of device to be tested can be decreased; and the test precision of integrated circuit for the semiconductor is increased.

Description

536771

V. Description of the invention (1) Field of the invention The present invention is a method for testing integrated circuit of integrated circuits for semiconductor wafers, especially an integrated electrical device and method for semiconductor wafers with resettable fuses. & Bie Cheng Background of the Invention A conventional semiconductor wafer integrated circuit test device uses a shared driver signal to test all devices: DUTs. Please refer to the first figure, which is a circuit block diagram of a conventional semiconductor wafer integrated device. As shown in the first figure, the semiconductor wafer discrimination test apparatus 100 includes: a tester 101 and a plurality of probes 104. The tester 101 has a test channel 102. The test Is 101 provides a test signal to be transmitted to the plurality of components under test 10 through the test channel 〇 02 to test whether the plurality of components under test 〇 03 is a normal component. One end of the plurality of probes 104 is electrically connected to the tester channel 102, and the test signal is shared, and the other end is electrically connected to the plurality of components under test 103 respectively. However, during this test, if one of the components under test is a short circuit, the shared test signal becomes a ground signal (generally 0v) because of the short-circuited component under test. This is an important issue to be resolved in this case. In order to avoid the short circuit effect of any DUT, the detection error will be caused. Therefore, the present invention considers and improves in view of the lack of known technology.

536771

The idea of the invention, invented the integrated circuit test device and method of the present invention "" Semiconductor wafer with resettable fuses "Summary of the invention The integrated circuit of the integrated circuit of the present invention is to be disconnected from the short circuit, so as to avoid the cause When the semiconductor component of the resistor of the present invention is short-circuited, the actuation becomes an open circuit in order to provide a test circuit for the short circuit of the remaining element, and the short-circuit of the secondary target wafer should be integrated to prevent and avoid the creation of other probes. : A tester provides a test signal. One end of the plurality of probes is a signal, and the other end is a short-circuit insulation device. The plurality of probes, when any one of them is connected, the short-circuited remote probe and other probes The pin is connected to the measuring element, which is the short circuit of the body circuit to be tested, and the remaining parts are misjudged. When any one of the tested components is short-circuited, the fuse will automatically become one of the probe and other probe extinctions with positive temperature. The concept of a device under test when one of its test components is connected to a device under test. Take several short edges of the test element insulation means. Testing the short circuit of the plurality of circuit insulators through the test means that the product with the component connector misjudges the wafer to have a test track roll out; when the tester channel is under test, the heat of the coefficient of degree with the short circuit The thermistor of any unit under test is from the probe and its body circuit test installation test channel, the test is a plurality of probes, 'share the test; and a plurality of individual units under test are connected to the plurality of short circuits to be tested. Component connection ^ 536771 V. Description of the invention (3) According to the above concept, the short-circuit insulation device is a fuse according to the above concept. According to the above concept, the open circuit is connected to the short-circuited DUT. Zhang Mu < wherein the short-circuit insulation device is a self-recovery protection melon, wherein the plurality of short-circuit insulation nightmare is connected between the plurality of probes and the waiting-for-test element. , ', Is different. According to the above concept, the plurality of short circuits are connected between the plurality of probes and the tester. & is not based on the above concept, where the short-circuit insulation resistance is a thermistor electric number according to the above concept 'where the thermistor has -positive temperature system where the standby system is-semiconductor crystal One of the integrated circuits according to the above concept is that the probe is electrically connected to the DUT. According to the above idea, a pad. Road test method, package :; supply: J semiconductor wafer integrated semiconductor conductor wafer has a plurality of components to be tested; mention; == bulk wafer, the 4 circuit test device, the integrated circuit test device is ancient A probe is deposited on a 2-body wafer, and the tester has a test channel; =: The tester and the complex number are rotated out through the test channel, and the plurality of devices provide a -test = device channel, sharing the The test signal terminal is an electrical connection, a plurality of components to be tested; when any one is to be tested; part number = 536771 V. Description of the invention (4) The short-circuited unit under test according to the above-mentioned device further includes a complex system to connect the short circuit The component to be tested is based on the short-circuit insulation according to the above-mentioned fuse. Connect the plurality of probes according to the above and connect the plurality of probes according to the above according to the above. Based on the above number. According to the above one welding grate. According to the above test device, the circuit is disconnected. The concept of the connection of several pieces. The concept of the connection of several short and multiple test elements. The concept of the conception. The conception of the waiting concept and the conception of the conception of the conception. insulation. The integrated circuit of the insulated conductor wafer tests the phases of the plurality of short-circuit insulation devices. When any one of the components under test is short-circuited, the short-circuit insulation device is connected to the short probe and other components. Probe insulation. Among them, an open circuit is connected to the short-circuited DUT. The short-circuit insulation device is a re-protection device, and the short-circuit insulation device is connected between the measuring elements, respectively. Among them, the plurality of short-circuit insulation devices are respectively between the testers. 'Where the short-circuit insulation device is a thermistor', where the thermistor has a positive temperature system, 'where the probe is electrically connected to the device under test', and where the plurality of test voltages are tested at the test signal Signal to test the short-circuit insulation device connected to the plurality of elements under test—

Page 7 536771 V. Description of the invention (5) This case can be understood in more detail by the following diagram and detailed description. Description of pictographs 100: Semiconductor wafer integrated circuit test device 102: Test channel 1 104: Probe 2 01: Tester 2 03: Resettable fuse 2 0 5: Preferred embodiment of the device under test Explanation 1 〇1: Tester 103. DUT 200: Integrated circuit test device for semiconductor wafers 2 02: Probe 204: Please refer to the first figure for the test channel. Circuit diagram of integrated circuit test device for resettable fuse semiconductor wafer. As shown in the second figure, a semiconductor wafer integrated circuit test device 200 includes a tester 201, a probe card, and a plurality of probes 202 and A plurality of self-resetting fuses (other 1: 0—1 ^ 34 f use) 203. The tester 201 has a tester cannel 204 ′. The tester 201 provides a shared test signal to be outputted through the tester channel 204. The probe card is electrically connected to the test cry channel 2 04,

Page 8 536771

: Dry the test signal, and the plurality of probes 202 are electrically connected to a plurality of {Measurement members 205, respectively. And, the plurality of resettable fuses 203 are connected to a plurality of probes 202, respectively. The plurality of self-resetting fuses 203 are in normal working state = medium, and its resistance value is close to zero. However, when any one of the components under test is short-circuited, the self-resetting fuse connected to the short-circuited component under test has a great value. ^ Resistance value, the short-circuit path is an open circuit, so that the probe connected to the short-circuited DUT is insulated from other probes. Among them, the plurality of resettable fuses 203 can be a thermistor with a positive temperature coefficient, so that the thermistor connected to the short-circuited device under test can instantly increase the thermistor due to a short-circuit current to a maximum. The resistance value provides electrical insulation protection to avoid interfering with the detection of other components under test. The self-resetting fuse can be connected between the plurality of probes and the waiting test piece (not shown in the figure), or between the plurality of probes and the tester. In addition, the device under test is an integrated circuit of a semiconductor wafer. And the delta probe is electrically connected to a pad of the component under test. Please refer to the third figure, which is a characteristic curve of a positive temperature coefficient thermistor. The positive temperature coefficient thermistor is a typical current limiter. When an overcurrent occurs, the thermistor will instantly increase & the resistance (become a high impedance instantly) due to overheating, so that the connection circuit becomes Once the circuit is disconnected, the thermistor will return to its original resistance value once the overcurrent condition is removed. This phenomenon of sharply increasing the resistance value of a thermistor is usually called tripping (t r i pp i ng). And the thermistor returns from a high resistance value state (tnpping state) to a low resistance state at normal room temperature 536771

Therefore, according to this characteristic, it is described as V. Invention description (7) is very fast.-Self-recovery insurance. Therefore, you must first benefit from the short current and immediately disturb the test component connected to the test signal synthesis front component. The detection error of the case is true. However, the product does not deviate from the case. It only takes about 100 ms. (It is very suitable to use a test signal to use the positive path to stay high. The hot number is described. As a result of the difference in the probe measurement, although the circuit test is intended to protect the remaining test results of the phase resistance value of the voltage signal measurement element that is well-known with the application, by judging with other detection errors. Raise the product to be tested Electric test device also. The patent range number of this technology tests this, tests the connection, and provides the positive self-recovery fuse of the electrical component to become electrical. This can reduce the component's road inspection test equipment, which can have multiple thermal sensors. Electrical insulation often test wire can make insulation. Due to short circuit test accuracy, only a plurality of test elements are included. Because of protection, 0 and this short avoid test elements. 0 Includes one test The member-based short-circuit path to be tested to avoid dry rest member is made, again, is also applied to any persons but to all sorts of modifications Carpenter thinking desired protector.

536771 Brief description of the diagram The first diagram is a circuit block diagram of a conventional integrated circuit test device for semiconductor wafers. The second figure is a circuit block diagram of a semiconductor wafer integrated circuit test device with a resettable fuse in a preferred embodiment of the present case. The third figure is a characteristic curve of a positive temperature coefficient thermistor.

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Claims (1)

536771 Old patent application scope 1. Kind of semiconductor integrated circuit test device called κ, a tester, the tester has a test pass 1 and a test signal is output through the test channel; 4 nano-type devices provide multiple Probes, the plurality of probes; sharing the test signal, the other end is a splitter element, and J electrical connection to the plurality of short-circuit insulation devices to be moved, the plurality of short connections to the plurality of probes, when The I, and the device are connected to the components to be tested separately: the :: absolutely; the probe connected to the short element and other probes = the system is to be connected to the short circuit, please: Scope 1 The integrated circuit of the semiconductor wafer described in the above item, the device and the short circuit of the integrated circuit of the device under test are set to an open circuit. The short-circuit insulation device connected 3. As described in item 丨 of the scope of application for patents: The short-circuit insulation device in the installation factory is integrated with a conductor, Ding Cheng, a plurality of short-circuit insulation, between the eight probes and the waiting device . The device is connected to the plurality by a knife 5. The half-type device described in item 丨 of the scope of the patent application, wherein the plurality of short-circuit insulation: integrated circuit test probe and the tester. The test device is connected to the plurality of 6. The test device described in item 丨 of the scope of the patent application, wherein the short circuit absolute% f conductor is measured by the integrated circuit of the semiconductor ... Body circuit test device on page 12, where the thermistor and 8. The positive temperature coefficient as described in item i of the patent application scope. A test device in which the integrated circuit of the component under test and the conductor wafer is tested. ', Ma-one of the semiconductor wafers integrated electricity 9. As described in the patent application scope of the first test device, wherein the probe is an electrical conductor wafer integrated circuit test 1 〇.-A semiconductor crystal Round integrated circuit; components and steps: a non-testing method including the following steps to provide the semiconductor wafer; a cattle conductor wafer has a plurality of cells to be tested and a semiconductor wafer integrated testing device having a tester And a plurality of J: test devices, the integrated circuit test channel, the tester provides one, two, ten, the tester has one test: several probes, one end is electrically connected: the output is m channels, η, two One: The two probes are electrically connected to the probes of the plurality of Qi and the other probes are insulated from other probes. Unscrupulous • Rushen's Patent Scope Item 10: The second test method of the integrated circuit test device for semiconductor wafers. When any one of the components under test is short-circuited, it is equal to the number of probes. The short-circuit insulation device of J is to insulate the j-probe and other probes from the short-term object to be tested. The circuit of the circuit under test is connected to the integrated circuit as described in item 丨 丨 of the scope of patent application 536771 6. The scope of patent application: The short-circuit insulation device connected to the component under test is disconnected. 1 3. The integrated circuit test method as described in item 丨 丨 of the patent scope, in which μ ugly road ^ Yi Yuan Pei is a resettable fuse. 14. For example, please refer to the integrated circuit test method described in item 11 of the patent scope, in which the ~ t road insulation device is respectively connected between the plurality of probes and the waiting device. 15 'The integrated circuit test method according to item 11 of the declared patent scope, wherein the plurality of short-circuit insulation devices are respectively connected between the plurality of testers. I /, / Call 16. As described in the integrated circuit test method described in item 11 of the scope of patent application, the short-circuit device in i is a thermistor. ′, 17 • The integrated circuit test method described in item 16 of the scope of the patent application, which shall be used in the bean. The thermistor has a positive temperature coefficient. According to the method, the probe ^ is electrically connected to one of the pads of the component under test in the integrated circuit test 1 described in item 1 of the patent application scope.彳 ', 1 9 · The integrated circuit T as described in item 丨 丨 of the scope of application for patents. Steps, test the multiple benefits at the test signal, ram the brake field M server / then 70 short invitations η The voltage ㈣ is used to test the plurality of components to be tested, and the short-circuit insulation device connected to the component to be tested is opened. Page 14