經濟部智慧財產局員工消費合作社印製Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs
535215 A7 B7535215 A7 B7
發明領域： 本發明係有關於-種光阻平坦化之方法，特別是有關 於-種在半導體製程中，用以完全消除當塗佈光阻於不同 被度的孔洞上時所產生之階梯高度（step Height)之方法。 發明背景： 在整個半導體的製程中，微影是舉足輕重的步驟之 。舉凡與金氧半導體元件的結構有關的製程，大都是由 微影這個步驟所決定。目此可用一製程所需經過的微影次 數或所需要的光罩數量來表示此製程的難易程度。 微影的原理如下：事先需在晶圓的表面上覆蓋一層曝 光材料，此曝光材料稱為光阻。|自光源的平行光經過光 罩上的圖形後，打在光阻上，使光阻進行選擇性的曝光， 於是光罩上的圖形便完整的轉移至光阻上。 上述覆蓋光阻的步驟是半導體製程中必要的過程之 一。請參考第丨圖，其為習知塗佈光阻於具有不同密度的 孔洞後產生階梯南度之結構剖面圖。基材丨〇係例如為半導 體結構中之氧化層、多晶矽層、或金屬層等。此基材丨〇上 具有複數個孔洞20，且這些孔洞20可分為孤立型孔洞3〇 與密集型孔洞40兩類。孤立型孔洞3〇表示其附近僅存在 單一個孔洞20，而密集型孔洞40則表示至少存在兩個孔 洞20，且彼此僅隔微小距離。無論是孤立型孔洞3〇或密 集型孔洞40，實際上皆例如可為接觸洞（c〇ntact H〇les)或 介層洞（Via Holes)。 2 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂· 經濟部智慧財產局員工消費合作社印製 535215 A 7 B7 五、發明説明（） 塗佈光阻50之前，需先進行預潤溼（pre_wetting)步 驟，藉以喷灑溶劑於基材10上。藉由此預潤溼之步驟，可 大幅節省後續製程中光阻50之用量。接著，塗佈光阻5〇， 使其填入孔洞2 0中，並覆蓋基材i 〇，其中此塗佈光阻5 〇 之步驟例如可使用旋塗法（SPin-c〇ating)。由於孤立型孔洞 30與密集型孔洞40的孔洞20之密度相差甚大，因此當此 塗佈過程結束時，基材10會由旋轉狀態回復靜止狀態，而 光阻50大量回流（Re_fi〇w)至密集型孔洞4〇區域之孔洞2〇 中，因而造成階梯高度5 5。 上述階梯咼度5 5之現象對各種不同之後續製程主要具 有兩大缺點：其一為钱刻不均勻，另一則為聚焦不正確。 為了消除階梯高度55，習知係採用反覆進行數次回钱與光 阻塗佈之方法。亦即，在產生階梯高度55之後，將基材1〇 移至#刻機台進行回蝕。然後，又令基材1 〇至微影機台進 行光阻塗佈。如此，反覆進行數個循環，可藉以逐漸減小 階梯尚度5 5。然而，此法僅能逐漸減小階梯高度$ $，卻不 能令其完全消除。此外，此法進行時需令基材1 〇反覆在餘 刻機台與微影機台間移動，如此不僅浪費製程時間，且大 幅提高製造成本。因此，有必要尋求解決之道。 發明目的及概述： 黎於上述發明背景中，習知用以消除階梯高度之方法 不僅無法令階梯咼度完全消除’且浪費製程時間，並會提 高製造成本。因此本發明之一目的為提供一種光阻平坦化 …i…Γ.....MW.........訂…......線· (請先閱讀背面之注意事項再填寫本頁)Field of the Invention: The present invention relates to a method for flattening a photoresist, and particularly to a method for completely eliminating a step height generated when a photoresist is coated on a hole of a different degree in a semiconductor process. (Step Height) method. BACKGROUND OF THE INVENTION: Lithography is an important step in the entire semiconductor manufacturing process. For example, the processes related to the structure of metal-oxide semiconductor devices are mostly determined by this step. The difficulty of this process can be represented by the number of lithography times required by a process or the number of photomasks required. The principle of lithography is as follows: the surface of the wafer needs to be covered with a layer of exposure material in advance. This exposure material is called photoresist. | After the parallel light from the light source passes through the pattern on the mask, it hits the photoresist to make the photoresist selectively exposed, so the pattern on the mask is completely transferred to the photoresist. The step of covering the photoresist is one of the necessary processes in the semiconductor process. Please refer to FIG. 丨, which is a cross-sectional view of a conventional structure that produces step southness after applying photoresist to holes with different densities. The substrate is, for example, an oxide layer, a polycrystalline silicon layer, or a metal layer in a semiconductor structure. There are a plurality of holes 20 on the substrate, and these holes 20 can be divided into two types: isolated holes 30 and dense holes 40. An isolated hole 30 indicates that there is only a single hole 20 in the vicinity, and a dense hole 40 indicates that there are at least two holes 20 at a slight distance from each other. Whether it is an isolated hole 30 or a dense hole 40, it can actually be, for example, a contact hole (via hole) or a via hole (via hole). 2 This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling out this page) Order · Printed by the Intellectual Property Bureau Staff Consumer Cooperative of the Ministry of Economic Affairs 535215 A 7 B7 V. Invention Note () Before applying the photoresist 50, a pre-wetting step is required to spray the solvent on the substrate 10. Through this pre-wetting step, the amount of photoresist 50 in subsequent processes can be greatly saved. Next, a photoresist 50 is applied to fill the holes 20 and cover the substrate i0. The step of applying the photoresist 50 can be performed by a spin coating method, for example. Because the density of the isolated holes 30 and the holes 20 of the dense holes 40 are very different, when the coating process is finished, the substrate 10 will return to the stationary state from the rotating state, and the photoresist 50 will reflow in a large amount (Re_fi0w) to The dense hole 40 area has holes 20 in it, which results in a step height of 55. The above-mentioned phenomenon of the step angle of 55 has two major disadvantages for various subsequent processes: one is that the money is unevenly carved, and the other is that the focus is incorrect. In order to eliminate the step height 55, the conventional method uses a method of repeatedly returning money and photoresist coating several times. That is, after the step height 55 is generated, the substrate 10 is moved to a #etching machine for etchback. Then, the substrate 10 was subjected to photoresist coating on the lithography machine. In this way, several cycles are repeatedly performed, thereby gradually reducing the step tolerance 5 5. However, this method can only gradually reduce the step height $$, but it cannot completely eliminate it. In addition, when this method is performed, the substrate 10 needs to be repeatedly moved between the remaining machine and the lithography machine, which not only wastes processing time, but also greatly increases manufacturing costs. Therefore, it is necessary to find a solution. Objectives and Summary of the Invention: In the above background of the invention, the conventional method for eliminating step heights not only fails to completely eliminate step angles, 'but also wastes processing time, and increases manufacturing costs. Therefore, one object of the present invention is to provide a photoresist flattening ... i ... Γ ..... MW ......... order ......... line · (Please read the precautions on the back first (Fill in this page again)
535215 A7 B7 五、發明説明（ 之方法，可用以完全消除當塗佈光阻於不同密度的孔洞上 時所產生之階梯高度。 本發明之另一目的為提供一種光阻平坦化之方法，可 用以簡化習知為了消除階梯高度所進行之冗長製程，因而 縮短製程時間，進而降低製造成本。 依據本發明之上述㈣，本發明提供一種光阻平 坦化之方法，至少包括下列步驟：首《，提供基材，此基 材上具有複數個孔洞；接著，形成第一光阻，使其填入上 述孔洞中，並覆蓋基材；接著，進行曝光/顯影步驟，使約 暴露基材，並留下孔洞中之部份第一光阻，且此曝光步驟 中並未使用光罩；&著，熱處理孔洞中之部份第—光阻， 其中此熱處理製程例如可使用熱墊板（H〇t piate)之硬烤 (Hud Bake)製程，且熱處理之溫度與時間例如可分別為約 200°C至約28〇t與約60秒至約180秒；然後，形成第二 光阻’使覆蓋基材與孔洞中之部份第一光阻。 圖式簡單說明： 本發明的較佳實施例將於往後之說明文字中輔以下列 圖示做更詳細的闡述，其中·· 第1圖係繪示習知塗佈光阻於具有不同密度的孔洞後 產生階梯高度之結構剖面圖；以及 第2A圖至第2E圖係繪示本發明之一較佳實施例之使 塗佈於不_度的孔洞上^阻平坦化之方法的結構剖面 圖0 本紙張尺度適用中國國家標準(CNS)A4規格(210χ 297公楚） (請先閲讀背面之注意事項再填寫本頁) -訂· 經濟部智慧財產局員工消費合作社印製 535215 A7 B7 五、 發明説明（） 圖號對照說明： 10 基材 3 〇 孤立裂孔洞 50 光阻 11 〇基材 13 〇孤立型孔洞 15 〇光阻 1 6 0光阻 M0硬烤裝置 20 孔洞 40 密集型孔洞 5 5 階梯高度 120孔洞 1 4 0密集型孔洞 155階梯高度 1 7 0光阻 190光阻 經濟部智慧財產局員工消費合作社印製 發明詳細說明： 本發明係有關於一種在半導體製程中 佈光阻於不同密度的孔洞上時所產生之階梯高度之方法。 本發明之方法所包括之步驟可參考第2A圖至第2E圖所繪 不的本發明之一較佳實施例之使塗佈於不同密度的孔洞上 之光阻平坦化之方法的結構剖面圖。首先，如第2a圖所 不，提供基材1 1 〇，例如為半導體結構中之氧化層、多晶 矽層、或金屬層等。此基材110上具有複數個孔洞12q， 且這些孔洞120可分為孤立型孔洞13〇與密集型孔洞ι4〇 兩類。孤立型孔洞130表示其附近僅存在單一個孔洞12〇， 而密集型孔洞140則表示至少存在兩個孔洞12〇，且彼此 僅隔微小距離。無論是孤立型孔洞13〇或密集型孔洞14〇， 實際上皆例如可為接觸洞或介層洞。 接著，進行預潤溼步驟，藉以喷灑溶劑（未繪示）於基材 用以消除當塗 —— ......t.....-…訂.........線# (請先閱讀背面之注意事項再填寫本頁} A7535215 A7 B7 V. Description of the invention (The method can be used to completely eliminate the step height generated when coating photoresist on holes of different densities. Another object of the present invention is to provide a method for flattening photoresist, which can be used In order to simplify the conventional process to eliminate the tedious process of the step height, the process time is shortened, and the manufacturing cost is reduced. According to the above-mentioned aspect of the present invention, the present invention provides a method for planarizing photoresist, which includes at least the following steps: A substrate is provided, the substrate has a plurality of holes; then, a first photoresist is formed to fill the holes and cover the substrate; then, an exposure / development step is performed to expose the substrate and leave Part of the first photoresist in the lower hole, and a photomask is not used in this exposure step; & heat treatment of the first photoresist in part of the hole, wherein the heat treatment process can use a thermal pad (H. t piate) Hud Bake process, and the temperature and time of the heat treatment may be, for example, about 200 ° C to about 280t and about 60 seconds to about 180 seconds; then, a second photoresist is formed. Make the covering substrate and the first photoresist in the holes. Brief description of the drawings: The preferred embodiment of the present invention will be described in more detail in the following explanatory text with the following illustrations, where: FIG. 1 is a cross-sectional view showing a structure of a conventional application of photoresist to produce a step height after holes having different densities; and FIGS. 2A to 2E are drawings showing a preferred embodiment of the present invention. Structural cross-sectional view of the method of ^ resistance flattening on non-degree holes 0 This paper size applies to Chinese National Standard (CNS) A4 specifications (210 × 297 cm) (Please read the precautions on the back before filling this page)-Order · Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 535215 A7 B7 V. Description of the invention () Drawing number comparison description: 10 substrate 3 〇 isolated crack holes 50 photoresist 11 〇 substrate 13 〇 isolated holes 15 〇 photoresist 1 6 0 Photoresistance M0 Hard roasting device 20 Holes 40 Dense holes 5 5 Step height 120 holes 1 4 0 Dense holes 155 Step height 1 7 0 Photoresistor 190 Photoresist Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs : This invention is A method of step height generated when a photoresist is arranged on holes of different densities in a semiconductor process. The steps included in the method of the present invention can refer to one of the present inventions not shown in FIGS. 2A to 2E. A structural sectional view of a method for flattening a photoresist coated on holes of different densities according to a preferred embodiment. First, as shown in FIG. 2a, a substrate 1 1 10 is provided, such as an oxide layer in a semiconductor structure, A polycrystalline silicon layer, or a metal layer, etc. The substrate 110 has a plurality of holes 12q, and the holes 120 can be divided into two types: isolated holes 13o and dense holes 4o. The isolated hole 130 indicates that there is only a single hole 12o in the vicinity, and the dense hole 140 indicates that there are at least two holes 120, and only a small distance from each other. Whether it is an isolated hole 13 or a dense hole 14, it can be, for example, a contact hole or a via hole. Then, a pre-wetting step is performed, by which a solvent (not shown) is sprayed on the substrate to eliminate the coating --- t .....-... order ........ . 线 # (Please read the notes on the back before filling this page} A7
^35215 五、發明説明（） 上藉由此預，閏溼步驟，可大幅節省後續製程中光阻 之用里接著，如第2B圖所示，形成光阻！ 5〇，使其填入 孔/同120中’並覆蓋基材1 1〇，其中此形成光阻150之步 驟例如可使用方疋塗法。由於孤立型孔洞工3 〇與密集型孔洞 〇的孔㈤1 2 0之绝、度相差甚大，因此當此塗佈過程結束 時’基材110會由旋轉狀態回復靜止狀態，而光阻15〇大 量回流至密集型孔洞14〇區域之孔洞12〇中，因而造成階 梯南度1 5 5。 然後，在未使用光罩之情況下，進行曝光/顯影步驟。 藉由曝光能量之控制，使約暴露基材n 〇，並使光阻1 5〇 在顯衫後剩下如第2C圖所示之光阻丨6〇(位於孤立型孔洞 130中）與光阻170(位於密集型孔洞14〇中），其中光阻16〇 與光阻170之高度幾乎相同。此未使用光罩之曝光/顯影步 驟係本發明之主要特徵之一。 接著，如第2D圖所示，以硬烤裝置j 8〇進行本發明之 另一主要特徵之高溫熱處理製程，藉以驅趕出光阻丨與 光阻170中之上述溶劑，並使光阻16〇與光阻17〇硬化。 右未進行此高溫熱處理製程就立刻進行後續的另一預濕潤 步驟，則光阻160與光阻170中將因仍含有溶劑而導致光 阻1 60與光阻1 70被另一預濕潤步驟中所使用之溶劑溶 解，如此又回復至第2A圖之狀況。因此，此處高溫熱處理 製程係為本發明中之必要且重要特徵。再者，此高溫熱處 理製程之溫度例如為約20(TC至約28(rc，而時間則例如$ 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) —— ......Φ.........、可.........線« (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 535215 五、發明説明（） 約60秒至18〇秒。此外，上述硬 熱墊板，然不限定於此。 、8〇通常例如是指 然後，進行另一預潤漫步驟。接著，如第 塗佈光阻190,使其覆蓋基材11〇、光 厅不， .^ 160、以及光阻17η 其中此塗佈光阻190之步驟例如可使 170， 用方疋塗法。由於 型孔洞130中的光阻160與密隼刮多丨、门 ^孤立 心. 孔洞140中的光阻〗7n 兩者已藉由上述本發明之先前製程形成幾乎相等之言 因此光阻190不會形成如第i圖中習知之階梯高度^度’ 外，施行本發明之方法時係在同一機台上便可完成所有^ 驟，即不需如習知-樣在不同機台上反覆進行數次光阻： 佈與回姓之步驟’因此可大幅縮短製程時間，並降低製造 成本。 上述本發明之方法可廣泛應用於各類製程中，且較習 知方法簡易。運用本發明之方法以使塗佈之光阻完全平坦 化之後，可藉以避免後續曝光製程中產生聚焦不準確及光 阻擺盪效應（Swing Effect)，而造成此光阻無法用於後續製 程中。所謂擺盪效應係指光源透過光罩射至光阻上所成之 像的關鍵尺寸（Critical Dimension ; CD)隨著光阻的厚度而 變之現象。兩個可應用本發明之實例如下所述。 第一個實例為先形成介層之雙鑲嵌銅技術（Via_first Dual Damascene Cu Technology)。在此技術中，係先形成 介層洞，然後再形成溝槽（Trench)。在形成介層洞的過程 中，即使在基材上同時具有如前述之單一孤立型介層洞與 本紙張尺度適用中國國家標準(CNS)A4規格(210X 297公釐) (請先閱讀背面之注意事項再填寫本頁j -訂· 經濟部智慧財產局員工消費合作社印製 535215 A7^ 35215 V. Explanation of the invention () Based on this prediction and wetting step, the photoresist in the subsequent process can be greatly saved. Then, as shown in Figure 2B, a photoresist is formed! It is filled with 50% of holes / same as 120 'and covered with the substrate 110, wherein the step of forming the photoresist 150 can be performed by, for example, a square coating method. Due to the extreme difference in the degree of insulation between the isolated hole workers 3 and the dense holes 0 1 2 0, when the coating process is completed, the substrate 110 will return to the stationary state from the rotating state, and the photoresistance will be a large amount of 15 Backflow into the hole 120 in the dense hole 14 area, resulting in a step south of 155. Then, without using a photomask, an exposure / development step is performed. Through the control of the exposure energy, the substrate n 0 is exposed, and the photoresist 150 is left behind after the shirt is exposed. As shown in FIG. 2C, the photoresist 60 (located in the isolated hole 130) and light Resistor 170 (located in the dense hole 14), wherein the height of the photoresistor 160 and the photoresistor 170 is almost the same. This unmasked exposure / development step is one of the main features of the present invention. Next, as shown in FIG. 2D, a high-temperature heat treatment process of another main feature of the present invention is performed with a hard roasting device j 80 to drive out the above solvents in the photoresist 丨 and photoresist 170, and make the photoresist 16 and The photoresist 17 is hardened. Right before the high-temperature heat treatment process is performed, another subsequent pre-wetting step is performed immediately. Then, the photoresist 160 and the photoresist 170 will still contain the photoresist 1 60 and the photo resist 1 70 in another pre-wetting step. The solvent used is dissolved, so it returns to the state of Figure 2A. Therefore, the high temperature heat treatment process here is a necessary and important feature in the present invention. Moreover, the temperature of this high-temperature heat treatment process is, for example, about 20 (TC to about 28 (rc), and the time is, for example, $ This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) ——... .Φ ........., but ......... line «(Please read the notes on the back before filling out this page) Printed by the Intellectual Property Bureau Employee Consumer Cooperative of the Ministry of Economic Affairs 535215 V. Description of the invention () About 60 seconds to 180 seconds. In addition, the above-mentioned hard and hot pad is not limited to this. 80 usually means, for example, then performing another pre-lubricating step. Then, as described in the first application of light Resist 190, so that it covers the substrate 11, the light hall does not,. ^ 160, and the photoresist 17η. The step of applying the photoresist 190 may be 170, for example, using a square coating method. Due to the light in the cavity 130 The resistance 160 and the dense gate are isolated, and the gate ^ is isolated. The photoresist in the hole 140 7n has been formed almost equal by the previous process of the present invention, so the photoresist 190 will not be formed as shown in the figure i. In addition to the known step height ^ ', all the steps can be completed on the same machine when the method of the present invention is implemented, that is, it does not need to be the same as in the conventional method. The photoresist is repeatedly performed on the machine several times: The steps of disposing and returning the last name can therefore greatly reduce the process time and reduce the manufacturing cost. The method of the present invention can be widely used in various processes and is simpler than conventional methods. After the method of the present invention is used to completely flatten the coated photoresist, it is possible to avoid inaccurate focusing and a photoresist swing effect in the subsequent exposure process, so that the photoresist cannot be used in the subsequent process. The so-called swing effect refers to a phenomenon in which the critical dimension (CD) of an image formed by a light source passing through a photomask onto a photoresist varies with the thickness of the photoresist. Two examples of the present invention are applicable as follows. The first example is Via_first Dual Damascene Cu Technology. In this technology, a via hole is formed first, and then a trench is formed. In the process of forming a via hole Medium, even if there is a single isolated via hole on the substrate and the paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) (please read the back Please fill in this page for the matters needing attention.-Ordered by the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the Employees' Cooperatives. 535215 A7
五、發明説明（） 夕個密集型介層洞，運用本發明之方法可使塗佈之光阻具 有極佳的平坦度，且完全解決聚焦不準確及光阻擺盈效應 夂問題。 •第二個實例為金屬·絕緣體-金屬電容器技術（Metal_ msiilator-metal Capacitor)。在此技術中，係先於基材上形 成接觸洞，然後再共形地（Conformal)沉積一層薄下電極材 質（如TiN或TiN/W等）以覆蓋基材以及接觸洞之側壁與底 部。接著，塗佈光阻以填滿接觸洞並覆蓋上述下電極材質。 此時’若這些接觸洞同時包括孤立型與密集型兩種類型， 則孤立型接觸洞上的光阻高度會高於密集型接觸洞上的光 阻高度，因而產生階梯高度。此金屬·絕緣體-金屬電容器 製程中所產生之階梯高度若不設法解決，則經由後續部份 光阻回蝕、部份下電極材質回蝕、以及去光阻等過程而形 成所需下電極之高度將視下電極是位於孤立型接觸洞中< 是密集型接觸洞中而有所不同。反之，若以本發明之方法 去除上述階梯高度，則形成之下電極的高度將不會因為是 位於孤立型接觸洞中或是密集型接觸洞中而有所不同。 綜合上述，本發明之一優點為提供一種光阻平坦化之 方法，可用以完全消除當塗佈光阻於不同密度的孔洞上時 所產生之階梯高度。 本發明之另一優點為提供一種光阻平坦化之方法，$ 用以簡化鸷知為了消除階梯高度所進行之冗長製程，因而 縮短製程時間，進而降低製造成本。 8 本紙張尺度適用中國國家標準(CNS)A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁} 聲 -訂· 經濟部智慧財產局員工消費合作社印製 535215 A7 B7 五、發明説明（） 如熟悉此技術之人員所瞭解的，以上所述僅為本發明 已 以 用 UF 並 揭之 所述 明下 發在 本含 離包 而脫應 例未均 施它 ， 實其飾 佳凡修 較；或 之圍變 範改 利效 專等 請之 申成。 之完内 明所圍 發下範 本神利 定精專 限之請 示申 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210Χ 297公釐)V. Description of the invention (1) For the dense via hole, the method of the invention can be used to make the coated photoresist have excellent flatness, and completely solve the problems of inaccurate focusing and photoresistance swing effect. • The second example is metal-insulator-metal capacitor technology (Metal_msiilator-metal Capacitor). In this technique, a contact hole is formed on the substrate, and then a thin layer of a lower electrode material (such as TiN or TiN / W) is conformally deposited to cover the substrate and the sidewalls and bottom of the contact hole. Then, a photoresist is applied to fill the contact hole and cover the above-mentioned lower electrode material. At this time, if these contact holes include both an isolated type and a dense type, the photoresist height on the isolated contact hole will be higher than the photoresist height on the dense contact hole, and a step height will be generated. If the step height generated in this metal-insulator-metal capacitor manufacturing process is not managed, the required lower electrode will be formed by subsequent photoresist etchback, some lower electrode material etchback, and photoresist removal. The height will vary depending on whether the electrode is located in an isolated contact hole < is a dense contact hole. On the contrary, if the above-mentioned step height is removed by the method of the present invention, the height of the lower electrode formed will not be different because it is located in an isolated contact hole or a dense contact hole. To sum up, one advantage of the present invention is to provide a method of photoresist planarization, which can completely eliminate the step height generated when photoresist is applied to holes of different densities. Another advantage of the present invention is to provide a method for flattening the photoresist, which is used to simplify the long and tedious process of eliminating the step height, thereby shortening the process time and reducing the manufacturing cost. 8 This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling out this page) Sound-Order · Printed by the Intellectual Property Bureau Staff Consumer Cooperative of the Ministry of Economic Affairs 535215 A7 B7 V. Description of the Invention () As understood by those familiar with this technology, the above is only for the present invention, which has been issued with UF and disclosed in this release. Jiafan repairs; or changes to the Fan Fanli benefits, etc. Please apply for the application. At the end of the application, please send out the application of the template Shenliding fine limit (please read the precautions on the back before filling in this page) ) The paper size printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs applies to the Chinese National Standard (CNS) A4 specification (210 × 297 mm)