A 442 7 6 A7 ____ B7 經潢部中次標嗥局負^-消费合作社印紫 五、發明説明（l) 本發明是有關於一種半導體積體電路的沈積技 術，且特別是有關於一種可兼顧接觸窗底部和側壁覆蓋 率的兩階段離子金屬電漿濺链方’法乂 在現今積體電路之產屬—化^程中，鋁和鎢可說是最 常使用的兩種金屬材料。其中，鋁因為電阻率（resistivity) 較低，所以主要是做為元件間的導線之用，且大多是以 濺鍍法來沈積成的；而鎢的電阻率雖較高，但由於可利 用化學氣相沈積（CVD)法來形成，其步階覆蓋能力（step coverage)較佳，加上本身極易形成具較高揮發性的氟化 物，沒有蝕刻去除上的困難，因此也廣為應用於作為不 同金屬層間的(plug)，以便將各層金屬加以連 接。然而’紹與矽的接觸界面會因為後續加熱程序而彼 此互相擴散，形成尖峰（spike)現象，易造成短路而影響 元件性質，加上鎢與其他材質（例如矽）的附著力 (adhesion)也不十分理想，所以在使用鋁及鎢這兩種金屬 時’通常會在其與他種材質之間，再增加一層稱為「j 著_/擴散阻障層」的導電材料，以避免鋁矽界面產生尖峰 現象’及提升鎢對其它材質的附著能力。 —般半導體的金屬化製程中’主要是利用物理氣相 沈積（PVD)技術，例如電子束蒸鍍（eleetr〇n beam evaporation)方法或是漱鍍（SpUttering)方法來形成黏著/ 擴散阻障金屬薄層的。其中賤鑛方法是以電漿所產生的 離子轟擊陰極上的金屬耙而擊出金屬原子，然後被擊出 的金屬原子沈積到陽極上的半導體基底表面來形成一 (請先閲讀背而之注意事項再填寫本頁) ,-β 線. 本紙張尺庾適用中國國家標舉（CNS ) Μ規格（2!OX297公嫠〉 4442 7 6 經溁部中央標準局一貝工消合作社印製 A7 B7 ___ 五、發明説明（2 ) 金屬薄層=然而，隨著元件尺寸縮小化的發展，目前製 程上常用的準直管（coUimator)濺鍍技術，或是長射程 (long throw)滅錢技術，在應用；^縱橫比（aspect ratio)較 大的接觸窗製程時，會產生底部覆蓋率不佳的問題。 為了清楚說明，請參照第1圖，顯示習知濺鍍裝置 的示意圖。習知的濺鍍裝置主要包括一反應室12、一放 置座1 4、以及一金屬靶2 (例如鈦、鋁等金屬）。其中反 應室12具有一氣體入口 122及一氣體出口 124。氣體可 經上述氣體入口 122而導入上述反應室12内，並藉由真 空泵（未顯示）從上述氣體出口 124將氣體抽出。上述放 置座14係設置於反應室12内且與金屬靶2相對，用以 放置半導體基底（例如一矽晶圓）4，並可藉由真空方式將 上述基底4吸附於放置座14上。當進行沈積時，通常先 以高真空泵將反應室的的壓力降到10-6Torr以下，再通 入適當的鈍氣，而在壓力約1〜1〇 mTorr的環境中進行金 屬薄層的濺鍍。 第2圖之剖面圖即顯示上述濺鍍方法所製成之元件 構造，先在一半導體基底2〇 ,例如是一矽晶圓上形成一 接觸窗21，然後濺鍍形成一金屬薄層22覆蓋在接觸窗 21的底部和側壁上，以及基底2〇的表面上。如圖中所 不，由於步階覆蓋能力的限制，使得金屬薄層22的厚度 分布不均勻’其中位於接觸窗21底部的部分ι ,明顯比 位於接觸窗21側壁上的部分E薄許多，特別是在縱橫比 較大的情況下，往往會導致無法填塞到接觸窗21底部的 -5 - 本紙張Z度適，( cns 71^77^^--：~~~ - ---------f------、訂------手 (請先閱讀背而之注意事項再填寫本K) 經消部中决標準局貝-T.消费告作社印紫 4442 76 A7 _____ B7 五、發明説明（3) 情形，影響元件的導電性質。 為改善此一問題’可使用所謂準直管（col丨imai〇r)的 ·-· 濺鑛技術’如第1圖中所示者，¾金屬乾2與半導體基 底4之間增設一準直管16。利用準直管16的平行管壁 162將大角度的金屬原子濾除，僅容較小角度的金屬原 子通過而到達基底4上。由於過濾後的金屬離子較有方 向性’使得接觸窗2 1底部獲得較多的沈積而鞘稍改善其 底部覆蓋率。此外’也可將金屬靶2與半導體基底4之 間的距離拉長，施行所謂的長射程（l〇ng throw)濺鑛方 法，利用反應室12的側壁消耗部分較大角度的金屬原 子，亦有部分改善接觸窗底部覆蓋率的效果。 然而’無論使用準直管濺鍵方法或長射程濺錢方 法，其對底部覆蓋率的改善效果仍不足，並無法滿足日 益細小化製程之所需。此外，由於準直管攔截掉大部分 的金屬原子，使得沈積速率大大地降低，將增加沈積製 程所花費的時間和成本。至於長射程濺鍵方法，由於其 沈積之金屬薄層的底部覆蓋率，係隨金屬靶2與半導體 基底4之間的距離拉大而提高，往往必須將此一距離增 加至3公尺以上方可獲得足夠的底部覆蓋率，亦增加製 程實施上的困難。 目前，一種離子金屬電漿（IMP)濺鍍技術被提出， 利用射頻（RF)使金屬離子化並施加偏壓（bias)以進行有 方向性之濺鍍，以改善一般濺鍍方法底部覆蓋率不佳的 問題。為了清楚說明起見，請參見第3圖，顯示一習知 本紙依尺度適用中國國家標準（CNS ) Λ4規格U10X 297公《 ) I - I I T If訂 I I 線， (諳先閲讀背#>之注意事項再填寫本頁} 4442 76 A7 B7 五、發明説明（4) 離子金屬電漿濺鍍製程之裝置’其特徵在於利用RF感 應線圈18 (RF coil)所產生的磁場將被濺擊的金屬原子 ··». 離子化，並在基底4上施以負偏凑，而使金屬離子以垂 直方向朝基底4進行加速沈積。如此一來，不但可提高 底部覆蓋率’同時又不會降低沈積速率。 然而，如第4圖所示者，上述離子金屬電漿藏鍍製 程中，由於金屬離子是以大致垂直的方向濺鍍於基底2〇 上而形成金屬薄層22 ’雖可提昇接觸窗21底部的覆蓋 率，使其厚度與基底表面部分者相當，但是其在側壁上 的覆蓋率卻不可避免地有所降低’尤其是接近接觸窗21 底部部分的厚度會特別小，不僅使阻值的增加，也容易 因厚度不均而影響元件性質。因此，當新一代的鑲嵌式 (damascene)内連導線製程，或銅導線製程逐漸受到重視 時，如何製作一厚度均勻的黏著/擴散阻障層，便成為亟 需解決的課題。 有鑑於此，本發明的主要目的，在提供—種離子金 屬電漿濺鍍的改良製程，可增加所濺鍍金屬薄層的底部 覆蓋率，並保持其在接觸窗側壁上覆蓋率，以^作出^ 度均勻的黏著/擴散阻障層，提昇產品的性質。 子 為達成上述目的，本發明提出一種可兼顧接觸窗底 部和側壁覆蓋率的兩階段離子金屬電漿濺鍍方法，先於 下％以較复边^能量，並配^ 而濺氣第一金屋i，其具有較佳的底部覆蓋率。然後於 铉偽摩一力一下施以故直座— 率—態_量，而以長射盘方式^第 爿 > i . ~訂----- i —,線 * (讀先閱讀背而之注意事項再填寫本買) 鎊濟部中央標苹局員-τ·消资合作社印製A 442 7 6 A7 ____ B7 The Ministry of Economic Affairs and the Ministry of Economy, Trade and Industry's Sub-standard Standards Bureau ^ -Consumer Cooperative Association Printing Purple V. Invention Description (l) The present invention relates to a semiconductor integrated circuit deposition technology, and in particular, it relates to a semiconductor integrated circuit deposition technology. A two-stage ionic metal plasma sputtering method that takes into account both the bottom and sidewall coverage of a contact window. In today's integrated circuit production process, aluminum and tungsten are arguably the two most commonly used metal materials. Among them, aluminum has a low resistivity, so it is mainly used as a conductor between components, and it is mostly deposited by sputtering. Although tungsten has a high resistivity, it can It is formed by the vapor deposition (CVD) method. Its step coverage is better. In addition, it is easy to form fluorides with high volatility. It has no difficulty in etching and is therefore widely used. Acts as a plug between different metal layers in order to connect the layers of metal. However, the contact interface between Shao and silicon will diffuse to each other due to subsequent heating procedures, forming a spike phenomenon, which is likely to cause a short circuit and affect the properties of the device. In addition, the adhesion of tungsten to other materials (such as silicon) also increases. Not very ideal, so when using two metals, aluminum and tungsten, it is usually added between the other materials and another layer of conductive material called "J _ / diffusion barrier layer" to avoid aluminum silicon Spikes occur at the interface 'and improve the adhesion of tungsten to other materials. In general semiconductor metallization processes, 'Physical Vapor Deposition (PVD) technology is used, such as the electron beam evaporation method or the SpUttering method to form the adhesion / diffusion barrier metal. Thin layer. The base ore method is to use the ions generated by the plasma to bombard the metal rake on the cathode to knock out metal atoms, and then the blown-out metal atoms are deposited on the surface of the semiconductor substrate on the anode to form one (please read the back and pay attention Please fill in this page again), -β line. The size of this paper is applicable to China National Standards (CNS) M specifications (2! OX297) 4 4442 7 6 Printed by the Ministry of Standards of the People's Republic of China Standards Bureau Yibei Industry Cooperatives A7 B7 ___ V. Description of the invention (2) Thin metal layer = However, with the development of the reduction in component size, the currently used coUimator sputtering technology or long throw money killing technology is commonly used in the process. In the application of the contact window process with a large aspect ratio, the problem of poor bottom coverage will occur. For clarity, please refer to Figure 1 for a schematic view of a conventional sputtering device. The sputtering device mainly includes a reaction chamber 12, a placing seat 14, and a metal target 2 (such as titanium, aluminum, and other metals). The reaction chamber 12 has a gas inlet 122 and a gas outlet 124. The gas can pass through the gas Entrance 122 It is introduced into the reaction chamber 12 and the gas is drawn out from the gas outlet 124 by a vacuum pump (not shown). The placement base 14 is disposed in the reaction chamber 12 and is opposite to the metal target 2 for placing a semiconductor substrate (for example, (A silicon wafer) 4, and the substrate 4 can be adsorbed on the placing base 14 by a vacuum method. When the deposition is performed, the pressure of the reaction chamber is usually reduced to less than 10-6 Torr by a high vacuum pump, and then passed in. With a suitable inert gas, sputtering of a thin metal layer is performed in an environment with a pressure of about 1 to 10 mTorr. The cross-sectional view of FIG. 2 shows the device structure made by the above sputtering method, first on a semiconductor substrate 2 〇 For example, a contact window 21 is formed on a silicon wafer, and then a thin metal layer 22 is sputtered to cover the bottom and side walls of the contact window 21 and the surface of the substrate 20. As shown in the figure, because The limitation of the step coverage ability makes the thickness distribution of the thin metal layer 22 uneven. 'The portion ι located at the bottom of the contact window 21 is significantly thinner than the portion E located on the side wall of the contact window 21, especially in the case where the aspect ratio is relatively large. , Often leads to the inability to fill -5 at the bottom of the contact window 21-this paper has a moderate Z degree, (cns 71 ^ 77 ^^-: ~~~---------- f ----- -、 Order ------ hand (please read the back notice first and then fill in this K) Ministry of Economic Affairs and Consumer Affairs Final Standards Bureau -T. Consumer Reports Agency Printing Purple 4442 76 A7 _____ B7 V. Description of Invention (3) The situation affects the conductive properties of the component. To improve this problem, 'the so-called collimation tube (col imaimai〇r)' s splatter technology 'can be used as shown in Figure 1, ¾ metal dry A collimator 16 is added between 2 and the semiconductor substrate 4. Large-angle metal atoms are filtered by the parallel tube wall 162 of the collimating tube 16, and only small-angle metal atoms are allowed to pass through to reach the substrate 4. Because the filtered metal ions are more directional ', the bottom of the contact window 21 is more deposited and the sheath slightly improves its bottom coverage. In addition, the distance between the metal target 2 and the semiconductor substrate 4 can also be lengthened, and the so-called long-range (10ng throw) sputtering method can be performed. The side wall of the reaction chamber 12 consumes a part of metal atoms at a relatively large angle. Part of the effect of improving the coverage of the bottom of the contact window. However, regardless of the method of collimating the key splash method or the long-range sputtering method, the improvement of the bottom coverage is still insufficient, and it cannot meet the needs of the daily miniaturization process. In addition, because the collimation tube intercepts most of the metal atoms, the deposition rate is greatly reduced, which will increase the time and cost of the deposition process. As for the long-range sputtering method, due to the bottom coverage of the deposited thin metal layer, it increases as the distance between the metal target 2 and the semiconductor substrate 4 increases. This distance must often be increased above 3 meters. A sufficient bottom coverage can be obtained, which also increases the difficulty in process implementation. At present, an ionic metal plasma (IMP) sputtering technology is proposed. The radio frequency (RF) is used to ionize the metal and apply bias to perform directional sputtering to improve the bottom coverage of general sputtering methods. Poor question. For the sake of clarity, please refer to Figure 3, which shows a paper that is applicable to the Chinese National Standard (CNS) according to the standard Λ4 specification U10X 297 male "" I-IIT If order II line, (谙 先 读 背 # > of Please fill in this page again for attention} 4442 76 A7 B7 V. Description of the invention (4) The device of the ion metal plasma sputtering process is characterized in that the magnetic field generated by the RF induction coil 18 (RF coil) will be used to splash the metal Atoms ·· ». Ionize and apply a negative bias to the substrate 4 to accelerate the deposition of metal ions in a vertical direction toward the substrate 4. In this way, not only can the bottom coverage be increased, but the deposition is not reduced However, as shown in FIG. 4, in the above-mentioned ion metal plasma deposit plating process, a metal thin layer 22 is formed because metal ions are sputtered on the substrate 20 in a substantially vertical direction, although the contact window can be improved. The coverage of the bottom of 21 makes its thickness equivalent to that of the surface of the substrate, but its coverage on the side wall inevitably decreases. Especially the thickness of the bottom of the contact window 21 is particularly small, which not only makes the resistance value Increased, it is also easy to affect the properties of the components due to uneven thickness. Therefore, when the new generation of damascene interconnected wire process or copper wire process is gradually valued, how to make a uniform thickness adhesion / diffusion barrier layer In view of this, the main object of the present invention is to provide an improved process for ion plasma sputtering, which can increase the bottom coverage of the thin metal layer and keep it at In order to achieve the above objective, the present invention proposes a two-stage ionic metal that can take into account the coverage of the bottom of the contact window and the sidewall. Plasma sputtering method, the first% is more complex edge energy, and is equipped with the first gold house i, which has a better bottom coverage. Then it is applied to the seat in a pseudo-motor — Rate — state_quantity, and the long shot method ^ 第 爿 > i. ~ Order ----- i —, line * (read the precautions before filling in the purchase) and the central government department Bing Ping Bureau Member-τ · Consumer Cooperatives
A7 4442 76 五、發明説明（5 ) 二金屬層於第一金屬層上’其具有較佳的側壁覆蓋率。 如此，上述一層金屬層共同形參—大致均勻覆蓋的金屬 薄層。 〜_ 詳言之’本發明—種兩階段離子金屬電漿濺鍍方 法，包括下列步驟：提供一半導體基底，該基底上形成 有一接觸窗；施行第_階段賤锻程序，其於相對較高壓 力條件下施加較低功率能量，並配合射頻與偏懕以瀹餹 生成第一金屬層’覆蓋在接觸窗的底部和側壁上；及施 行第二階段錢鑛程序，其於相對想低屋力羞件下施加較 高功率.能量，並以長射程方式A鐘生成第二金屬層，覆 蓋在第一金屬f表面丨，而纟同形成一大致均勻覆蓋的 擴散阻障金屬薄層。 根據本發明一較佳實施例，上述半導體基底為一矽 晶圓，第一和第二金屬層的材質可以是鈦（Ti)或鈕（Ta)。 而濺鍍程序係以直流電源提供該能量。此外，上述第一 階段賤鑛程序使用的壓力係介於〗5rnT和25mT之間， 月b量係介於2Kw和4Kw之間。而第二階段濺鍍程序使 用的壓力係介於2mT和3mT之間，能量係介於8Kw和 經^部中决樣隼局貝J·消费合作社印^ 12Kw之間’並且當原料的金屬靶與半導體基底的距離 係介於140和1 50公分之間。 為讓本發明之上述和其他目的、特徵、和優點能更 明顯易懂，下文特舉一較佳實施例，並配合所附圖式， 作詳細說明如下： 圖式之簡要^；明 _ _____ Ί 本紙張尺度適川中關家(2- 4442 76 A7 B7 五、發明説明（6 ) ~ ~—― 第1圖係顯示一習知之濺鍍裝置的示意圖； 第2圖為一剖面圖，顯示由第i圖之濺鍍裝置所形 成金屬薄層的構造； 第3圖係顯示一習知之離子金屬電漿濺鍍裝置的示 意圖； 第4圖為一刻面圖，顯示由第3圖之濺鍍裝置所形 成金屬薄層的構造；以及 第5A和5B圖均為剖面圖，顯示依據本發明方法— 較佳實施例的製造流程。 實施例 首先，請參見第5A圖，提供一半導體基底5〇，例 如是一矽晶圓。該半導體基底50上形成有所需的電子元 件，例如是電晶體等’此處為了簡化圖示並會繪出。在 半導體基底上並形成有一接觸窗構造5丨，用以露出元件 的接觸區或導電層。 S滴部屮央標绛局員Μ消费合作社印繁 將半導體基底50移入第3圖所示的賤鑛裝置中，並 裝好所需的金屬乾，其材質例如是金屬鈦（Tj)或金屬纽 (Ta)。施行第一階段濺鍍程序，其於相對較高壓力條件 下施加較低功率能量，並配合施加射頻與偏壓，以濺鍍 生成第一金屬層52’覆蓋在接觸窗51的底部和側壁上。 例如’所使用的壓力係介於15mT和25mT之間，能量 係"於2Kw和4Kw之間。如圖中所示，由於反應室I] 的壓力較高’因此被擊出的金屬原子較多，加上施加的 射頻使金屬離子化’以及偏壓產生的電塲，使其加速 -9- 本紙適用中家 1 票举（CNS > /X4現格—（21〇χ29·^趁） '~~’ --A7 4442 76 V. Description of the invention (5) Two metal layers on the first metal layer 'have better sidewall coverage. In this way, the above-mentioned one layer of metal has a common parameter—a thin layer of metal that is substantially uniformly covered. ~ _ In detail, the present invention-a two-stage ionic metal plasma sputtering method, including the following steps: providing a semiconductor substrate, a contact window is formed on the substrate; performing the first stage stage forging process, which is relatively high Apply lower power energy under pressure conditions, and cooperate with radio frequency and bias to generate a first metal layer 'to cover the bottom and side walls of the contact window; and implement the second stage money mining process, which is relatively low in house power Higher power and energy are applied under the cover, and the second metal layer is generated by the long-range method A clock to cover the surface of the first metal f, and a thin uniformly covered diffusion barrier metal layer is formed at the same time. According to a preferred embodiment of the present invention, the semiconductor substrate is a silicon wafer, and the material of the first and second metal layers may be titanium (Ti) or button (Ta). The sputtering process provides this energy with a DC power source. In addition, the pressure used in the above-mentioned first stage base ore program is between 5rnT and 25mT, and the monthly b amount is between 2Kw and 4Kw. The pressure used in the second stage sputtering process is between 2mT and 3mT, and the energy is between 8Kw and the final sample of the Ministry of Economic Affairs, Bureau J. Consumer Cooperative Co., Ltd., and 12Kw. The distance from the semiconductor substrate is between 140 and 150 cm. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in detail with the accompanying drawings as follows: Brief description of the drawings ^; Ming _ _____ Ί The paper size is suitable for Zhongguanjia in Sichuan (2- 4442 76 A7 B7 V. Description of the invention (6) ~ ~-Figure 1 shows a schematic diagram of a conventional sputtering device; Figure 2 is a cross-sectional view showing the The structure of a thin metal layer formed by the sputtering device in Fig. I; Fig. 3 is a schematic diagram showing a conventional ion metal plasma sputtering device; Fig. 4 is a faceted view showing the sputtering device from Fig. 3 The structure of the formed metal layer; and FIGS. 5A and 5B are cross-sectional views showing the manufacturing process according to the method of the present invention—a preferred embodiment. First, referring to FIG. 5A, a semiconductor substrate 50 is provided. For example, it is a silicon wafer. The semiconductor substrate 50 is formed with required electronic components, such as transistors, and the like is illustrated here to simplify the illustration. A contact window structure 5 is formed on the semiconductor substrate. Used to expose contact of components Or conductive layer. S Drop Department, Central Standards Bureau, M Consumer Cooperative, India Fan, will move the semiconductor substrate 50 into the base ore device shown in Figure 3, and install the required metal stem, the material is, for example, metal titanium (Tj ) Or metal button (Ta). The first stage of the sputtering process is performed, which applies relatively low power energy under relatively high pressure conditions, and cooperates with the application of radio frequency and bias voltage to generate a first metal layer 52 'by sputtering. The bottom and side walls of the contact window 51. For example, 'The pressure used is between 15mT and 25mT, and the energy system' is between 2Kw and 4Kw. As shown in the figure, the pressure in the reaction chamber I] is higher 'Therefore, more metal atoms were knocked out, coupled with the application of radio frequency to ionize the metal' and the voltage generated by the bias to accelerate it. -9- This paper is suitable for Zhongjia 1 voting (CNS > / X4 now — (21〇χ29 · ^ while) '~~'-
經淖部中央標準局員工消费合作社印製 1、發明説明（7) 沈積到基底50上而形成第一金屬層52，其具有較佳的 底部覆蓋率，亦即，第一金屬層52在接觸窗51底部的 厚度與在基底表面上的厚度相當_。’ 接著，請參見第5B圖，仍然在第3圖所示的濂鍍 裝置中，施行第二階段濺鍍程序，生成第二金屬層，覆 蓋在第一金屬層52表面上。不同於第一階段濺鍍程序 者，此次是於相對較低壓力條件下施加較高功率能量， 並以長射程方式澈鍵生成第二金屬層。例如所使用的麼 力係介於2mT和3mT之間，能量係介於8Kw和12Kw 之間。 由於其壓力較第一階段為低，被擊出之金屬原子彼 此間較不會因碰撞而損失’且由於此時並未施加射頻， 所以金屬原子不會被離子化，便毋須施加偏壓來加速金 屬離子。此外，第二階段濺鍍程序是以長射程方式濺鍍 第一金屬層的’因此金屬乾與基底50之間的距離須拉 大’例如是介於140和150公分之間。根據前述對習知 技術的分析’此種濺鍍方式可有較佳的側壁覆蓋率。因 此，結合第一與第二階段濺鍍程序不同的接觸窗覆蓋特 性’可使第一與第二金屬層共同形成一厚度均勻的擴散 阻障金屬薄層54。 雖然本發明已以一較佳實施例揭露如上，然其並非 用以限定本發明’任何熟習此技藝者，在不脫離本發明 之精神和範圍内，當可作各種之更動與潤飾，因此本發 明之保護範圍當視後附之申請專利範圍所界定者為準。 本紙張尺度適用中國國家標準（CNS ) Μ規格（2!〇x297公嫠） y------1T------ (請先閱讀背面_之注意事項再填寫本頁)Printed by the Consumer Standards Cooperative of the Ministry of Standards of the People's Republic of China 1. Description of the invention (7) Deposited on the substrate 50 to form the first metal layer 52, which has a better bottom coverage, that is, the first metal layer 52 is in contact The thickness of the bottom of the window 51 is equivalent to the thickness on the surface of the substrate. ′ Next, referring to FIG. 5B, still in the hafnium plating apparatus shown in FIG. 3, a second-stage sputtering process is performed to generate a second metal layer and cover the surface of the first metal layer 52. Unlike the first-stage sputtering process, this time a higher power energy was applied under a relatively low pressure condition, and a second metal layer was generated by chelating in a long-range manner. For example, the force used is between 2mT and 3mT, and the energy is between 8Kw and 12Kw. Because its pressure is lower than that in the first stage, the ejected metal atoms are less likely to be lost due to collision with each other 'and because no radio frequency is applied at this time, the metal atoms will not be ionized, so there is no need to apply a bias voltage to Accelerate metal ions. In addition, the second-stage sputtering process is to sputter the first metal layer by a long-range sputtering method. Therefore, the distance between the metal stem and the substrate 50 must be widened, for example, between 140 and 150 cm. According to the foregoing analysis of the conventional technique ', this sputtering method can have better sidewall coverage. Therefore, combining the first and second stage sputtering process with different contact window covering characteristics ' allows the first and second metal layers to form a thin diffusion barrier metal layer 54 of uniform thickness. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. 'Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application. This paper size is applicable to Chinese National Standard (CNS) M specifications (2! 〇x297 cm) y ------ 1T ------ (Please read the notes on the back _ before filling this page)