TW419837B - Fabrication method and structure of light emitting diode - Google Patents
Fabrication method and structure of light emitting diode Download PDFInfo
- Publication number
- TW419837B TW419837B TW88117700A TW88117700A TW419837B TW 419837 B TW419837 B TW 419837B TW 88117700 A TW88117700 A TW 88117700A TW 88117700 A TW88117700 A TW 88117700A TW 419837 B TW419837 B TW 419837B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- type
- light
- conductive
- emitting diode
- Prior art date
Links
Landscapes
- Led Devices (AREA)
Abstract
Description
41 9 83 7A7 B7 __----------- ------------- '-' """' 五、發明说明(I ) 發明詳細說明 發光二極體具有照明、顯示、訊號傳遞及感測等重要 用途,而如何提升發光二極體發光效率爲此項技術硏發之 重要課題。 HP之美國專利5,233,204號中提出一種提高發光二極體 亮度之結構(如圖一),其結構含有η型電極(10),n型Ga As 基板(12),雙異質結構AlGaInP(14),P型GaP窗戶層(Window 137^)(16)和卩型電極(18).藉由選擇能隙較大的(^?(能隙 大於AIGalnP活性層)作爲窗戶餍·以提昇元件所產生光 線的穿透率,同時由於GaP的電阻係數較低,可以增加散 佈電流的功效,另一方藉由成長夠厚的GaP,使光較易從元 件的側面射出.41 9 83 7A7 B7 __----------- ------------- '-' " " " 'V. Description of the invention (I) Detailed description of the invention Light-emitting diodes have important uses such as lighting, display, signal transmission, and sensing, and how to improve the light-emitting diode's luminous efficiency has become an important issue for this technology. HP US Patent No. 5,233,204 proposes a structure for improving the brightness of a light emitting diode (see Fig. 1), which includes an n-type electrode (10), an n-type Ga As substrate (12), and a dual heterostructure AlGaInP (14). P-type GaP window layer (Window 137 ^) (16) and 卩 -type electrode (18). By selecting a larger energy gap (^? (Energy gap greater than AIGalnP active layer) as the window 餍 · to enhance the light generated by the element At the same time, because GaP has a low resistivity, it can increase the effect of spreading current. On the other hand, by growing GaP thick enough, light can be easily emitted from the side of the element.
Toshiba美國專利5,04S,035號中,也提岀製作電流阻隔 區的方法,來提升亮度(如圖二),它是在異質結構(14)和窗 戶層(16)間,形成電流阻隔層(20),使電流在接近活性層才 被分開到四周,以避免光子在其下產生從而提昇發光效率. 工業技術硏究院(OES)美國專利5,481,122號(如圖三)其 I 結構是在雙異質結構(14)上成長一高濃度載子之接觸層 <小 Λ (40),而接觸層上則鍍上透光導電層(42)(例如ΙΤ0),從結構 f; :£ .來看,其透光導電層(42)主要功能爲利用導電性較佳而使 & 電流分散開來,以減少因發光區集中在金屬接觸點下而不In Toshiba US Patent No. 5,04S, 035, a method for making a current blocking region is also proposed to improve the brightness (as shown in FIG. 2). It forms a current blocking layer between the heterostructure (14) and the window layer (16). (20), so that the electric current is separated to the surroundings only when it is close to the active layer, so as to avoid photons being generated thereunder to improve the luminous efficiency. The Institute of Industrial Technology (OES) US Patent No. 5,481,122 (see Figure 3) its I structure It is a contact layer < small Λ (40) which grows a high concentration carrier on the double heterostructure (14), and the contact layer is plated with a light-transmitting conductive layer (42) (such as ITO), from the structure f ;: Looking at it, the main function of the light-transmitting conductive layer (42) is to spread the & current by using better conductivity to reduce the concentration of the light-emitting area under the metal contact point.
T d 能透出的現象. ^ i V 晶元光電(Epistar)中華民國專利公告號344900提到四 ______— __y____ 本紙張尺度述/丨]中U'NS ) Λ4規格(210><2必公# )~'~' ~~~ —^ n t— —J H 圓 —訂 11 i 111 線 * <讀先閱讀背面之注意事項再填3本頁) 4 1 y 83 ί .¥ A7 B7 史; iv 中 k ί/i Ai 仃 五、發明説明(7 ) 個提升亮度的結構: 其一(如圖四A) 利用蝕刻方法,將接觸層(53)中心區域蝕刻掉,並利用透 光導電層(60)對接觸層形成歐姆接觸,而在沒有接觸層的 區域與窗戶層形成(SCHOTTKY)蕭基接觸,從而使電流較不 易流過該區域以達到分散電流的目的. 其二(如圖四B) 則在接觸層(59)和透光導電層(60)之間,製作絕緣層,使 電流不易流過該區域以達到分散電流的目的,其效果同其 其三(如圖四C) 則使用離子植入法 >使將來預備作爲電極(62)的區域下, 形成一高阻値區域,使電流不易流過該區域以達到分散電 流的目的,其用意亦同其一. 其四(如圖四D) 則使用Zn(鋅)擴散方法,使將來預備作爲電極(62)的區 域下形成一 P/n反向層(68),但元件結構極性與前三圖相反, 其用意亦同其一. 然而上述二極體結構中,皆有稹種不同之缺點,分述 如下: HP Patent:窗戶層必需成長較厚電流分散效果 才會好,光的射出才會提升,故經常必需使用二次成長,(如 氣相磊晶VPS),由於需使闱不同的磊晶技術,製程較繁 I----------------ΐτ------線< (誚先閲讀背面之注意事項再填巧本頁) 本紙張尺度適扪中®國家標準(('NS ) Λ4¾¾ ( 21 OX } 五、發明说明ο ) 複,降低良品率,且成本提高’另外對射入電極下的光子 也都會吸收殆盡°The phenomenon that T d can see through. ^ I V Epistar Republic of China Patent Bulletin No. 344900 mentions four ______ — __y____ U'NS in this paper's dimensions / 丨] Λ4 specification (210 > < 2必 公 #) ~ '~' ~~~ — ^ nt— —JH Round—Order 11 i 111 line * < Read the notes on the back before filling in 3 pages) 4 1 y 83 ί. ¥ A7 B7 History K ί / i Ai in iv. 5. Description of the invention (7) Structures for improving brightness: One (as shown in FIG. 4A) uses an etching method to etch away the central area of the contact layer (53), and uses light transmission to conduct electricity. The layer (60) forms an ohmic contact to the contact layer, and forms a Schottky contact with the window layer in the area without the contact layer, thereby making it difficult for the current to flow through the area to achieve the purpose of dispersing the current. The second (as shown in the figure) (4) An insulating layer is made between the contact layer (59) and the light-transmitting conductive layer (60), so that the current does not easily flow through the area to achieve the purpose of dispersing the current. The effect is the same as the third one (see Figure 4C). ) Then use the ion implantation method> to form a high-impedance region under the region to be prepared as the electrode (62) in the future, making the current difficult In order to achieve the purpose of dispersing current through this area, the purpose is the same. The fourth (as shown in Figure 4D) uses the Zn (zinc) diffusion method to form a P / n under the area to be used as the electrode (62) in the future. The reverse layer (68), but the polarity of the component structure is opposite to that of the previous three figures, and its purpose is the same. However, there are different disadvantages in the above diode structure, as described below: HP Patent: The window layer must be The thicker the current spreading effect, the better the light emission. Therefore, it is often necessary to use secondary growth (such as vapor phase epitaxy VPS). Due to the need to use different epitaxy technologies, the process is more complicated. -------------- ΐτ ------ line < (read the precautions on the back before filling out this page) This paper is moderately sized ® National Standard ((' NS) Λ4¾¾ (21 OX} 5. Description of the invention ο) complex, reduce the yield rate, and increase the cost 'In addition, all photons under the electrode will be absorbed.
Toshiba patent:爲了形成此電流阻隔區,必須一次成長, 其製程控制不易,易使良率降低,增加風險與成本’另外對 射入電極下的光子也都會吸收殆盡. OES Patent:雖有電流分散效杲,卻無法避免使電流流 到金龎電極之下,而浪費了這一部份的電流’另外對射入 電極下的光子也都會吸收殆盡.Toshiba patent: In order to form this current blocking area, it must be grown at one time. Its process control is not easy, it is easy to reduce the yield, increase the risk and cost. In addition, the photons under the input electrode will be absorbed. OES Patent: Although there is current Dispersion effect, but it is unavoidable that the current flows below the gold electrode, and this part of the current is wasted. In addition, the photons incident under the electrode will be absorbed.
Epi star patent,·若用絕緣層,離子植入,擴散法等都需二 次加工,增加製程的繁瑣 '增加成本,另外對射入電極下 的光子也都會吸收殆盡. 因此本發明之目的在於克服習知技藝之缺點,提出一 種具有高亮度之發光二極體結構。 本發明之特點爲在元件磊晶的時候於接觸層上多成長 —層與接觸層反向極性層,由於其電性相反 >在元件使用時 將會形成一電流障礙,使電流會從其他沒有障礙的區域流 過,一方面避免電流在電極下方作放光復和,另外亦可迫& 電流較分散.經由適當的選擇反向層和接觸層使其折·射 係數有較大的差異,會將射入此區域的光線有—部份胃& 經反射而離開此區域,而有再次利周專射军件的可言巨, 因而增加元件的發光效率。S於此反可以#元件 磊晶時一起完成’不需二次生長或加工,具有降低或太與 提高良率的雙重效能。 ____^_ 本紙张X度遥叩;囤國家標4,-((,沾)八4規格(210乂2六公茇} ~~~一~一~—- 4 1^837 A7 屮 ί; ίΐ ί_. Α ΐί 卬 Β7 — ... —— -». 1 - ,----1 五、發明説明(中) 爲使能對本發明之目的、形狀、構造、特徵及其功效’ 做更進一步瞭解,茲舉實例配合圖式詳細說明如下: 圖示說明 第一圖爲一習知技藝發光二極體之剖面圖。 第二圖爲另一習知技藜發光二極體之剖面圖。 第三圖爲另一習知技藝發光二極體之剖面圖5 第四A-四D圖爲另一習知技藝發光二極體之剖面圖^ 第五圖爲本發明發光二極體結構之—較佳具體實例之 中間製程結構剖面圖。 第六圖爲本發明發光二極體結構之—較佳具體實例之 剖面圖。 第七圖爲本發明發光二極體結構之另一較隹具體實例 之中間製程結構剖面圇。 第八圖爲爲本發明發光二極體結構之另一較佳具體實 例之剖面圖。 發明之詳細說明 本發明之目的在於提供一種具有發光売度提升效栗2 發光·二極體結構及其製法。本發明之製法之第—具體寅例 包含下列步驟: 設立 型電極: 2. 在η型電極上設立一 η型基板; 3. 在η型基板上設立一 η型布拉格反射層: 4. '在η型布拉格反射層上設立一 AlGalnP雙異質結構: _本紙張尺度適州屮阁國家榇隼() Λ4规格(210X2^7公麓) (誚先閲讀背面之注意事項再填方本I) 訂 線 ;Γ ?- Α7 Β7 ά ] 9 83*? ^ 五'發明説明(f) 5. 在AlGalnP雙異質結構上設立—P型窗戶層: 6. 在P型窗戶層上設立一接觸層: 7. 在接觸層上設立一 η型反向層; 8. 將此η型反向層微影及蝕刻,僅留下中間部份: 9. 在所得結構之上再形成一透光導電層;及 10. 在透光導電層上設立一 Ρ型電極。 在上述步驟中,若整個結構極性相反,則亦可適用,再者, 在第四步驟中,AlGalnP雙異質結構亦可以爲一 AlGalnP 多重量子并結構所取代。再者* P型電極面積最好小於該 η型反向層中間部份之面積,但是亦可等於或大於該η型 反向層中間部份之面積。 參見第五圖及第六圖*本發明第一寊施例結構如下: 底層(10)爲η型電極,η極電極(10)上爲η型基板(20)(例如 GaAs),η型基板上爲η型布拉格反射層(Bragg Reflect〇r)(30),例如像是利闱GaAs,AlGaAs交互以四分之 一特定波長之厚度堆疊以增進具該特定波長之光的反射 率。布拉格反射層(3 0)上爲AiGalnP雙異質結構(40),其 中該雙異質結構例如像是η型(AluGhJ^In^P(底層)/ undoped (Alo.iGa。』)。」In。」?(中層)/p 型 (AluGaD.山」In<).5P(頂層)。在此AlGaltiP雙異質結構或 AlGalnP多重量子并結構(40)上爲ρ型窗戶層(Window layer ) (50),材料可以是 AlGaAs, GaP,(ALGarJylfty.nPe 客x芸1,0.45芸yS 0.55)等能隙大且導電性佳的半導體材 ϋ张尺度適玥中1¾闯家榡羋U’NS ) Λ4規格(2!0Χ2??公犮 I--------------、玎------手 {誚先閱讀背面之注^一^項再填寫本一^ ) B7 五'發明説明(h) 料,其載子(carrier)濃度一般大於5X1017/cm3,而在p-型窗 戶層(50)上爲接觸層(60)厚度大約在0.04// m以上,載子濃 度通常大於8X1017 /cm3,其材料可爲GaAs, AlGaAs,GalnP, AllnP或其組合,而在p型接觸層上爲n型AiiC>ai. ,8(0^<1)反向層(70),其厚度通常大於0.01 # m,濃度通 常大於1X10 17cin_3經微影及蝕刻作業僅留下中心部分區 域之η型反向層區(75)(如第六圖所示),當中間區域之η 型反向層區(?5)形成後,在其上鍍上或形成透光導電層(80), 例如像是ITO或金屬薄膜,最後再形成一 p型電極(90),此 P型電極(90)面積較η型反向層區小,並隔著透光導電層(80) 座落於η型反向層區(75)之正上方。透光導電層(8 0)會 和接觸厘形成良好歐姆接觸(Ohmic contact)而反向層和透 光導電層(80)間則會形成蕭基接觸(Schottky contact), 在接觸層(6〇)和反向層(75)區則形成反向p-n接面(p-n junction),從而防止電流流經此區。此整個結構若極性全 部相反,則亦可適用。 本發明之製法之第二具體實例亦可參考第五圖及第六 圖說明之,本發明之第二具體實例,製作及結構大致與第 一具體實例相同,但是其中反向層(70)及反向層區(75)不 同。在第二具體賁例中,於p型接觸層上之反向層(70), 可爲 η 型(AhGabdylno.nPfO客 X芸 1,0.45芸7奚0.55)反向 層(7G),其厚度通常大於o.oigm,濃度通常大於1X10 l7cnT3經微影及蝕刻作業亦僅留下中心部分區域之n型反 本紙張尺度適《丨十阀阔家標卑(CA'S ) Λ4規格(2!OxM7公釐} —--------------1T------旅·- (誚先閱讀背面之注意事項再填艿本页)Epi star patent, · If an insulating layer, ion implantation, diffusion method, etc. are used, secondary processing is required, which increases the tedious process of the process and increases the cost. In addition, the photons under the incident electrode are also absorbed. Therefore, the purpose of the present invention In order to overcome the shortcomings of conventional techniques, a light-emitting diode structure with high brightness is proposed. The feature of the present invention is that when the element is epitaxially grown on the contact layer—the layer and the contact layer are of opposite polarity. Due to their opposite electrical properties, a current barrier will be formed when the component is used, so that current will flow from other There is no obstacle flowing in the area. On the one hand, it avoids the current recombination under the electrode, and it can also force the current to be more dispersed. By properly selecting the reverse layer and the contact layer, the refractive index has a large difference. , The light that enters this area will be-part of the stomach & will leave this area after reflection, and it will be huge to shoot the military parts again, thus increasing the luminous efficiency of the element. In this case, it can be #components completed together during the epitaxy ’without the need for secondary growth or processing, and has the dual effect of reducing or increasing the yield. ____ ^ _ This paper is X degrees away; national standard 4,-((, dip) 8-4 specifications (210 乂 2 six public 茇) ~~~ 一 ~ 一 ~-4 1 ^ 837 A7 屮 ί; ίΐ ί_. Α ΐί 卬 Β7 — ... ——-». 1-, ---- 1 V. Description of the Invention (middle) In order to enable the purpose, shape, structure, features and effects of the present invention to be furthered It is understood that the following examples are used in conjunction with the drawings to explain in detail as follows: The first picture is a cross-sectional view of a conventional art light-emitting diode. The second picture is a cross-sectional view of another known art light-emitting diode. The third figure is a cross-sectional view of another conventional light-emitting diode 5 The fourth A-four D are the cross-sectional views of another conventional light-emitting diode ^ The fifth figure is the structure of the light-emitting diode of the present invention— Cross-sectional view of the intermediate process structure of the preferred embodiment. The sixth diagram is a cross-sectional view of the preferred embodiment of the light-emitting diode structure of the present invention. The seventh diagram is another comparative example of the light-emitting diode structure of the present invention. Section 囵 of the intermediate process structure. Figure 8 is a sectional view of another preferred embodiment of the light emitting diode structure of the present invention. Details of the invention The purpose of the present invention is to provide a light-emitting diode structure and a method for producing the light-emitting diode having the effect of improving the luminous intensity. The first method of the method of the present invention includes the following steps: Setting up the electrode: 2. On the η-type electrode An n-type substrate is set up on the substrate; 3. An n-type Bragg reflection layer is set up on the n-type substrate: 4. 'An AlGalnP double heterostructure is set up on the n-type Bragg reflection layer: _This paper size () Λ4 specification (210X2 ^ 7 gonglu) (阅读 Read the notes on the back before filling in the book I) Thread; Γ?-Α7 Β7 ά] 9 83 *? ^ Five 'invention description (f) 5. In Set up on AlGalnP double heterostructure-P-type window layer: 6. Set up a contact layer on the P-type window layer: 7. Set up an n-type reverse layer on the contact layer; 8. Lithography the n-type reverse layer And etching, leaving only the middle part: 9. forming a light-transmitting conductive layer on the obtained structure; and 10. establishing a P-type electrode on the light-transmitting conductive layer. In the above steps, if the polarity of the entire structure is opposite , It is also applicable. Furthermore, in the fourth step, the AlGalnP double heterostructure can also be applied. It is replaced by an AlGalnP multiple quantum parallel structure. Furthermore, the area of the P-type electrode is preferably smaller than the area of the middle portion of the n-type inversion layer, but it may also be equal to or larger than the area of the middle portion of the n-type inversion layer. See the fifth and sixth figures * The structure of the first embodiment of the present invention is as follows: The bottom layer (10) is an n-type electrode, and the n-electrode (10) is an n-type substrate (20) (such as GaAs), an n-type substrate The upper part is an n-type Bragg Reflector (30). For example, for example, GaAs, AlGaAs are alternately stacked with a thickness of one quarter of a specific wavelength to improve the reflectance of light having the specific wavelength. On the Bragg reflection layer (30) is an AiGalnP double heterostructure (40), where the double heterostructure is, for example, η-type (AluGhJ ^ In ^ P (bottom) / undoped (Alo.iGa. ")." "In." (Middle layer) / p-type (AluGaD. Mountain "In <). 5P (top layer). In this AlGaltiP double heterostructure or AlGalnP multiple quantum union structure (40) is a p-type window layer (50), The material can be AlGaAs, GaP, (ALGarJylfty.nPe guest x Yun 1,0.45 Yun yS 0.55) and other semiconductor materials with large energy gaps and good conductivity. The scale of the material is moderate. 1 ¾ U 榡 芈 NS. Λ4 specification ( 2! 0Χ2 ?? Public 犮 I --------------, 玎 ------ hand {诮 first read the note on the back ^ a ^ and then fill out this one ^) B7 five 'Explanation of the invention (h) The carrier concentration of the material is generally greater than 5X1017 / cm3, and the thickness of the contact layer (60) on the p-type window layer (50) is about 0.04 // m or more, and the carrier concentration is Usually larger than 8X1017 / cm3, the material can be GaAs, AlGaAs, GalnP, AllnP or a combination thereof, and n-type AiiC > ai. On the p-type contact layer, 8 (0 ^ < 1) reverse layer (70) , Its thickness is usually greater than 0.01 # m, and its concentration is usually greater than 1X10 17cin_3 The shadowing and etching operation only leaves the n-type reverse layer region (75) in the central portion (as shown in Figure 6). After the n-type reverse layer region (? 5) in the middle region is formed, it is plated thereon. A light-transmitting conductive layer (80) is formed on, for example, ITO or a metal thin film, and finally a p-type electrode (90) is formed. The area of the P-type electrode (90) is smaller than that of the n-type reverse layer, and is separated by The light-transmitting conductive layer (80) is located directly above the n-type reverse layer region (75). The light-transmitting conductive layer (80) will form a good ohmic contact with the contact, and the reverse layer and the light-transmitting conductive layer (80) will form a Schottky contact. In the contact layer (60) ) And the reverse layer (75) area form a reverse pn junction to prevent current from flowing through this area. This entire structure is also applicable if the polarities are all reversed. The second specific example of the manufacturing method of the present invention can also be described with reference to the fifth and sixth drawings. The second specific example of the present invention has the same manufacturing and structure as the first specific example, but the reverse layer (70) and The reverse layer area (75) is different. In the second specific example, the inversion layer (70) on the p-type contact layer may be an η-type (AhGabdylno.nPfO guest X Yun 1, 0.45 Yun 7 奚 0.55) reverse layer (7G), and its thickness It is usually greater than o.oigm, and the concentration is usually greater than 1X10 l7cnT3. After lithography and etching operations, only the n-type anti-paper size of the central part is suitable. "丨 Valve Family Standard (CA'S) Λ4 Specification (2! OxM7) Li} —------------- 1T ------ Travel ·-(诮 Read the precautions on the back before filling this page)
A AT B7 ^83 7 碰 五、發明説明() 向層區(75)(如第六圖所示)。 本發明製法之第三具體實例包含下列步驟: a. 設立一單晶基板; b. 在單晶基板上設立一GaN或是AIN緩衝層: c. 在緩衝層上設立一 η型GaN單晶層 d. 在單晶層上設立一 inGaN/AlGaN雙異質結構; e. 在InGaN/AlGaN雙異質結構上設立一 η型AlGaN反向 層; f·利用微影及蝕刻·使元件頂層之一區域蝕刻至η型單 晶層,並於其上蒸鍍形成η型電極; g.在頂層的其他部份利用微影及蝕刻作業去除大部分的 η型反向層,僅留下中心部份: 在反向層中心區域及其周圔之雙異質結構上形成一透 光導電層; i.在透光導電層上與η型反向層中心區域對應處形成_? 型電極,此ρ型電極面積較小於該η型反向層中心區 域》 在上述步驟中’若整個結構極性相反,則亦可適用,再者, 在第四及第五步驟中’ InGsN/AlGaN雙異質結構亦可以爲 —InGaN/AlGaN多重量子井結構所取代。再者ρ型電極面 積亦可等於或大於該η型反向層中心區域。 參見第七圖及第八圖 '本發明第三實施例結構如 下a底層爲基板(2〇)可爲監寶石(SapptUre)或其它單晶物 本纸张尺攻遥]彳]中围固家棉皁(CNS ) Λ4规格(2!0X2必公釐 {誚先閱讀背面之注意事項再填荇本頁)A AT B7 ^ 83 7 Touch V. Description of the invention () Directional zone (75) (as shown in Figure 6). A third specific example of the manufacturing method of the present invention includes the following steps: a. Setting up a single crystal substrate; b. Setting up a GaN or AIN buffer layer on the single crystal substrate: c. Setting up an n-type GaN single crystal layer on the buffer layer d. Setting up an inGaN / AlGaN double heterostructure on the single crystal layer; e. Setting up an n-type AlGaN reverse layer on the InGaN / AlGaN double heterostructure; f. Etching a region of the top layer of the device by lithography and etching To the η-type single crystal layer, and vapor-deposit it to form an η-type electrode; g. Use lithography and etching to remove most of the η-type inversion layer in the other parts of the top layer, leaving only the central portion: A light-transmitting conductive layer is formed on the central region of the inversion layer and its double heterostructure; i. A _?-Type electrode is formed on the light-transmitting conductive layer corresponding to the center region of the η-type inversion layer, and the area of this ρ-type electrode is small. In the center region of the η-type inversion layer "In the above steps, 'if the entire structure has opposite polarities, it is also applicable. In addition, in the fourth and fifth steps, the InGsN / AlGaN double heterostructure can also be -InGaN / AlGaN multiple quantum well structure replaced. Furthermore, the area of the p-type electrode may be equal to or larger than the central area of the n-type inversion layer. Refer to the seventh and eighth figures. The structure of the third embodiment of the present invention is as follows: a. The bottom layer is a substrate (20), which can be SapptUre or other single crystals. This paper ruler is far away.]]] Soap (CNS) Λ4 specification (2! 0X2 must be millimeter {诮 Read the precautions on the back before filling this page)
,1T 線- tv. 而 >/; f- /·' 9 83 ^ w A7 〜 B7 _ ^ J ~ ~' ,— --— «· — * — — ___________ _ I· I · 及、發明说明u ) 質,基板上爲GaNj^GaH^AlyGabyN等材料(o客X芸1,0 芸ySl)或是其組合所構成之緩衝層(25),其上是η型之 GaN,Ir^GahN,AlyGalyN 等材料(0芸 X客 l,〇^y 客 1)或 是其組合所構成之單晶層(27 ),其上是GaN,In,Gai. iKAlyGa^yN等材料(0客xgi,0芸y客1)或是其組合所構 成之雙異質結構或多重量子井結構(40),此結構頂層之電 性應爲卩型。再在其上形成η型GaN,IhGahN,AlyGawN 等材料(〇各Xgl,0妄y$l)等或是其組合所構成之η型反 向層(7S),亦可經適當控制此反向層材料之成份使其折射 率小於其下之雙異質結構或多重量子并結構(40)之頂層材 料的折射率,其厚度通常大於0.01/zm,n型載子濃度通常 大於1X10 I7Cm·3,磊晶完成後經過微影及蝕刻作業後,一 部份區域蝕刻至η型單晶層(27)並蒸鍍形成N型電極 (10)(參見第八圖所示)其它區域經過微影及蝕刻作業後 僅留下中心部分區域之η型反向層區(75),當中間區域之 η型反向層區(75)形成後,在其上鍍上一透光導電層(80),例 如鎳金金屬薄膜,最後再形成一ρ型電極(90),此ρ型電極 (90)面稹較η型反向層區(75)小,並隔著透光導電層(80)座 落於η型反向層區(75)之正上方,透光導電層(80)在和 雙異質結構或多重量子井結構(4 0)之頂層區域會形成良好 歐姆接觸(Ohmic contact^而透光導電層(8〇)會與η型反 向層區(7 5)形成蕭基接觸(Schottkyeoftiact) ,η型反 向層區(75 )則會與其下的雙異質結構或多重量子并結構 本纸張尺度追州屮阀闽家標準(CNS ) Λ4规格I 210X2亡公釐) I--------------,訂------年 {請先閲讀背面之注意事項再填荇本頁) A7 B7 ;f 部 中 λ w1; 於 A ί\ 卬 五、發明説明 (4〇)之頂層材料形成反向ρ-η接面(p-n junction),従而防止 電流流經此區。此整個結構若極性全部相反,則亦可適用。 由於本結構之發光二極體可以避免一部份原來會在 電極下方做放光結和之電子電洞對在此區域復和,使得光 線可以在未被遮蔽的區域產生,另外對射入此反向層區域 的光線,亦會因爲反向層區的折封率較小而產生全反射的 現象而折回’使得光線有再次射離元件或產生電子電洞對 而再次循環放光的可能,此項設計原理可以適合各種波段 之發光二極體使用,例如加上此項結構設計之波長爲 62 5nm的發光二極體較諸原本的元件,亮度平均可提升約 1 5 %以上,因此對提昇元件性能及節省能源消耗皆有相 當的效果。 總而言之’此結構發明有明顯提升發光二極體亮 度的效果’其結構爲在發光二極體上層成長或形成—P 型接觸層(contact layer)及一 η 型反向層(reverse bias layer),或一:η型接觸層及p型反向層,由於磊晶製程-次 完成,經微影及選擇性蝕刻製程,僅留下將來預備作爲電 極下方之區域的反向層而形成電流障礙區(阻隔區),因此 可明顯阻止電流流經此區,然後再於接觸層及反向層區上 製作一透光導電層.由於此透光導電層與接觸層間可有效 的形成歐姆接觸,使電流易於流經此區域而透光導電層與 反向層則彩成蕭基接觸與反相偏壓的二極體,如此使得電 流無法通過此區域·換言之,此反向層的設計可有效使驅 本纸張尺度追;i丨中围因家#卒(CNS ) Λ4規格(210X2坍公釐) I--------------π------手 1 (請先閱讀背面之注意事項再填本茛) A7 B7 五、發明説明(β) 動電流擴散開來,避免在電極下方做放光結合.同時由於 選擇了適當的接觸層,和反向層之折射率,亦可使得射到本 遛域的光被反射而有再次被利用與射出的可能,因而提昇 了發光二極體之放光效率,因此極具產業上之實用價値, 乃一不可多得之發明專利•爰依法提出申請之,請詳查並 准于本案專利,以保障該發明者之權益,若鈞局貴審查 委員有任何稽疑,請不吝來函指示β 按,以上所述*僅爲本發明之諸具體實施例,惟本發 明之構造並不侷限於此,任何熟悉此項技藝者在本發明之 領域內,所實施之變化或修飾皆被涵蓋在本案之專利範圍 內。 (請先閲讀背面之注意事項再4¾本頁) 訂 -線 •λ iV· HI f 竹, 1T line-tv. And >/; f- / · '9 83 ^ w A7 ~ B7 _ ^ J ~ ~',---- «· — * — — ___________ _ I · I · and, description of the invention u), the substrate is made of GaNj ^ GaH ^ AlyGabyN and other materials (o guest X Yun 1, 0 Yun ySl) or a buffer layer (25) composed of a combination thereof, on which is n-type GaN, Ir ^ GahN, AlyGalyN and other materials (0 Yun X guest 1, 0 ^ y guest 1) or a single crystal layer (27) composed of a combination of GaN, In, Gai. IKAlyGa ^ yN and other materials (0 guest xgi, 0 Yun Yike 1) or a double heterostructure or multiple quantum well structure (40) formed by a combination thereof. The electrical property of the top layer of this structure should be 卩 -type. Then, an n-type inversion layer (7S) composed of n-type GaN, IhGahN, AlyGawN (0 xgl, 0 $$) or a combination thereof can be formed, and the inversion can also be appropriately controlled. The composition of the layer material makes its refractive index lower than the refractive index of the top material of the double heterostructure or multiple quantum parallel structure (40) below. Its thickness is usually greater than 0.01 / zm, and the n-type carrier concentration is usually greater than 1X10 I7Cm · 3. After the epitaxy is completed, after lithography and etching, a part of the area is etched to the η-type single crystal layer (27) and evaporated to form an N-type electrode (10) (see Figure 8). After the etching operation, only the n-type reverse layer region (75) in the central region is left. After the n-type reverse layer region (75) in the middle region is formed, a light-transmitting conductive layer (80) is plated thereon. For example, a nickel-gold metal film, and finally a p-type electrode (90) is formed. The surface of the p-type electrode (90) is smaller than the n-type reverse layer region (75), and is located through the light-transmitting conductive layer (80). Directly above the n-type reverse layer region (75), a light-transmitting conductive layer (80) will be formed in the top region of the double heterostructure or multiple quantum well structure (40). A good ohmic contact (Ohmic contact) and the light-transmitting conductive layer (80) will form a Schottkyeoftiact with the n-type inverted layer region (75), and the n-type inverted layer region (75) will Double Heterostructure or Multiple Quantum Parallel Structure Paper Standard Chase State Mining Standard (CNS) Λ4 Specification I 210X2 mm) I --------------, Order --- --- year {Please read the notes on the back before filling this page) A7 B7; λ w1 in part f; in A ί \ 卬 5. The top material of the invention description (4〇) forms a reverse ρ-η connection Pn junction to prevent current from flowing through this area. This entire structure is also applicable if the polarities are all reversed. Because the light-emitting diode of this structure can avoid a part of the electron hole pair that would have been used as a light emitting junction under the electrode to reconcile in this area, so that light can be generated in the unshielded area, and the other pair is incident on this. The light in the reverse layer area will also return due to the phenomenon of total reflection due to the small sealing rate in the reverse layer area, so that the light may be emitted from the element again or an electron hole pair may be generated and circulated again. This design principle can be suitable for light-emitting diodes in various wavelength bands. For example, the light-emitting diode with a wavelength of 62 5nm designed in this structure can increase the brightness by about 15% on average compared with the original components. There are considerable effects in improving component performance and saving energy consumption. All in all, this structure invention has the effect of significantly improving the brightness of the light-emitting diode. Its structure is to grow or form on the top of the light-emitting diode-a P-type contact layer and a η-type reverse bias layer. Or one: η-type contact layer and p-type reverse layer, due to the completion of the epitaxial process one-time, through the lithography and selective etching process, leaving only the reverse layer that will be used as the area under the electrode in the future to form a current barrier area (Blocking area), so it can obviously prevent the current from flowing through this area, and then make a transparent conductive layer on the contact layer and the reverse layer area. Because this transparent conductive layer and the contact layer can effectively form an ohmic contact, so that Current easily flows through this area and the light-transmitting conductive layer and the reverse layer are colored diodes with Schottky contact and reverse bias, so that the current cannot pass through this area. In other words, the design of this reverse layer can effectively make Drive the paper to follow the standard; i 丨 中 围 因 家 # 兵 (CNS) Λ4 size (210X2 collapse mm) I -------------- π ------ hand 1 (Please read the notes on the back before filling in this buttercup) A7 B7 V. Description of the invention (β) The current is diffused to avoid the combination of light emission under the electrode. At the same time, due to the selection of the appropriate contact layer and the refractive index of the reverse layer, the light entering the local area can be reflected and reused and emitted again. The possibility of light-emitting diodes has improved the light-emitting efficiency of the light-emitting diodes, so it has a practical value in the industry. It is a rare invention patent. • It is filed in accordance with the law. Please check and approve the patent in this case to ensure protection. The rights of the inventor, if there is any suspicion of the review committee of the Bureau, please do not hesitate to send a letter to instruct β. The above description * is only specific embodiments of the present invention, but the structure of the present invention is not limited to this. Those skilled in the art in the field of the present invention, all the changes or modifications implemented are covered by the patent scope of this case. (Please read the precautions on the back before going to this page) Order-Line • λ iV · HI f Bamboo
U 本紙张尺度適川中围國家橾準(C'NS〉Λ4規格(210X29也釐) ffiU The size of this paper is suitable for the central and western countries of Sichuan (C'NS> Λ4 size (210X29 also)) ffi
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW88117700A TW419837B (en) | 1999-10-13 | 1999-10-13 | Fabrication method and structure of light emitting diode |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW88117700A TW419837B (en) | 1999-10-13 | 1999-10-13 | Fabrication method and structure of light emitting diode |
Publications (1)
Publication Number | Publication Date |
---|---|
TW419837B true TW419837B (en) | 2001-01-21 |
Family
ID=21642611
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW88117700A TW419837B (en) | 1999-10-13 | 1999-10-13 | Fabrication method and structure of light emitting diode |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW419837B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7030414B2 (en) | 2001-04-25 | 2006-04-18 | Toyoda Gosei Co., Ltd. | III group nitride compound semiconductor luminescent element |
US7119374B2 (en) | 2004-02-20 | 2006-10-10 | Supernova Optoelectronics Corp. | Gallium nitride based light emitting device and the fabricating method for the same |
-
1999
- 1999-10-13 TW TW88117700A patent/TW419837B/en active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7030414B2 (en) | 2001-04-25 | 2006-04-18 | Toyoda Gosei Co., Ltd. | III group nitride compound semiconductor luminescent element |
US7119374B2 (en) | 2004-02-20 | 2006-10-10 | Supernova Optoelectronics Corp. | Gallium nitride based light emitting device and the fabricating method for the same |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102197596B (en) | Electrically pixelated luminescent device | |
TW417142B (en) | Semiconductor light emitting device | |
JP4148264B2 (en) | Semiconductor device and manufacturing method thereof | |
US6078064A (en) | Indium gallium nitride light emitting diode | |
KR101007087B1 (en) | Light emitting device and fabrication method thereof | |
US11810943B2 (en) | Light-emitting device and manufacturing method thereof | |
US8829558B2 (en) | Semiconductor light-emitting device | |
US10600938B2 (en) | Light-emitting device with tunnel junction | |
US20090146163A1 (en) | High brightness light emitting diode structure | |
US20050098801A1 (en) | Semiconductor light emitting device | |
CN102201513B (en) | Luminescent device and manufacture method thereof, light emitting device package and illuminator | |
TW419837B (en) | Fabrication method and structure of light emitting diode | |
US20090278160A1 (en) | Radiation emitting semiconductor device | |
CN109935671B (en) | light-emitting element | |
KR20140126009A (en) | Manufacturing method for UV-light emitting diode and UV-light emitting diode | |
KR20060112064A (en) | Light emitting element | |
TWI244770B (en) | Light emitting diode | |
JP2025031509A (en) | Light-emitting diode | |
KR102189614B1 (en) | III-P light emitting device with super lattice | |
JP2025031508A (en) | Light-emitting diode | |
KR20060095118A (en) | Nitride semiconductor light emitting device for flip chip | |
TW451503B (en) | Light emitting diode with a composite window layer | |
KR20130024151A (en) | Light emitting device |