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TW365001B - Non-volatile semiconductor memory apparatus and the operation method - Google Patents

Non-volatile semiconductor memory apparatus and the operation method

Info

Publication number
TW365001B
TW365001B TW086114677A TW86114677A TW365001B TW 365001 B TW365001 B TW 365001B TW 086114677 A TW086114677 A TW 086114677A TW 86114677 A TW86114677 A TW 86114677A TW 365001 B TW365001 B TW 365001B
Authority
TW
Taiwan
Prior art keywords
gate electrode
semiconductor memory
inductive type
memory apparatus
volatile semiconductor
Prior art date
Application number
TW086114677A
Other languages
English (en)
Inventor
Akihiko Satoh
Takayuki Kawahara
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW365001B publication Critical patent/TW365001B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3472—Circuits or methods to verify correct erasure of nonvolatile memory cells whilst erasing is in progress, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasure
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3481—Circuits or methods to verify correct programming of nonvolatile memory cells whilst programming is in progress, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming

Landscapes

  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
TW086114677A 1996-10-17 1997-10-07 Non-volatile semiconductor memory apparatus and the operation method TW365001B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27486596 1996-10-17

Publications (1)

Publication Number Publication Date
TW365001B true TW365001B (en) 1999-07-21

Family

ID=17547651

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086114677A TW365001B (en) 1996-10-17 1997-10-07 Non-volatile semiconductor memory apparatus and the operation method

Country Status (4)

Country Link
US (2) US6580643B1 (zh)
KR (1) KR100585858B1 (zh)
TW (1) TW365001B (zh)
WO (1) WO1998018132A1 (zh)

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KR100653718B1 (ko) * 2005-08-09 2006-12-05 삼성전자주식회사 반도체소자의 소거 방법들
KR100851853B1 (ko) * 2006-11-22 2008-08-13 삼성전자주식회사 플래시 메모리 장치 및 그것의 프로그램 및 프로그램 검증방법
EP2091214B1 (en) * 2006-12-08 2014-01-22 NEC Corporation Telephone terminal, transmission method, and program
JP2008217972A (ja) * 2007-02-28 2008-09-18 Samsung Electronics Co Ltd 不揮発性メモリ素子の作動方法
JP2008217971A (ja) * 2007-02-28 2008-09-18 Samsung Electronics Co Ltd 不揮発性メモリ素子の作動方法
KR101348173B1 (ko) 2007-05-25 2014-01-08 삼성전자주식회사 플래시 메모리 장치, 그것의 소거 및 프로그램 방법들,그리고 그것을 포함한 메모리 시스템
KR101308014B1 (ko) * 2007-07-10 2013-09-12 삼성전자주식회사 플래시 메모리 장치 및 그것의 프로그램 리커버리 방법
KR101401558B1 (ko) 2007-08-20 2014-06-09 삼성전자주식회사 플래시 메모리 장치, 그것의 프로그램 및 소거 방법들,그리고 그것을 포함하는 메모리 시스템 및 컴퓨터 시스템
KR101373186B1 (ko) 2007-08-22 2014-03-13 삼성전자주식회사 플래시 메모리 장치 및 그것의 프로그램 방법들, 그리고그것을 포함하는 메모리 시스템 및 컴퓨터 시스템
US7619933B2 (en) * 2007-10-05 2009-11-17 Micron Technology, Inc. Reducing effects of program disturb in a memory device
US8355278B2 (en) * 2007-10-05 2013-01-15 Micron Technology, Inc. Reducing effects of program disturb in a memory device
JP2009266356A (ja) * 2008-04-30 2009-11-12 Toshiba Corp Ｎａｎｄ型フラッシュメモリ
US8027200B2 (en) * 2008-08-21 2011-09-27 Micron Technology, Inc. Reduction of quick charge loss effect in a memory device
US7986564B2 (en) * 2008-09-19 2011-07-26 Macronix International Co., Ltd. High second bit operation window method for virtual ground array with two-bit memory cells
US7940568B1 (en) * 2008-12-30 2011-05-10 Micron Technology, Inc. Dynamic polarization for reducing stress induced leakage current
JP4881401B2 (ja) * 2009-03-23 2012-02-22 株式会社東芝 Ｎａｎｄ型フラッシュメモリ
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JP2010267341A (ja) * 2009-05-15 2010-11-25 Renesas Electronics Corp 半導体装置
US7957188B2 (en) * 2009-11-05 2011-06-07 Fs Semiconductor Corp., Ltd. Structures and methods of trimming threshold voltage of a flash EEPROM memory
JP5646369B2 (ja) * 2011-03-01 2014-12-24 株式会社東芝 不揮発性半導体記憶装置
US8488388B2 (en) * 2011-11-01 2013-07-16 Silicon Storage Technology, Inc. Method of programming a split gate non-volatile floating gate memory cell having a separate erase gate
WO2013148306A1 (en) 2012-03-30 2013-10-03 The General Hospital Corporation Imaging system, method and distal attachment for multidirectional field of view endoscopy
US9007846B2 (en) 2012-08-10 2015-04-14 Kabushiki Kaisha Toshiba Non-volatile semiconductor storage device
KR20150015578A (ko) * 2013-07-30 2015-02-11 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 프로그램 검증 방법
US8928361B1 (en) * 2013-10-03 2015-01-06 Taiwan Semiconductor Manufacturing Company, Ltd. Common well bias design for a driving circuit and method of using
JP5952366B2 (ja) 2014-10-02 2016-07-13 ウィンボンド エレクトロニクス コーポレーション 高信頼性不揮発性半導体メモリ
JP6144741B2 (ja) * 2015-09-28 2017-06-07 ウィンボンド エレクトロニクス コーポレーション 不揮発性半導体メモリ
JP2018163723A (ja) 2017-03-27 2018-10-18 東芝メモリ株式会社 メモリデバイス及びメモリシステム
US10838652B2 (en) * 2018-08-24 2020-11-17 Silicon Storage Technology, Inc. Programming of memory cell having gate capacitively coupled to floating gate
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JPH0668686A (ja) * 1992-08-21 1994-03-11 Hitachi Ltd 半導体不揮発性記憶装置
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JP2725575B2 (ja) 1993-10-28 1998-03-11 日本電気株式会社 不揮発性半導体記憶装置とその書き込み特性回復方法
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JPH07320487A (ja) * 1994-05-20 1995-12-08 Sony Corp 半導体不揮発性記憶装置
JPH0982097A (ja) * 1995-07-10 1997-03-28 Hitachi Ltd 半導体不揮発性記憶装置およびそれを用いたコンピュータシステム
US5729495A (en) * 1995-09-29 1998-03-17 Altera Corporation Dynamic nonvolatile memory cell
JPH10256400A (ja) * 1997-03-10 1998-09-25 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP3951443B2 (ja) * 1997-09-02 2007-08-01 ソニー株式会社 不揮発性半導体記憶装置及びその書き込み方法
JP2000339977A (ja) * 1999-05-28 2000-12-08 Nec Corp データ設定方法および装置、データ記憶装置、情報記憶媒体

Also Published As

Publication number Publication date
KR20000049174A (ko) 2000-07-25
US6771540B2 (en) 2004-08-03
WO1998018132A1 (fr) 1998-04-30
US6580643B1 (en) 2003-06-17
US20030133329A1 (en) 2003-07-17
KR100585858B1 (ko) 2006-06-07

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MM4A Annulment or lapse of patent due to non-payment of fees