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TW259868B - Delay circuit - Google Patents

Delay circuit

Info

Publication number
TW259868B
TW259868B TW83104145A TW83104145A TW259868B TW 259868 B TW259868 B TW 259868B TW 83104145 A TW83104145 A TW 83104145A TW 83104145 A TW83104145 A TW 83104145A TW 259868 B TW259868 B TW 259868B
Authority
TW
Taiwan
Prior art keywords
delay
storage device
variable
input data
output
Prior art date
Application number
TW83104145A
Other languages
Chinese (zh)
Inventor
Yeun-Jong Jeng
Jeng-Yunn Suen
Jiing-Shyang Yang
Original Assignee
Ind Tech Res Inst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ind Tech Res Inst filed Critical Ind Tech Res Inst
Priority to TW83104145A priority Critical patent/TW259868B/en
Application granted granted Critical
Publication of TW259868B publication Critical patent/TW259868B/en

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  • Pulse Circuits (AREA)
  • Networks Using Active Elements (AREA)

Abstract

A delay circuit with variable delay time, that is used for generating delay of input data with variable delay time, includes: (1) one signal data storage device for storing the above input data; (2) one delay address generating device including one sequence control device for controlling the operation of variable time delay circuit, one writing control device for controlling the writing of input data into the data storage device, and one delay address device for accepting one set of variable delay value in order to generate one corresponding delay output address in the range of all storage device for each delay value; (3) one output device for reading output data from the data storage device, that is the output result of input data through the variable delay value.
TW83104145A 1994-05-04 1994-05-04 Delay circuit TW259868B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW83104145A TW259868B (en) 1994-05-04 1994-05-04 Delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW83104145A TW259868B (en) 1994-05-04 1994-05-04 Delay circuit

Publications (1)

Publication Number Publication Date
TW259868B true TW259868B (en) 1995-10-11

Family

ID=51401843

Family Applications (1)

Application Number Title Priority Date Filing Date
TW83104145A TW259868B (en) 1994-05-04 1994-05-04 Delay circuit

Country Status (1)

Country Link
TW (1) TW259868B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015094374A1 (en) * 2013-12-20 2015-06-25 Intel Corporation Apparatus for charge recovery during low power mode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015094374A1 (en) * 2013-12-20 2015-06-25 Intel Corporation Apparatus for charge recovery during low power mode
US9948179B2 (en) 2013-12-20 2018-04-17 Intel Corporation Apparatus for charge recovery during low power mode

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees